mirror of
git://projects.qi-hardware.com/openwrt-xburst.git
synced 2024-09-12 18:58:37 +03:00
Huge thanks to Nico Huber for providing working patches ! git-svn-id: svn://svn.openwrt.org/openwrt/branches/buildroot-ng/openwrt@4117 3c298f89-4303-0410-b956-a3cf2f4a3e73
439 lines
14 KiB
Diff
439 lines
14 KiB
Diff
diff -Naurp linux-2.6.16.7-generic-patched/arch/mips/pci/Makefile linux-2.6.16.7-patched/arch/mips/pci/Makefile
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--- linux-2.6.16.7-generic-patched/arch/mips/pci/Makefile 2006-04-17 23:53:25.000000000 +0200
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+++ linux-2.6.16.7-patched/arch/mips/pci/Makefile 2006-07-05 15:21:58.000000000 +0200
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@@ -18,6 +18,7 @@ obj-$(CONFIG_MIPS_NILE4) += ops-nile4.o
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obj-$(CONFIG_MIPS_TX3927) += ops-tx3927.o
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obj-$(CONFIG_PCI_VR41XX) += ops-vr41xx.o pci-vr41xx.o
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obj-$(CONFIG_NEC_CMBVR4133) += fixup-vr4133.o
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+obj-$(CONFIG_BCM_PCI) += fixup-bcm96348.o pci-bcm96348.o ops-bcm96348.o
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#
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# These are still pretty much in the old state, watch, go blind.
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diff -Naurp linux-2.6.16.7-generic-patched/arch/mips/pci/fixup-bcm96348.c linux-2.6.16.7-patched/arch/mips/pci/fixup-bcm96348.c
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--- linux-2.6.16.7-generic-patched/arch/mips/pci/fixup-bcm96348.c 1970-01-01 01:00:00.000000000 +0100
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+++ linux-2.6.16.7-patched/arch/mips/pci/fixup-bcm96348.c 2006-07-05 15:21:58.000000000 +0200
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@@ -0,0 +1,85 @@
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+/*
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+<:copyright-gpl
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+ Copyright 2002 Broadcom Corp. All Rights Reserved.
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+
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+ This program is free software; you can distribute it and/or modify it
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+ under the terms of the GNU General Public License (Version 2) as
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+ published by the Free Software Foundation.
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+
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+ This program is distributed in the hope it will be useful, but WITHOUT
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+ ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
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+ FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License
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+ for more details.
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+
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+ You should have received a copy of the GNU General Public License along
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+ with this program; if not, write to the Free Software Foundation, Inc.,
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+ 59 Temple Place - Suite 330, Boston MA 02111-1307, USA.
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+:>
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+*/
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+#include <linux/init.h>
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+#include <linux/types.h>
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+#include <linux/pci.h>
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+
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+#include <bcmpci.h>
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+#include <bcm_intr.h>
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+#include <bcm_map_part.h>
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+
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+static volatile MpiRegisters * mpi = (MpiRegisters *)(MPI_BASE);
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+
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+static char irq_tab_bcm96348[] __initdata = {
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+ [0] = INTERRUPT_ID_MPI,
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+ [1] = INTERRUPT_ID_MPI,
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+#if defined(CONFIG_USB)
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+ [USB_HOST_SLOT] = INTERRUPT_ID_USBH
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+#endif
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+};
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+
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+int __init pcibios_map_irq(struct pci_dev *dev, u8 slot, u8 pin)
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+{
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+ return irq_tab_bcm96348[slot];
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+}
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+
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+static void bcm96348_fixup(struct pci_dev *dev)
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+{
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+ uint32 memaddr;
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+ uint32 size;
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+
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+ memaddr = pci_resource_start(dev, 0);
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+ size = pci_resource_len(dev, 0);
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+
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+ switch (PCI_SLOT(dev->devfn)) {
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+ case 0:
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+ // UBUS to PCI address range
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+ // Memory Window 1. Mask determines which bits are decoded.
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+ mpi->l2pmrange1 = ~(size-1);
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+ // UBUS to PCI Memory base address. This is akin to the ChipSelect base
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+ // register.
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+ mpi->l2pmbase1 = memaddr & BCM_PCI_ADDR_MASK;
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+ // UBUS to PCI Remap Address. Replaces the masked address bits in the
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+ // range register with this setting.
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+ // Also, enable direct I/O and direct Memory accesses
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+ mpi->l2pmremap1 = (memaddr | MEM_WINDOW_EN);
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+ break;
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+
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+ case 1:
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+ // Memory Window 2
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+ mpi->l2pmrange2 = ~(size-1);
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+ // UBUS to PCI Memory base address.
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+ mpi->l2pmbase2 = memaddr & BCM_PCI_ADDR_MASK;
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+ // UBUS to PCI Remap Address
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+ mpi->l2pmremap2 = (memaddr | MEM_WINDOW_EN);
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+ break;
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+
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+#if defined(CONFIG_USB)
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+ case USB_HOST_SLOT:
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+ dev->resource[0].start = USB_HOST_BASE;
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+ dev->resource[0].end = USB_HOST_BASE+USB_BAR0_MEM_SIZE-1;
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+ break;
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+#endif
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+ }
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+}
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+
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+struct pci_fixup pcibios_fixups[] = {
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+ { PCI_FIXUP_FINAL, PCI_ANY_ID, PCI_ANY_ID, bcm96348_fixup },
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+ {0}
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+};
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diff -Naurp linux-2.6.16.7-generic-patched/arch/mips/pci/ops-bcm96348.c linux-2.6.16.7-patched/arch/mips/pci/ops-bcm96348.c
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--- linux-2.6.16.7-generic-patched/arch/mips/pci/ops-bcm96348.c 1970-01-01 01:00:00.000000000 +0100
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+++ linux-2.6.16.7-patched/arch/mips/pci/ops-bcm96348.c 2006-07-05 15:21:58.000000000 +0200
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@@ -0,0 +1,276 @@
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+/*
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+<:copyright-gpl
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+ Copyright 2002 Broadcom Corp. All Rights Reserved.
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+
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+ This program is free software; you can distribute it and/or modify it
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+ under the terms of the GNU General Public License (Version 2) as
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+ published by the Free Software Foundation.
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+
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+ This program is distributed in the hope it will be useful, but WITHOUT
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+ ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
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+ FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License
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+ for more details.
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+
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+ You should have received a copy of the GNU General Public License along
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+ with this program; if not, write to the Free Software Foundation, Inc.,
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+ 59 Temple Place - Suite 330, Boston MA 02111-1307, USA.
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+:>
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+*/
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+#include <linux/types.h>
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+#include <linux/pci.h>
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+#include <linux/kernel.h>
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+#include <linux/init.h>
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+#include <asm/addrspace.h>
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+
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+#include <bcm_intr.h>
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+#include <bcm_map_part.h>
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+#include <bcmpci.h>
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+
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+#include <linux/delay.h>
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+
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+#if defined(CONFIG_USB)
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+#if 0
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+#define DPRINT(x...) printk(x)
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+#else
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+#define DPRINT(x...)
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+#endif
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+
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+static int
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+pci63xx_int_read(unsigned int devfn, int where, u32 * value, int size);
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+static int
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+pci63xx_int_write(unsigned int devfn, int where, u32 * value, int size);
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+
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+static bool usb_mem_size_rd = FALSE;
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+static uint32 usb_mem_base = 0;
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+static uint32 usb_cfg_space_cmd_reg = 0;
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+#endif
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+static bool pci_mem_size_rd = FALSE;
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+
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+static volatile MpiRegisters * mpi = (MpiRegisters *)(MPI_BASE);
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+
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+static void mpi_SetupPciConfigAccess(uint32 addr)
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+{
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+ mpi->l2pcfgctl = (DIR_CFG_SEL | DIR_CFG_USEREG | addr) & ~CONFIG_TYPE;
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+}
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+
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+static void mpi_ClearPciConfigAccess(void)
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+{
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+ mpi->l2pcfgctl = 0x00000000;
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+}
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+
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+#if defined(CONFIG_USB)
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+/* --------------------------------------------------------------------------
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+ Name: pci63xx_int_write
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+Abstract: PCI Config write on internal device(s)
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+ -------------------------------------------------------------------------- */
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+static int
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+pci63xx_int_write(unsigned int devfn, int where, u32 * value, int size)
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+{
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+ if (PCI_SLOT(devfn) != USB_HOST_SLOT) {
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+ return PCIBIOS_SUCCESSFUL;
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+ }
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+
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+ switch (size) {
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+ case 1:
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+ DPRINT("W => Slot: %d Where: %2X Len: %d Data: %02X\n",
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+ PCI_SLOT(devfn), where, size, *value);
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+ break;
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+ case 2:
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+ DPRINT("W => Slot: %d Where: %2X Len: %d Data: %04X\n",
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+ PCI_SLOT(devfn), where, size, *value);
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+ switch (where) {
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+ case PCI_COMMAND:
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+ usb_cfg_space_cmd_reg = *value;
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+ break;
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+ default:
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+ break;
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+ }
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+ break;
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+ case 4:
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+ DPRINT("W => Slot: %d Where: %2X Len: %d Data: %08lX\n",
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+ PCI_SLOT(devfn), where, size, *value);
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+ switch (where) {
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+ case PCI_BASE_ADDRESS_0:
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+ if (*value == 0xffffffff) {
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+ usb_mem_size_rd = TRUE;
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+ } else {
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+ usb_mem_base = *value;
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+ }
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+ break;
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+ default:
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+ break;
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+ }
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+ break;
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+ default:
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+ break;
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+ }
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+
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+ return PCIBIOS_SUCCESSFUL;
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+}
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+
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+/* --------------------------------------------------------------------------
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+ Name: pci63xx_int_read
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+Abstract: PCI Config read on internal device(s)
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+ -------------------------------------------------------------------------- */
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+static int
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+pci63xx_int_read(unsigned int devfn, int where, u32 * value, int size)
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+{
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+ uint32 retValue = 0xFFFFFFFF;
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+
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+ if (PCI_SLOT(devfn) != USB_HOST_SLOT) {
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+ return PCIBIOS_SUCCESSFUL;
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+ }
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+
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+ // For now, this is specific to the USB Host controller. We can
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+ // make it more general if we have to...
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+ // Emulate PCI Config accesses
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+ switch (where) {
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+ case PCI_VENDOR_ID:
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+ case PCI_DEVICE_ID:
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+ retValue = PCI_VENDOR_ID_BROADCOM | 0x63000000;
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+ break;
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+ case PCI_COMMAND:
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+ case PCI_STATUS:
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+ retValue = (0x0006 << 16) | usb_cfg_space_cmd_reg;
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+ break;
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+ case PCI_CLASS_REVISION:
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+ case PCI_CLASS_DEVICE:
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+ retValue = (PCI_CLASS_SERIAL_USB << 16) | (0x10 << 8) | 0x01;
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+ break;
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+ case PCI_BASE_ADDRESS_0:
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+ if (usb_mem_size_rd) {
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+ retValue = USB_BAR0_MEM_SIZE;
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+ } else {
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+ if (usb_mem_base != 0)
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+ retValue = usb_mem_base;
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+ else
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+ retValue = USB_HOST_BASE;
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+ }
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+ usb_mem_size_rd = FALSE;
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+ break;
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+ case PCI_CACHE_LINE_SIZE:
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+ case PCI_LATENCY_TIMER:
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+ retValue = 0;
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+ break;
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+ case PCI_HEADER_TYPE:
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+ retValue = PCI_HEADER_TYPE_NORMAL;
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+ break;
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+ case PCI_SUBSYSTEM_VENDOR_ID:
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+ retValue = PCI_VENDOR_ID_BROADCOM;
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+ break;
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+ case PCI_SUBSYSTEM_ID:
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+ retValue = 0x6300;
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+ break;
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+ case PCI_INTERRUPT_LINE:
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+ retValue = INTERRUPT_ID_USBH;
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+ break;
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+ default:
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+ break;
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+ }
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+
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+ switch (size) {
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+ case 1:
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+ *value = (retValue >> ((where & 3) << 3)) & 0xff;
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+ DPRINT("R <= Slot: %d Where: %2X Len: %d Data: %02X\n",
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+ PCI_SLOT(devfn), where, size, *value);
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+ break;
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+ case 2:
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+ *value = (retValue >> ((where & 3) << 3)) & 0xffff;
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+ DPRINT("R <= Slot: %d Where: %2X Len: %d Data: %04X\n",
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+ PCI_SLOT(devfn), where, size, *value);
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+ break;
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+ case 4:
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+ *value = retValue;
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+ DPRINT("R <= Slot: %d Where: %2X Len: %d Data: %08lX\n",
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+ PCI_SLOT(devfn), where, size, *value);
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+ break;
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+ default:
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+ break;
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+ }
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+
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+ return PCIBIOS_SUCCESSFUL;
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+}
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+#endif
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+
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+static int bcm96348_pcibios_read(struct pci_bus *bus, unsigned int devfn,
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+ int where, int size, u32 * val)
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+{
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+ volatile unsigned char *ioBase = (unsigned char *)(mpi->l2piobase | KSEG1);
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+ uint32 data;
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+
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+#if defined(CONFIG_USB)
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+ if (PCI_SLOT(devfn) == USB_HOST_SLOT)
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+ return pci63xx_int_read(devfn, where, val, size);
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+#endif
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+
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+ mpi_SetupPciConfigAccess(BCM_PCI_CFG(PCI_SLOT(devfn), PCI_FUNC(devfn), where));
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+ data = *(uint32 *)ioBase;
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+ switch(size) {
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+ case 1:
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+ *val = (data >> ((where & 3) << 3)) & 0xff;
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+ break;
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+ case 2:
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+ *val = (data >> ((where & 3) << 3)) & 0xffff;
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+ break;
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+ case 4:
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+ *val = data;
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+ /* Special case for reading PCI device range */
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+ if ((where >= PCI_BASE_ADDRESS_0) && (where <= PCI_BASE_ADDRESS_5)) {
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+ if (pci_mem_size_rd) {
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+ /* bcm6348 PCI memory window minimum size is 64K */
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+ *val &= PCI_SIZE_64K;
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+ }
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+ }
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+ break;
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+ default:
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+ break;
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+ }
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+ pci_mem_size_rd = FALSE;
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+ mpi_ClearPciConfigAccess();
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+
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+ return PCIBIOS_SUCCESSFUL;
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+}
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+
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+static int bcm96348_pcibios_write(struct pci_bus *bus, unsigned int devfn,
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+ int where, int size, u32 val)
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+{
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+ volatile unsigned char *ioBase = (unsigned char *)(mpi->l2piobase | KSEG1);
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+ uint32 data;
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+
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+#if defined(CONFIG_USB)
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+ if (PCI_SLOT(devfn) == USB_HOST_SLOT)
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+ return pci63xx_int_write(devfn, where, &val, size);
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+#endif
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+ mpi_SetupPciConfigAccess(BCM_PCI_CFG(PCI_SLOT(devfn), PCI_FUNC(devfn), where));
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+ data = *(uint32 *)ioBase;
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+ switch(size) {
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+ case 1:
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+ data = (data & ~(0xff << ((where & 3) << 3))) |
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+ (val << ((where & 3) << 3));
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+ break;
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+ case 2:
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+ data = (data & ~(0xffff << ((where & 3) << 3))) |
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+ (val << ((where & 3) << 3));
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+ break;
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+ case 4:
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+ data = val;
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+ /* Special case for reading PCI device range */
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+ if ((where >= PCI_BASE_ADDRESS_0) && (where <= PCI_BASE_ADDRESS_5)) {
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+ if (val == 0xffffffff)
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+ pci_mem_size_rd = TRUE;
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+ }
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+ break;
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+ default:
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+ break;
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+ }
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+ *(uint32 *)ioBase = data;
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+ udelay(500);
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+ mpi_ClearPciConfigAccess();
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+
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+ return PCIBIOS_SUCCESSFUL;
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+}
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+
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+struct pci_ops bcm96348_pci_ops = {
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+ .read = bcm96348_pcibios_read,
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+ .write = bcm96348_pcibios_write
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+};
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diff -Naurp linux-2.6.16.7-generic-patched/arch/mips/pci/pci-bcm96348.c linux-2.6.16.7-patched/arch/mips/pci/pci-bcm96348.c
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--- linux-2.6.16.7-generic-patched/arch/mips/pci/pci-bcm96348.c 1970-01-01 01:00:00.000000000 +0100
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+++ linux-2.6.16.7-patched/arch/mips/pci/pci-bcm96348.c 2006-07-05 15:21:58.000000000 +0200
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@@ -0,0 +1,54 @@
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+/*
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+<:copyright-gpl
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|
+ Copyright 2002 Broadcom Corp. All Rights Reserved.
|
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+
|
|
+ This program is free software; you can distribute it and/or modify it
|
|
+ under the terms of the GNU General Public License (Version 2) as
|
|
+ published by the Free Software Foundation.
|
|
+
|
|
+ This program is distributed in the hope it will be useful, but WITHOUT
|
|
+ ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
|
|
+ FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License
|
|
+ for more details.
|
|
+
|
|
+ You should have received a copy of the GNU General Public License along
|
|
+ with this program; if not, write to the Free Software Foundation, Inc.,
|
|
+ 59 Temple Place - Suite 330, Boston MA 02111-1307, USA.
|
|
+:>
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|
+*/
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+#include <linux/types.h>
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+#include <linux/pci.h>
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+#include <linux/kernel.h>
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+#include <linux/init.h>
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+
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+#include <asm/pci_channel.h>
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+#include <bcmpci.h>
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+
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+static struct resource bcm_pci_io_resource = {
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+ .name = "bcm96348 pci IO space",
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+ .start = BCM_PCI_IO_BASE,
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+ .end = BCM_PCI_IO_BASE + BCM_PCI_IO_SIZE_64KB - 1,
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+ .flags = IORESOURCE_IO
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+};
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+
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+static struct resource bcm_pci_mem_resource = {
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+ .name = "bcm96348 pci memory space",
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+ .start = BCM_PCI_MEM_BASE,
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+ .end = BCM_PCI_MEM_BASE + BCM_PCI_MEM_SIZE_16MB - 1,
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+ .flags = IORESOURCE_MEM
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+};
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+
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+extern struct pci_ops bcm96348_pci_ops;
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+
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+struct pci_controller bcm96348_controller = {
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+ .pci_ops = &bcm96348_pci_ops,
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+ .io_resource = &bcm_pci_io_resource,
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+ .mem_resource = &bcm_pci_mem_resource,
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+};
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+
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+static void bcm96348_pci_init(void)
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+{
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+ register_pci_controller(&bcm96348_controller);
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+}
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+
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|
+arch_initcall(bcm96348_pci_init);
|