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df88996997
The nand subtarget is not working yet. Signed-off-by: Gabor Juhos <juhosg@openwrt.org> git-svn-id: svn://svn.openwrt.org/openwrt/trunk@33983 3c298f89-4303-0410-b956-a3cf2f4a3e73
40 lines
1.3 KiB
Diff
40 lines
1.3 KiB
Diff
From c9a552f3007f0621b2440ae17bad816578299e52 Mon Sep 17 00:00:00 2001
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From: Gabor Juhos <juhosg@openwrt.org>
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Date: Sun, 24 Jun 2012 13:45:27 +0200
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Subject: [PATCH 20/34] MIPS: ath79: add GPIO setup code for the QCA955X SoCs
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Signed-off-by: Gabor Juhos <juhosg@openwrt.org>
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---
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arch/mips/ath79/gpio.c | 4 +++-
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arch/mips/include/asm/mach-ath79/ar71xx_regs.h | 1 +
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2 files changed, 4 insertions(+), 1 deletions(-)
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--- a/arch/mips/ath79/gpio.c
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+++ b/arch/mips/ath79/gpio.c
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@@ -198,12 +198,14 @@ void __init ath79_gpio_init(void)
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ath79_gpio_count = AR933X_GPIO_COUNT;
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else if (soc_is_ar934x())
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ath79_gpio_count = AR934X_GPIO_COUNT;
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+ else if (soc_is_qca955x())
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+ ath79_gpio_count = QCA955X_GPIO_COUNT;
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else
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BUG();
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ath79_gpio_base = ioremap_nocache(AR71XX_GPIO_BASE, AR71XX_GPIO_SIZE);
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ath79_gpio_chip.ngpio = ath79_gpio_count;
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- if (soc_is_ar934x()) {
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+ if (soc_is_ar934x() || soc_is_qca955x()) {
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ath79_gpio_chip.direction_input = ar934x_gpio_direction_input;
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ath79_gpio_chip.direction_output = ar934x_gpio_direction_output;
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}
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--- a/arch/mips/include/asm/mach-ath79/ar71xx_regs.h
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+++ b/arch/mips/include/asm/mach-ath79/ar71xx_regs.h
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@@ -507,6 +507,7 @@
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#define AR913X_GPIO_COUNT 22
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#define AR933X_GPIO_COUNT 30
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#define AR934X_GPIO_COUNT 23
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+#define QCA955X_GPIO_COUNT 24
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/*
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* SRIF block
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