mirror of
git://projects.qi-hardware.com/openwrt-xburst.git
synced 2024-12-24 18:50:49 +02:00
17c7b6c3fd
git-svn-id: svn://svn.openwrt.org/openwrt/trunk@8653 3c298f89-4303-0410-b956-a3cf2f4a3e73
534 lines
19 KiB
Diff
534 lines
19 KiB
Diff
diff -Nurbw linux-2.6.17/arch/arm/Kconfig linux-2.6.17-patched/arch/arm/Kconfig
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--- linux-2.6.17/arch/arm/Kconfig 2006-06-17 18:49:35.000000000 -0700
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+++ linux-2.6.17-patched/arch/arm/Kconfig 2006-09-21 14:57:02.000000000 -0700
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@@ -656,7 +656,7 @@
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endmenu
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-if (ARCH_SA1100 || ARCH_INTEGRATOR || ARCH_OMAP1)
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+if (ARCH_SA1100 || ARCH_INTEGRATOR || ARCH_OMAP1 || ARCH_PXA)
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menu "CPU Frequency scaling"
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@@ -685,6 +685,13 @@
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endmenu
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+config CPU_FREQ_PXA
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+ bool
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+ depends on CPU_FREQ && ARCH_PXA
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+ default y
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+ select CPU_FREQ_DEFAULT_GOV_USERSPACE
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+ select CPU_FREQ_TABLE
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+
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endif
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menu "Floating point emulation"
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diff -Nurbw linux-2.6.17/arch/arm/mach-pxa/cpu-pxa.c linux-2.6.17-patched/arch/arm/mach-pxa/cpu-pxa.c
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--- linux-2.6.17/arch/arm/mach-pxa/cpu-pxa.c 1969-12-31 16:00:00.000000000 -0800
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+++ linux-2.6.17-patched/arch/arm/mach-pxa/cpu-pxa.c 2006-09-21 14:57:02.000000000 -0700
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@@ -0,0 +1,324 @@
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+/*
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+ * linux/arch/arm/mach-pxa/cpu-pxa.c
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+ *
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+ * Copyright (C) 2002,2003 Intrinsyc Software
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+ *
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+ * This program is free software; you can redistribute it and/or modify
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+ * it under the terms of the GNU General Public License as published by
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+ * the Free Software Foundation; either version 2 of the License, or
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+ * (at your option) any later version.
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+ *
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+ * This program is distributed in the hope that it will be useful,
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+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
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+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
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+ * GNU General Public License for more details.
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+ *
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+ * You should have received a copy of the GNU General Public License
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+ * along with this program; if not, write to the Free Software
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+ * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA
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+ *
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+ * History:
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+ * 31-Jul-2002 : Initial version [FB]
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+ * 29-Jan-2003 : added PXA255 support [FB]
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+ * 20-Apr-2003 : ported to v2.5 (Dustin McIntire, Sensoria Corp.)
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+ *
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+ * Note:
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+ * This driver may change the memory bus clock rate, but will not do any
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+ * platform specific access timing changes... for example if you have flash
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+ * memory connected to CS0, you will need to register a platform specific
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+ * notifier which will adjust the memory access strobes to maintain a
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+ * minimum strobe width.
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+ *
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+ */
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+
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+#include <linux/kernel.h>
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+#include <linux/module.h>
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+#include <linux/sched.h>
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+#include <linux/init.h>
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+#include <linux/cpufreq.h>
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+
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+#include <asm/hardware.h>
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+#include <asm/arch/pxa-regs.h>
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+
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+#undef DEBUG
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+
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+#ifdef DEBUG
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+ static unsigned int freq_debug = DEBUG;
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+ module_param(freq_debug, int, 0);
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+ MODULE_PARM_DESC(freq_debug, "Set the debug messages to on=1/off=0");
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+#else
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+ #define freq_debug 0
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+#endif
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+
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+typedef struct
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+{
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+ unsigned int khz;
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+ unsigned int membus;
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+ unsigned int cccr;
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+ unsigned int div2;
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+} pxa_freqs_t;
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+
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+/* Define the refresh period in mSec for the SDRAM and the number of rows */
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+#define SDRAM_TREF 64 /* standard 64ms SDRAM */
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+#define SDRAM_ROWS 2048 /* 64MB=8192 32MB=4096 */
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+#define MDREFR_DRI(x) ((x*SDRAM_TREF)/(SDRAM_ROWS*32))
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+
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+#define CCLKCFG_TURBO 0x1
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+#define CCLKCFG_FCS 0x2
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+#define PXA25x_MIN_FREQ 99533
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+#define PXA25x_MAX_FREQ 530842
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+#define MDREFR_DB2_MASK (MDREFR_K2DB2 | MDREFR_K1DB2)
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+#define MDREFR_DRI_MASK 0xFFF
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+
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+
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+/* Use the run mode frequencies for the CPUFREQ_POLICY_PERFORMANCE policy */
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+static pxa_freqs_t pxa255_run_freqs[] =
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+{
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+ /* CPU MEMBUS CCCR DIV2*/
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+ { 99533, 99533, 0x121, 1}, /* run= 99, turbo= 99, PXbus=50, SDRAM=50 */
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+ {132710, 132710, 0x123, 1}, /* run=133, turbo=133, PXbus=66, SDRAM=66 */
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+ {199066, 99533, 0x141, 0}, /* run=199, turbo=199, PXbus=99, SDRAM=99 */
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+ {265421, 132710, 0x143, 0}, /* run=265, turbo=265, PXbus=133, SDRAM=133 */
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+ {331776, 165888, 0x145, 1}, /* run=331, turbo=331, PXbus=166, SDRAM=83 */
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+ {398131, 99533, 0x161, 0}, /* run=398, turbo=398, PXbus=99, SDRAM=99 */
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+ {398131, 132710, 0x1c3, 0}, /* run=265, turbo=398, PXbus=133, SDRAM=133 */
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+ {530842, 132710, 0x163, 0}, /* run=531, turbo=531, PXbus=133, SDRAM=133 */
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+ {0,}
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+};
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+#define NUM_RUN_FREQS (sizeof(pxa255_run_freqs)/sizeof(pxa_freqs_t))
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+
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+static struct cpufreq_frequency_table pxa255_run_freq_table[NUM_RUN_FREQS+1];
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+
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+/* Use the turbo mode frequencies for the CPUFREQ_POLICY_POWERSAVE policy */
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+static pxa_freqs_t pxa255_turbo_freqs[] =
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+{
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+ /* CPU MEMBUS CCCR DIV2*/
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+ { 99533, 99533, 0x121, 1}, /* run=99, turbo= 99, PXbus=99, SDRAM=50 */
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+ {149299, 99533, 0x1a1, 0}, /* run=99, turbo=149, PXbus=99, SDRAM=99 */
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+ {199066, 99533, 0x221, 0}, /* run=99, turbo=199, PXbus=99, SDRAM=99 */
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+ {298598, 99533, 0x321, 0}, /* run=99, turbo=299, PXbus=99, SDRAM=99 */
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+ {398131, 99533, 0x241, 1}, /* run=199, turbo=398, PXbus=99, SDRAM=50 */
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+ {0,}
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+};
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+#define NUM_TURBO_FREQS (sizeof(pxa255_turbo_freqs)/sizeof(pxa_freqs_t))
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+
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+static struct cpufreq_frequency_table pxa255_turbo_freq_table[NUM_TURBO_FREQS+1];
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+
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+extern unsigned get_clk_frequency_khz(int info);
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+
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+/* find a valid frequency point */
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+static int pxa_verify_policy(struct cpufreq_policy *policy)
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+{
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+ int ret;
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+ struct cpufreq_frequency_table *pxa_freqs_table;
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+
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+ if(policy->policy == CPUFREQ_POLICY_PERFORMANCE) {
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+ pxa_freqs_table = pxa255_run_freq_table;
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+ } else if (policy->policy == CPUFREQ_POLICY_POWERSAVE) {
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+ pxa_freqs_table = pxa255_turbo_freq_table;
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+ } else {
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+ printk("CPU PXA: Unknown policy found. "
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+ "Using CPUFREQ_POLICY_PERFORMANCE\n");
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+ pxa_freqs_table = pxa255_run_freq_table;
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+ }
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+ ret=cpufreq_frequency_table_verify(policy, pxa_freqs_table);
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+
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+ if(freq_debug) {
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+ printk("Verified CPU policy: %dKhz min to %dKhz max\n",
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+ policy->min, policy->max);
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+ }
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+
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+ return ret;
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+}
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+
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+static int pxa_set_target(struct cpufreq_policy *policy,
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+ unsigned int target_freq,
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+ unsigned int relation)
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+{
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+ int idx;
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+ cpumask_t cpus_allowed;
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+ int cpu = policy->cpu;
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+ struct cpufreq_freqs freqs;
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+ pxa_freqs_t *pxa_freq_settings;
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+ struct cpufreq_frequency_table *pxa_freqs_table;
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+ unsigned long flags;
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+ unsigned int unused;
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+ unsigned int preset_mdrefr, postset_mdrefr;
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+ void *ramstart;
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+
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+ /*
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+ * Save this threads cpus_allowed mask.
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+ */
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+ cpus_allowed = current->cpus_allowed;
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+
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+ /*
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+ * Bind to the specified CPU. When this call returns,
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+ * we should be running on the right CPU.
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+ */
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+ set_cpus_allowed(current, cpumask_of_cpu(cpu));
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+ BUG_ON(cpu != smp_processor_id());
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+
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+ /* Get the current policy */
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+ if(policy->policy == CPUFREQ_POLICY_PERFORMANCE) {
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+ pxa_freq_settings = pxa255_run_freqs;
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+ pxa_freqs_table = pxa255_run_freq_table;
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+ }else if (policy->policy == CPUFREQ_POLICY_POWERSAVE) {
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+ pxa_freq_settings = pxa255_turbo_freqs;
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+ pxa_freqs_table = pxa255_turbo_freq_table;
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+ }else {
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+ printk("CPU PXA: Unknown policy found. "
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+ "Using CPUFREQ_POLICY_PERFORMANCE\n");
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+ pxa_freq_settings = pxa255_run_freqs;
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+ pxa_freqs_table = pxa255_run_freq_table;
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+ }
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+
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+ /* Lookup the next frequency */
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+ if (cpufreq_frequency_table_target(policy, pxa_freqs_table,
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+ target_freq, relation, &idx)) {
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+ return -EINVAL;
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+ }
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+
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+ freqs.old = policy->cur;
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+ freqs.new = pxa_freq_settings[idx].khz;
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+ freqs.cpu = policy->cpu;
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+ if(freq_debug) {
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+ printk(KERN_INFO "Changing CPU frequency to %d Mhz, (SDRAM %d Mhz)\n",
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+ freqs.new/1000, (pxa_freq_settings[idx].div2) ?
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+ (pxa_freq_settings[idx].membus/2000) :
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+ (pxa_freq_settings[idx].membus/1000));
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+ }
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+
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+ ramstart = phys_to_virt(0xa0000000);
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+
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+ /*
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+ * Tell everyone what we're about to do...
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+ * you should add a notify client with any platform specific
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+ * Vcc changing capability
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+ */
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+ cpufreq_notify_transition(&freqs, CPUFREQ_PRECHANGE);
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+
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+ /* Calculate the next MDREFR. If we're slowing down the SDRAM clock
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+ * we need to preset the smaller DRI before the change. If we're speeding
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+ * up we need to set the larger DRI value after the change.
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+ */
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+ preset_mdrefr = postset_mdrefr = MDREFR;
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+ if((MDREFR & MDREFR_DRI_MASK) > MDREFR_DRI(pxa_freq_settings[idx].membus)) {
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+ preset_mdrefr = (preset_mdrefr & ~MDREFR_DRI_MASK) |
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+ MDREFR_DRI(pxa_freq_settings[idx].membus);
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+ }
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+ postset_mdrefr = (postset_mdrefr & ~MDREFR_DRI_MASK) |
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+ MDREFR_DRI(pxa_freq_settings[idx].membus);
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+
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+ /* If we're dividing the memory clock by two for the SDRAM clock, this
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+ * must be set prior to the change. Clearing the divide must be done
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+ * after the change.
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+ */
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+ if(pxa_freq_settings[idx].div2) {
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+ preset_mdrefr |= MDREFR_DB2_MASK;
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+ postset_mdrefr |= MDREFR_DB2_MASK;
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+ } else {
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+ postset_mdrefr &= ~MDREFR_DB2_MASK;
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+ }
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+
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+ local_irq_save(flags);
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+
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+ /* Set new the CCCR */
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+ CCCR = pxa_freq_settings[idx].cccr;
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+
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+ __asm__ __volatile__(" \
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+ ldr r4, [%1] ; /* load MDREFR */ \
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+ b 2f ; \
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+ .align 5 ; \
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+1: \
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+ str %4, [%1] ; /* preset the MDREFR */ \
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+ mcr p14, 0, %2, c6, c0, 0 ; /* set CCLKCFG[FCS] */ \
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+ str %5, [%1] ; /* postset the MDREFR */ \
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+ \
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+ b 3f ; \
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+2: b 1b ; \
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+3: nop ; \
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+ "
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+ : "=&r" (unused)
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+ : "r" (&MDREFR), "r" (CCLKCFG_TURBO|CCLKCFG_FCS), "r" (ramstart), \
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+ "r" (preset_mdrefr), "r" (postset_mdrefr)
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+ : "r4", "r5");
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+ local_irq_restore(flags);
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+
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+ /*
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+ * Restore the CPUs allowed mask.
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+ */
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+ set_cpus_allowed(current, cpus_allowed);
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+
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+ /*
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+ * Tell everyone what we've just done...
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+ * you should add a notify client with any platform specific
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+ * SDRAM refresh timer adjustments
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+ */
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+ cpufreq_notify_transition(&freqs, CPUFREQ_POSTCHANGE);
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+
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+ return 0;
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+}
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+
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+static int pxa_cpufreq_init(struct cpufreq_policy *policy)
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+{
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+ cpumask_t cpus_allowed;
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+ unsigned int cpu = policy->cpu;
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+ int i;
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+
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+ cpus_allowed = current->cpus_allowed;
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+
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+ set_cpus_allowed(current, cpumask_of_cpu(cpu));
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+ BUG_ON(cpu != smp_processor_id());
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+
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+ /* set default policy and cpuinfo */
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+ policy->governor = CPUFREQ_DEFAULT_GOVERNOR;
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+ policy->policy = CPUFREQ_POLICY_PERFORMANCE;
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+ policy->cpuinfo.max_freq = PXA25x_MAX_FREQ;
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+ policy->cpuinfo.min_freq = PXA25x_MIN_FREQ;
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+ policy->cpuinfo.transition_latency = 1000; /* FIXME: 1 ms, assumed */
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+ policy->cur = get_clk_frequency_khz(0); /* current freq */
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+ policy->min = policy->max = policy->cur;
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+
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+ /* Generate the run cpufreq_frequency_table struct */
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+ for(i=0;i<NUM_RUN_FREQS;i++) {
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+ pxa255_run_freq_table[i].frequency = pxa255_run_freqs[i].khz;
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+ pxa255_run_freq_table[i].index = i;
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+ }
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+ pxa255_run_freq_table[i].frequency = CPUFREQ_TABLE_END;
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+ /* Generate the turbo cpufreq_frequency_table struct */
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+ for(i=0;i<NUM_TURBO_FREQS;i++) {
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+ pxa255_turbo_freq_table[i].frequency = pxa255_turbo_freqs[i].khz;
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+ pxa255_turbo_freq_table[i].index = i;
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+ }
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+ pxa255_turbo_freq_table[i].frequency = CPUFREQ_TABLE_END;
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+
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+ set_cpus_allowed(current, cpus_allowed);
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+ printk(KERN_INFO "PXA CPU frequency change support initialized\n");
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+
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+ return 0;
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+}
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+
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+static struct cpufreq_driver pxa_cpufreq_driver = {
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+ .verify = pxa_verify_policy,
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+ .target = pxa_set_target,
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+ .init = pxa_cpufreq_init,
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+ .name = "PXA25x",
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+};
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+
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+static int __init pxa_cpu_init(void)
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+{
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+ return cpufreq_register_driver(&pxa_cpufreq_driver);
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+}
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+
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+static void __exit pxa_cpu_exit(void)
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+{
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+ cpufreq_unregister_driver(&pxa_cpufreq_driver);
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+}
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+
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+
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+MODULE_AUTHOR ("Intrinsyc Software Inc.");
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+MODULE_DESCRIPTION ("CPU frequency changing driver for the PXA architecture");
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+MODULE_LICENSE("GPL");
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+module_init(pxa_cpu_init);
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+module_exit(pxa_cpu_exit);
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+
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diff -Nurbw linux-2.6.17/arch/arm/mach-pxa/Makefile linux-2.6.17-patched/arch/arm/mach-pxa/Makefile
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--- linux-2.6.17/arch/arm/mach-pxa/Makefile 2006-09-21 15:11:33.000000000 -0700
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+++ linux-2.6.17-patched/arch/arm/mach-pxa/Makefile 2006-09-21 14:57:02.000000000 -0700
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@@ -30,5 +30,6 @@
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obj-$(CONFIG_PM) += pm.o sleep.o
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obj-$(CONFIG_PXA_SSP) += ssp.o
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+obj-$(CONFIG_CPU_FREQ) += cpu-pxa.o
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ifeq ($(CONFIG_PXA27x),y)
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obj-$(CONFIG_PM) += standby.o
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diff -Nurbw linux-2.6.17/Documentation/cpu-freq/user-guide.txt linux-2.6.17-patched/Documentation/cpu-freq/user-guide.txt
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--- linux-2.6.17/Documentation/cpu-freq/user-guide.txt 2006-06-17 18:49:35.000000000 -0700
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+++ linux-2.6.17-patched/Documentation/cpu-freq/user-guide.txt 2006-09-21 14:57:02.000000000 -0700
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@@ -18,7 +18,7 @@
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Contents:
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---------
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1. Supported Architectures and Processors
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-1.1 ARM
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+1.1 ARM, PXA
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1.2 x86
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1.3 sparc64
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1.4 ppc
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@@ -37,14 +37,15 @@
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1. Supported Architectures and Processors
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=========================================
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-1.1 ARM
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--------
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+1.1 ARM, PXA
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+------------
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The following ARM processors are supported by cpufreq:
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ARM Integrator
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ARM-SA1100
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ARM-SA1110
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+Intel PXA
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1.2 x86
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diff -Nurbw linux-2.6.17/drivers/cpufreq/Kconfig linux-2.6.17-patched/drivers/cpufreq/Kconfig
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--- linux-2.6.17/drivers/cpufreq/Kconfig 2006-06-17 18:49:35.000000000 -0700
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+++ linux-2.6.17-patched/drivers/cpufreq/Kconfig 2006-09-21 15:06:12.000000000 -0700
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@@ -46,13 +46,9 @@
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This will show detail CPU frequency translation table in sysfs file
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system
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-# Note that it is not currently possible to set the other governors (such as ondemand)
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-# as the default, since if they fail to initialise, cpufreq will be
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-# left in an undefined state.
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-
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choice
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prompt "Default CPUFreq governor"
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- default CPU_FREQ_DEFAULT_GOV_USERSPACE if CPU_FREQ_SA1100 || CPU_FREQ_SA1110
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+ default CPU_FREQ_DEFAULT_GOV_USERSPACE if CPU_FREQ_SA1100 || CPU_FREQ_SA1110 || CPU_FREQ_PXA
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default CPU_FREQ_DEFAULT_GOV_PERFORMANCE
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help
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This option sets which CPUFreq governor shall be loaded at
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@@ -66,6 +62,14 @@
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the frequency statically to the highest frequency supported by
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the CPU.
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+config CPU_FREQ_DEFAULT_GOV_POWERSAVE
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+ bool "powersave"
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+ select CPU_FREQ_GOV_POWERSAVE
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+ help
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+ Use the CPUFreq governor 'powersave' as default. This sets
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+ the frequency statically to the lowest frequency supported by
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+ the CPU.
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+
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config CPU_FREQ_DEFAULT_GOV_USERSPACE
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bool "userspace"
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select CPU_FREQ_GOV_USERSPACE
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@@ -75,6 +79,23 @@
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program shall be able to set the CPU dynamically without having
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to enable the userspace governor manually.
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|
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+config CPU_FREQ_DEFAULT_GOV_ONDEMAND
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+ bool "ondemand"
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+ select CPU_FREQ_GOV_ONDEMAND
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+ help
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|
+ Use the CPUFreq governor 'ondemand' as default. This sets
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|
+ the frequency dynamically based on CPU load, throttling up
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|
+ and down as necessary.
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|
+
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+config CPU_FREQ_DEFAULT_GOV_CONSERVATIVE
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+ bool "conservative"
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|
+ select CPU_FREQ_GOV_CONSERVATIVE
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|
+ help
|
|
+ Use the CPUFreq governor 'conservative' as default. This sets
|
|
+ the frequency dynamically based on CPU load, throttling up
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|
+ and down as necessary. The frequency is gracefully increased
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|
+ and decreased rather than jumping to 100% when speed is required.
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+
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|
endchoice
|
|
|
|
config CPU_FREQ_GOV_PERFORMANCE
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|
diff -Nurbw linux-2.6.17/include/linux/cpufreq.h linux-2.6.17-patched/include/linux/cpufreq.h
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|
--- linux-2.6.17/include/linux/cpufreq.h 2006-06-17 18:49:35.000000000 -0700
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|
+++ linux-2.6.17-patched/include/linux/cpufreq.h 2006-09-21 15:08:35.000000000 -0700
|
|
@@ -276,9 +276,18 @@
|
|
#ifdef CONFIG_CPU_FREQ_DEFAULT_GOV_PERFORMANCE
|
|
extern struct cpufreq_governor cpufreq_gov_performance;
|
|
#define CPUFREQ_DEFAULT_GOVERNOR &cpufreq_gov_performance
|
|
+#elif defined(CONFIG_CPU_FREQ_DEFAULT_GOV_POWERSAVE)
|
|
+extern struct cpufreq_governor cpufreq_gov_powersave;
|
|
+#define CPUFREQ_DEFAULT_GOVERNOR &cpufreq_gov_powersave
|
|
#elif defined(CONFIG_CPU_FREQ_DEFAULT_GOV_USERSPACE)
|
|
extern struct cpufreq_governor cpufreq_gov_userspace;
|
|
#define CPUFREQ_DEFAULT_GOVERNOR &cpufreq_gov_userspace
|
|
+#elif defined(CONFIG_CPU_FREQ_DEFAULT_GOV_ONDEMAND)
|
|
+extern struct cpufreq_governor cpufreq_gov_ondemand;
|
|
+#define CPUFREQ_DEFAULT_GOVERNOR &cpufreq_gov_ondemand;
|
|
+#elif defined(CONFIG_CPU_FREQ_DEFAULT_GOV_CONSERVATIVE)
|
|
+extern struct cpufreq_governor cpufreq_gov_conservative;
|
|
+#define CPUFREQ_DEFAULT_GOVERNOR &cpufreq_gov_conservative;
|
|
#endif
|
|
|
|
|
|
diff -Nubrw --exclude='.*.o.cmd' linux-2.6.17/drivers/cpufreq/cpufreq_conservative.c linux-2.6.17-patched/drivers/cpufreq/cpufreq_conservative.c
|
|
--- linux-2.6.17/drivers/cpufreq/cpufreq_conservative.c 2006-09-21 15:26:46.000000000 -0700
|
|
+++ linux-2.6.17-patched/drivers/cpufreq/cpufreq_conservative.c 2006-06-17 18:49:35.000000000 -0700
|
|
@@ -529,7 +529,7 @@
|
|
return 0;
|
|
}
|
|
|
|
-static struct cpufreq_governor cpufreq_gov_dbs = {
|
|
+struct cpufreq_governor cpufreq_gov_conservative = {
|
|
.name = "conservative",
|
|
.governor = cpufreq_governor_dbs,
|
|
.owner = THIS_MODULE,
|
|
@@ -537,7 +537,7 @@
|
|
|
|
static int __init cpufreq_gov_dbs_init(void)
|
|
{
|
|
- return cpufreq_register_governor(&cpufreq_gov_dbs);
|
|
+ return cpufreq_register_governor(&cpufreq_gov_conservative);
|
|
}
|
|
|
|
static void __exit cpufreq_gov_dbs_exit(void)
|
|
@@ -545,7 +545,7 @@
|
|
/* Make sure that the scheduled work is indeed not running */
|
|
flush_scheduled_work();
|
|
|
|
- cpufreq_unregister_governor(&cpufreq_gov_dbs);
|
|
+ cpufreq_unregister_governor(&cpufreq_gov_conservative);
|
|
}
|
|
|
|
|
|
diff -Nubrw --exclude='.*.o.cmd' linux-2.6.17/drivers/cpufreq/cpufreq_ondemand.c linux-2.6.17-patched/drivers/cpufreq/cpufreq_ondemand.c
|
|
--- linux-2.6.17/drivers/cpufreq/cpufreq_ondemand.c 2006-06-17 18:49:35.000000000 -0700
|
|
+++ linux-2.6.17-patched/drivers/cpufreq/cpufreq_ondemand.c 2006-09-27 14:00:15.000000000 -0700
|
|
@@ -484,7 +484,7 @@
|
|
return 0;
|
|
}
|
|
|
|
-static struct cpufreq_governor cpufreq_gov_dbs = {
|
|
+struct cpufreq_governor cpufreq_gov_ondemand = {
|
|
.name = "ondemand",
|
|
.governor = cpufreq_governor_dbs,
|
|
.owner = THIS_MODULE,
|
|
@@ -492,7 +492,7 @@
|
|
|
|
static int __init cpufreq_gov_dbs_init(void)
|
|
{
|
|
- return cpufreq_register_governor(&cpufreq_gov_dbs);
|
|
+ return cpufreq_register_governor(&cpufreq_gov_ondemand);
|
|
}
|
|
|
|
static void __exit cpufreq_gov_dbs_exit(void)
|
|
@@ -504,7 +504,7 @@
|
|
destroy_workqueue(dbs_workq);
|
|
}
|
|
|
|
- cpufreq_unregister_governor(&cpufreq_gov_dbs);
|
|
+ cpufreq_unregister_governor(&cpufreq_gov_ondemand);
|
|
}
|
|
|
|
|