mirror of
git://projects.qi-hardware.com/openwrt-xburst.git
synced 2024-11-25 13:44:58 +02:00
982 lines
23 KiB
C
Executable File
982 lines
23 KiB
C
Executable File
/*
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* This program is free software; you can redistribute it and/or modify
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* it under the terms of the GNU General Public License version 2 as
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* published by the Free Software Foundation.
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*/
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#include <linux/init.h>
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#include <linux/module.h>
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#include <linux/kernel.h>
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#include <linux/device.h>
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#include <sound/core.h>
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#include <sound/pcm.h>
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#include <sound/ac97_codec.h>
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#include <sound/initval.h>
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#include <sound/soc.h>
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#include <sound/soc-dapm.h>
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#include "../jz4750/jz4750-pcm.h"
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#include "jzdlv.h"
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#define AUDIO_NAME "jzdlv"
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#define JZDLV_VERSION "1.0"
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/*
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* Debug
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*/
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#define JZDLV_DEBUG 0
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#ifdef JZDLV_DEBUG
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#define dbg(format, arg...) \
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printk(KERN_DEBUG AUDIO_NAME ": " format "\n" , ## arg)
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#else
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#define dbg(format, arg...) do {} while (0)
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#endif
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#define err(format, arg...) \
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printk(KERN_ERR AUDIO_NAME ": " format "\n" , ## arg)
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#define info(format, arg...) \
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printk(KERN_INFO AUDIO_NAME ": " format "\n" , ## arg)
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#define warn(format, arg...) \
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printk(KERN_WARNING AUDIO_NAME ": " format "\n" , ## arg)
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struct snd_soc_codec_device soc_codec_dev_jzdlv;
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/* codec private data */
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struct jzdlv_priv {
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unsigned int sysclk;
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};
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/*
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* jzdlv register cache
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*/
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static u16 jzdlv_reg[JZDLV_CACHEREGNUM];
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int read_codec_file(int addr)
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{
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while (__icdc_rgwr_ready());
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__icdc_set_addr(addr);
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mdelay(1);
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return(__icdc_get_value());
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}
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static void printk_codec_files(void)
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{
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int cnt, val;
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//printk("\n");
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#if 0
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printk("REG_CPM_I2SCDR=0x%08x\n",REG_CPM_I2SCDR);
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printk("REG_CPM_CLKGR=0x%08x\n",REG_CPM_CLKGR);
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printk("REG_CPM_CPCCR=0x%08x\n",REG_CPM_CPCCR);
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printk("REG_AIC_FR=0x%08x\n",REG_AIC_FR);
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printk("REG_AIC_CR=0x%08x\n",REG_AIC_CR);
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printk("REG_AIC_I2SCR=0x%08x\n",REG_AIC_I2SCR);
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printk("REG_AIC_SR=0x%08x\n",REG_AIC_SR);
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printk("REG_ICDC_RGDATA=0x%08x\n",REG_ICDC_RGDATA);
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#endif
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for (cnt = 0; cnt < JZDLV_CACHEREGNUM ; cnt++) {
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val = read_codec_file(cnt);
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jzdlv_reg[cnt] = val;
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//printk(" ( %d : 0x%x ) ",cnt ,jzdlv_reg[cnt]);
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}
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//printk("\n");
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}
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void write_codec_file(int addr, int val)
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{
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while (__icdc_rgwr_ready());
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__icdc_set_addr(addr);
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__icdc_set_cmd(val); /* write */
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mdelay(1);
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__icdc_set_rgwr();
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mdelay(1);
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//jzdlv_reg[addr] = val;
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}
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int write_codec_file_bit(int addr, int bitval, int mask_bit)
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{
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int val;
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while (__icdc_rgwr_ready());
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__icdc_set_addr(addr);
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mdelay(1);
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val = __icdc_get_value(); /* read */
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val &= ~(1 << mask_bit);
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if (bitval == 1)
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val |= 1 << mask_bit;
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#if 0
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while (__icdc_rgwr_ready());
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__icdc_set_addr(addr);
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__icdc_set_cmd(val); /* write */
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mdelay(1);
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__icdc_set_rgwr();
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mdelay(1);
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#else
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write_codec_file(addr, val);
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#endif
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while (__icdc_rgwr_ready());
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__icdc_set_addr(addr);
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val = __icdc_get_value(); /* read */
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if (((val >> mask_bit) & bitval) == bitval)
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return 1;
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else
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return 0;
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}
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/*
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* read jzdlv register cache
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*/
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static inline unsigned int jzdlv_read_reg_cache(struct snd_soc_codec *codec,
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unsigned int reg)
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{
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u16 *cache = codec->reg_cache;
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if (reg >= JZDLV_CACHEREGNUM)
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return -1;
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return cache[reg];
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}
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static inline unsigned int jzdlv_read(struct snd_soc_codec *codec,
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unsigned int reg)
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{
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u8 data;
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data = reg;
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if (codec->hw_write(codec->control_data, &data, 1) != 1)
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return -EIO;
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if (codec->hw_read(codec->control_data, &data, 1) != 1)
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return -EIO;
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return data;
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}
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/*
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* write jzdlv register cache
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*/
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static inline void jzdlv_write_reg_cache(struct snd_soc_codec *codec,
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unsigned int reg, u16 value)
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{
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u16 *cache = codec->reg_cache;
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if (reg >= JZDLV_CACHEREGNUM) {
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return;
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}
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cache[reg] = value;
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}
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/*
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* write to the jzdlv register space
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*/
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static int jzdlv_write(struct snd_soc_codec *codec, unsigned int reg,
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unsigned int value)
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{
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jzdlv_write_reg_cache(codec, reg, value);
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if(codec->hw_write)
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codec->hw_write(&value, NULL, reg);
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return 0;
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}
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static const char *jzdlv_input_select[] = {"Line In", "Mic"};
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static const char *jzdlv_deemph[] = {"None", "32Khz", "44.1Khz", "48Khz"};
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static const struct soc_enum jzdlv_enum[] = {
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SOC_ENUM_SINGLE(0x04, 2, 2, jzdlv_input_select),
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SOC_ENUM_SINGLE(0x05, 1, 4, jzdlv_deemph),
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};
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/* set Audio data replay */
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void set_audio_data_replay(void)
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{
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write_codec_file(9, 0xff);
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write_codec_file(8, 0x20);// only CCMC
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mdelay(10);
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/* DAC path */
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write_codec_file_bit(1, 0, 4);//CR1.HP_DIS->0
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write_codec_file_bit(5, 1, 3);//PMR1.SB_LIN->1
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write_codec_file_bit(5, 1, 0);//PMR1.SB_IND->1
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write_codec_file_bit(1, 0, 2);//CR1.BYPASS->0
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write_codec_file_bit(1, 1, 3);//CR1.DACSEL->1
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write_codec_file_bit(5, 0, 5);//PMR1.SB_MIX->0
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mdelay(100);
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write_codec_file_bit(5, 0, 6);//PMR1.SB_OUT->0
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write_codec_file_bit(5, 0, 7);//PMR1.SB_DAC->0
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write_codec_file_bit(1, 1, 7);//CR1.SB_MICBIAS->1
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mdelay(100);
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write_codec_file_bit(1, 0, 5);//DAC_MUTE->0
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}
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/* unset Audio data replay */
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void unset_audio_data_replay(void)
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{
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write_codec_file_bit(1, 1, 5);//DAC_MUTE->1
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mdelay(200);
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write_codec_file_bit(5, 1, 6);//SB_OUT->1
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write_codec_file_bit(5, 1, 7);//SB_DAC->1
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write_codec_file_bit(5, 1, 4);//SB_MIX->1
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write_codec_file_bit(6, 1, 0);//SB_SLEEP->1
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write_codec_file_bit(6, 1, 1);//SB->1
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write_codec_file(9, 0xff);
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write_codec_file(8, 0x3f);
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}
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/* set Record MIC input audio without playback */
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static void set_record_mic_input_audio_without_playback(void)
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{
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/* ADC path for MIC IN */
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write_codec_file_bit(1, 1, 2);
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write_codec_file_bit(1, 0, 7);//CR1.SB_MICBIAS->0
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//write_codec_file_bit(1, 1, 6);//CR1.MONO->1
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write_codec_file(22, 0x40);//mic 1
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write_codec_file_bit(23, 0, 7);//AGC1.AGC_EN->0
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write_codec_file_bit(3, 1, 7);//CR1.HP_DIS->1
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write_codec_file_bit(5, 1, 3);//PMR1.SB_LIN->1
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write_codec_file_bit(5, 1, 0);//PMR1.SB_IND->1
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write_codec_file_bit(1, 0, 2);//CR1.BYPASS->0
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write_codec_file_bit(1, 0, 3);//CR1.DACSEL->0
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write_codec_file_bit(6, 1, 3);// gain set
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write_codec_file_bit(5, 0, 5);//PMR1.SB_MIX->0
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mdelay(100);
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write_codec_file_bit(5, 0, 6);//PMR1.SB_OUT->0
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write_codec_file(1, 0x4);
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}
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/* unset Record MIC input audio without playback */
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static void unset_record_mic_input_audio_without_playback(void)
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{
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/* ADC path for MIC IN */
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write_codec_file_bit(5, 1, 4);//SB_ADC->1
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write_codec_file_bit(1, 1, 7);//CR1.SB_MICBIAS->1
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write_codec_file(22, 0xc0);//CR3.SB_MIC1
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}
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#if 0
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static irqreturn_t aic_codec_irq(int irq, void *dev_id)
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{
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u8 file_9 = read_codec_file(9);
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u8 file_8 = read_codec_file(8);
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//printk("--- 8:0x%x 9:0x%x ---\n",file_8,file_9);
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if ((file_9 & 0x1f) == 0x10) {
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// have hp short circuit
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write_codec_file(8, 0x3f);//mask all interrupt
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write_codec_file_bit(5, 1, 6);//SB_OUT->1
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mdelay(300);
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while ((read_codec_file(9) & 0x4) != 0x4);
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while ((read_codec_file(9) & 0x10) == 0x10) {
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write_codec_file(9, 0x10);
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}
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write_codec_file_bit(5, 0, 6);//SB_OUT->0
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mdelay(300);
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while ((read_codec_file(9) & 0x8) != 0x8);
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write_codec_file(9, file_9);
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write_codec_file(8, file_8);
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return IRQ_HANDLED;
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}
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if (file_9 & 0x8)
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ramp_up_end = jiffies;
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else if (file_9 & 0x4)
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ramp_down_end = jiffies;
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else if (file_9 & 0x2)
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gain_up_end = jiffies;
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else if (file_9 & 0x1)
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gain_down_end = jiffies;
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write_codec_file(9, file_9);
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if (file_9 & 0xf)
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wake_up(&pop_wait_queue);
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while (REG_ICDC_RGDATA & 0x100);
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return IRQ_HANDLED;
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}
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#else
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static irqreturn_t aic_codec_irq(int irq, void *dev_id)
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{
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u8 file_9 = read_codec_file(9);
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u8 file_8 = read_codec_file(8);
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//printk("--- 1 8:0x%x 9:0x%x ---\n",file_8,file_9);
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if ((file_9 & 0x1f) == 0x10) {
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write_codec_file(8, 0x3f);
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write_codec_file_bit(5, 1, 6);//SB_OUT->1
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mdelay(300);
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while ((read_codec_file(9) & 0x4) != 0x4);
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while ((read_codec_file(9) & 0x10) == 0x10) {
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write_codec_file(9, 0x10);
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}
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write_codec_file_bit(5, 0, 6);//SB_OUT->0
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mdelay(300);
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while ((read_codec_file(9) & 0x8) != 0x8);
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write_codec_file(9, file_9);
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write_codec_file(8, file_8);
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return IRQ_HANDLED;
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}
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/*if (file_9 & 0x8)
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ramp_up_end = jiffies;
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else if (file_9 & 0x4)
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ramp_down_end = jiffies;
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else if (file_9 & 0x2)
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gain_up_end = jiffies;
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else if (file_9 & 0x1)
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gain_down_end = jiffies;*/
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write_codec_file(9, file_9);
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/*if (file_9 & 0xf)
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wake_up(&pop_wait_queue);*/
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while (REG_ICDC_RGDATA & 0x100);
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return IRQ_HANDLED;
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}
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#endif
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static int jzdlv_reset(struct snd_soc_codec *codec)
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{
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/* reset DLV codec. from hibernate mode to sleep mode */
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write_codec_file(0, 0xf);
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write_codec_file_bit(6, 0, 0);
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write_codec_file_bit(6, 0, 1);
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mdelay(200);
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//write_codec_file(0, 0xf);
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write_codec_file_bit(5, 0, 7);//PMR1.SB_DAC->0
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write_codec_file_bit(5, 0, 4);//PMR1.SB_ADC->0
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mdelay(10);//wait for stability
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return 0;
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}
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#if 0
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static int jzdlv_sync(struct snd_soc_codec *codec)
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{
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u16 *cache = codec->reg_cache;
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int i, r = 0;
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for (i = 0; i < JZDLV_CACHEREGNUM; i++)
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r |= jzdlv_write(codec, i, cache[i]);
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return r;
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};
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#endif
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static const struct snd_kcontrol_new jzdlv_snd_controls[] = {
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//SOC_DOUBLE_R("Master Playback Volume", 1, 1, 0, 3, 0),
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SOC_DOUBLE_R("Master Playback Volume", DLV_CGR8, DLV_CGR9, 0, 31, 0),
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//SOC_DOUBLE_R("MICBG", ICODEC_2_LOW, ICODEC_2_LOW, 4, 3, 0),
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//SOC_DOUBLE_R("Line", 2, 2, 0, 31, 0),
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SOC_DOUBLE_R("Line", DLV_CGR10, DLV_CGR10, 0, 15, 0),
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};
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/* add non dapm controls */
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static int jzdlv_add_controls(struct snd_soc_codec *codec)
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{
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int err, i;
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for (i = 0; i < ARRAY_SIZE(jzdlv_snd_controls); i++) {
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err = snd_ctl_add(codec->card,
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snd_soc_cnew(&jzdlv_snd_controls[i], codec, NULL));
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if (err < 0)
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return err;
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}
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return 0;
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}
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/* Output Mixer */
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static const struct snd_kcontrol_new jzdlv_output_mixer_controls[] = {
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SOC_DAPM_SINGLE("Line Bypass Switch", 0x04, 3, 1, 0),
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SOC_DAPM_SINGLE("Mic Sidetone Switch", 0x04, 5, 1, 0),
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SOC_DAPM_SINGLE("HiFi Playback Switch", 0x04, 4, 1, 0),
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};
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/* Input mux */
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static const struct snd_kcontrol_new jzdlv_input_mux_controls =
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SOC_DAPM_ENUM("Input Select", jzdlv_enum[0]);
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static const struct snd_soc_dapm_widget jzdlv_dapm_widgets[] = {
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SND_SOC_DAPM_MIXER("Output Mixer", 0x06, 4, 1,
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&jzdlv_output_mixer_controls[0],
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ARRAY_SIZE(jzdlv_output_mixer_controls)),
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//SND_SOC_DAPM_DAC("DAC", "HiFi Playback", 0x06, 3, 1),
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SND_SOC_DAPM_OUTPUT("LOUT"),
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SND_SOC_DAPM_OUTPUT("LHPOUT"),
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SND_SOC_DAPM_OUTPUT("ROUT"),
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SND_SOC_DAPM_OUTPUT("RHPOUT"),
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//SND_SOC_DAPM_ADC("ADC", "HiFi Capture", 0x06, 2, 1),
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SND_SOC_DAPM_MUX("Input Mux", SND_SOC_NOPM, 0, 0, &jzdlv_input_mux_controls),
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SND_SOC_DAPM_PGA("Line Input", 0x06, 0, 1, NULL, 0),
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SND_SOC_DAPM_MICBIAS("Mic Bias", 0x06, 1, 1),
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SND_SOC_DAPM_INPUT("MICIN"),
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SND_SOC_DAPM_INPUT("RLINEIN"),
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SND_SOC_DAPM_INPUT("LLINEIN"),
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};
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static const struct snd_soc_dapm_route intercon[] = {
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/* output mixer */
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{"Output Mixer", "Line Bypass Switch", "Line Input"},
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{"Output Mixer", "HiFi Playback Switch", "DAC"},
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{"Output Mixer", "Mic Sidetone Switch", "Mic Bias"},
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/* outputs */
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{"RHPOUT", NULL, "Output Mixer"},
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{"ROUT", NULL, "Output Mixer"},
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{"LHPOUT", NULL, "Output Mixer"},
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{"LOUT", NULL, "Output Mixer"},
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/* input mux */
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{"Input Mux", "Line In", "Line Input"},
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{"Input Mux", "Mic", "Mic Bias"},
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{"ADC", NULL, "Input Mux"},
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/* inputs */
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{"Line Input", NULL, "LLINEIN"},
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{"Line Input", NULL, "RLINEIN"},
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{"Mic Bias", NULL, "MICIN"},
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};
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static void init_codec(void)
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{
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/* reset DLV codec. from hibernate mode to sleep mode */
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write_codec_file(0, 0xf);
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write_codec_file_bit(6, 0, 0);
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write_codec_file_bit(6, 0, 1);
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mdelay(200);
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//write_codec_file(0, 0xf);
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write_codec_file_bit(5, 0, 7);//PMR1.SB_DAC->0
|
|
write_codec_file_bit(5, 0, 4);//PMR1.SB_ADC->0
|
|
mdelay(10);//wait for stability
|
|
}
|
|
|
|
static int jzdlv_add_widgets(struct snd_soc_codec *codec)
|
|
{
|
|
snd_soc_dapm_new_controls(codec, jzdlv_dapm_widgets,
|
|
ARRAY_SIZE(jzdlv_dapm_widgets));
|
|
|
|
snd_soc_dapm_add_routes(codec, intercon, ARRAY_SIZE(intercon));
|
|
|
|
snd_soc_dapm_new_widgets(codec);
|
|
return 0;
|
|
}
|
|
|
|
static int jzdlv_hw_params(struct snd_pcm_substream *substream,
|
|
struct snd_pcm_hw_params *params)
|
|
{
|
|
struct snd_soc_pcm_runtime *rtd = substream->private_data;
|
|
struct snd_soc_device *socdev = rtd->socdev;
|
|
struct snd_soc_codec *codec = socdev->codec;
|
|
int speed = 0;
|
|
int val = 0;
|
|
|
|
/* sample channel */
|
|
switch (params_channels(params)) {
|
|
case 1:
|
|
write_codec_file_bit(1, 1, 6);//CR1.MONO->1 for Mono
|
|
break;
|
|
case 2:
|
|
write_codec_file_bit(1, 0, 6);//CR1.MONO->0 for Stereo
|
|
break;
|
|
}
|
|
/* sample rate */
|
|
switch (params_rate(params)) {
|
|
case 8000:
|
|
speed = 10;
|
|
break;
|
|
case 9600:
|
|
speed = 9;
|
|
break;
|
|
case 11025:
|
|
speed = 8;
|
|
break;
|
|
case 12000:
|
|
speed = 7;
|
|
break;
|
|
case 16000:
|
|
speed = 6;
|
|
break;
|
|
case 22050:
|
|
speed = 5;
|
|
break;
|
|
case 24000:
|
|
speed = 4;
|
|
break;
|
|
case 32000:
|
|
speed = 3;
|
|
break;
|
|
case 44100:
|
|
speed = 2;
|
|
break;
|
|
case 48000:
|
|
speed = 1;
|
|
break;
|
|
case 96000:
|
|
speed = 0;
|
|
break;
|
|
default:
|
|
printk(" invalid rate :0x%08x\n",params_rate(params));
|
|
}
|
|
|
|
val = (speed << 4) | speed;
|
|
jzdlv_write(codec, DLV_CCR2, val);
|
|
|
|
return 0;
|
|
}
|
|
|
|
static int jzdlv_pcm_trigger(struct snd_pcm_substream *substream, int cmd)
|
|
{
|
|
int ret = 0;
|
|
//struct snd_soc_pcm_runtime *rtd = substream->private_data;
|
|
//struct snd_soc_device *socdev = rtd->socdev;
|
|
//struct snd_soc_codec *codec = socdev->codec;
|
|
|
|
switch (cmd) {
|
|
case SNDRV_PCM_TRIGGER_START:
|
|
//case SNDRV_PCM_TRIGGER_RESUME:
|
|
//case SNDRV_PCM_TRIGGER_PAUSE_RELEASE:
|
|
init_codec();
|
|
if (substream->stream == SNDRV_PCM_STREAM_PLAYBACK) {
|
|
REG_AIC_I2SCR = 0x10;
|
|
mdelay(1);
|
|
set_audio_data_replay();
|
|
mdelay(5);
|
|
write_codec_file_bit(5, 0, 7);//PMR1.SB_DAC->0
|
|
__aic_flush_fifo();
|
|
} else {
|
|
set_record_mic_input_audio_without_playback();
|
|
mdelay(10);
|
|
REG_AIC_I2SCR = 0x10;
|
|
mdelay(20);
|
|
__aic_flush_fifo();
|
|
write_codec_file_bit(5, 1, 7);
|
|
}
|
|
|
|
break;
|
|
|
|
case SNDRV_PCM_TRIGGER_STOP:
|
|
//case SNDRV_PCM_TRIGGER_SUSPEND:
|
|
//case SNDRV_PCM_TRIGGER_PAUSE_PUSH:
|
|
|
|
if (substream->stream == SNDRV_PCM_STREAM_PLAYBACK) {
|
|
unset_audio_data_replay();
|
|
} else {
|
|
unset_record_mic_input_audio_without_playback();
|
|
}
|
|
break;
|
|
|
|
default:
|
|
ret = -EINVAL;
|
|
}
|
|
|
|
return ret;
|
|
}
|
|
|
|
static int jzdlv_pcm_prepare(struct snd_pcm_substream *substream)
|
|
{
|
|
/*struct snd_soc_pcm_runtime *rtd = substream->private_data;
|
|
struct snd_soc_device *socdev = rtd->socdev;
|
|
struct snd_soc_codec *codec = socdev->codec; */
|
|
|
|
return 0;
|
|
}
|
|
|
|
static void jzdlv_shutdown(struct snd_pcm_substream *substream)
|
|
{
|
|
struct snd_soc_pcm_runtime *rtd = substream->private_data;
|
|
struct snd_soc_device *socdev = rtd->socdev;
|
|
struct snd_soc_codec *codec = socdev->codec;
|
|
|
|
/* deactivate */
|
|
if (!codec->active) {
|
|
udelay(50);
|
|
}
|
|
}
|
|
|
|
static int jzdlv_mute(struct snd_soc_dai *dai, int mute)
|
|
{
|
|
struct snd_soc_codec *codec = dai->codec;
|
|
u16 reg_val = jzdlv_read_reg_cache(codec, 2/*DLV_1_LOW*/);
|
|
|
|
if (mute != 0)
|
|
mute = 1;
|
|
if (mute)
|
|
reg_val = reg_val | (0x1 << 14);
|
|
else
|
|
reg_val = reg_val & ~(0x1 << 14);
|
|
|
|
//jzdlv_write(codec, DLV_1_LOW, reg_val);
|
|
return 0;
|
|
}
|
|
|
|
static int jzdlv_set_dai_sysclk(struct snd_soc_dai *codec_dai,
|
|
int clk_id, unsigned int freq, int dir)
|
|
{
|
|
struct snd_soc_codec *codec = codec_dai->codec;
|
|
struct jzdlv_priv *jzdlv = codec->private_data;
|
|
|
|
jzdlv->sysclk = freq;
|
|
return 0;
|
|
}
|
|
/*
|
|
* Set's ADC and Voice DAC format. called by apus_hw_params() in apus.c
|
|
*/
|
|
static int jzdlv_set_dai_fmt(struct snd_soc_dai *codec_dai,
|
|
unsigned int fmt)
|
|
{
|
|
/* struct snd_soc_codec *codec = codec_dai->codec; */
|
|
|
|
/* set master/slave audio interface. codec side */
|
|
switch (fmt & SND_SOC_DAIFMT_MASTER_MASK) {
|
|
case SND_SOC_DAIFMT_CBM_CFM:
|
|
/* set master mode for codec */
|
|
break;
|
|
case SND_SOC_DAIFMT_CBS_CFS:
|
|
/* set slave mode for codec */
|
|
break;
|
|
default:
|
|
return -EINVAL;
|
|
}
|
|
|
|
/* interface format . set some parameter for codec side */
|
|
switch (fmt & SND_SOC_DAIFMT_FORMAT_MASK) {
|
|
case SND_SOC_DAIFMT_I2S:
|
|
/* set I2S mode for codec */
|
|
break;
|
|
case SND_SOC_DAIFMT_RIGHT_J:
|
|
/* set right J mode */
|
|
break;
|
|
case SND_SOC_DAIFMT_LEFT_J:
|
|
/* set left J mode */
|
|
break;
|
|
case SND_SOC_DAIFMT_DSP_A:
|
|
/* set dsp A mode */
|
|
break;
|
|
case SND_SOC_DAIFMT_DSP_B:
|
|
/* set dsp B mode */
|
|
break;
|
|
default:
|
|
return -EINVAL;
|
|
}
|
|
|
|
/* clock inversion. codec side */
|
|
switch (fmt & SND_SOC_DAIFMT_INV_MASK) {
|
|
case SND_SOC_DAIFMT_NB_NF:
|
|
break;
|
|
case SND_SOC_DAIFMT_IB_IF:
|
|
break;
|
|
case SND_SOC_DAIFMT_IB_NF:
|
|
break;
|
|
case SND_SOC_DAIFMT_NB_IF:
|
|
break;
|
|
default:
|
|
return -EINVAL;
|
|
}
|
|
|
|
/* jzcodec_write(codec, 0, val); */
|
|
return 0;
|
|
}
|
|
|
|
static int jzdlv_dapm_event(struct snd_soc_codec *codec, int event)
|
|
{
|
|
/* u16 reg_val; */
|
|
|
|
switch (event) {
|
|
case SNDRV_CTL_POWER_D0: /* full On */
|
|
/* vref/mid, osc on, dac unmute */
|
|
/* u16 reg_val = jzcodec_read_reg_cache(codec, ICODEC_1_LOW); */
|
|
/* jzcodec_write(codec, 0, val); */
|
|
break;
|
|
case SNDRV_CTL_POWER_D1: /* partial On */
|
|
case SNDRV_CTL_POWER_D2: /* partial On */
|
|
break;
|
|
case SNDRV_CTL_POWER_D3hot: /* Off, with power */
|
|
/* everything off except vref/vmid, */
|
|
/*reg_val = 0x0800;
|
|
jzcodec_write_reg_cache(codec, ICODEC_1_LOW, reg_val);
|
|
reg_val = 0x0017;
|
|
jzcodec_write_reg_cache(codec, ICODEC_1_HIGH, reg_val);
|
|
REG_ICDC_CDCCR1 = jzcodec_reg[0];
|
|
mdelay(2);
|
|
reg_val = 0x2102;
|
|
jzcodec_write_reg_cache(codec, ICODEC_1_LOW, reg_val);
|
|
reg_val = 0x001f;
|
|
jzcodec_write_reg_cache(codec, ICODEC_1_HIGH, reg_val);
|
|
REG_ICDC_CDCCR1 = jzcodec_reg[0];
|
|
mdelay(2);
|
|
reg_val = 0x3302;
|
|
jzcodec_write_reg_cache(codec, ICODEC_1_LOW, reg_val);
|
|
reg_val = 0x0003;
|
|
jzcodec_write_reg_cache(codec, ICODEC_1_HIGH, reg_val);
|
|
REG_ICDC_CDCCR1 = jzcodec_reg[0];*/
|
|
break;
|
|
case SNDRV_CTL_POWER_D3cold: /* Off, without power */
|
|
/* everything off, dac mute, inactive */
|
|
/*reg_val = 0x2302;
|
|
jzcodec_write(codec, ICODEC_1_LOW, reg_val);
|
|
reg_val = 0x001b;
|
|
jzcodec_write(codec, ICODEC_1_HIGH, reg_val);
|
|
mdelay(1);
|
|
reg_val = 0x2102;
|
|
jzcodec_write(codec, ICODEC_1_LOW, reg_val);
|
|
reg_val = 0x001b;
|
|
jzcodec_write(codec, ICODEC_1_HIGH, reg_val);*/
|
|
break;
|
|
}
|
|
//codec->dapm_state = event;
|
|
return 0;
|
|
}
|
|
|
|
#define JZDLV_RATES (SNDRV_PCM_RATE_8000 | SNDRV_PCM_RATE_11025 |\
|
|
SNDRV_PCM_RATE_16000 | SNDRV_PCM_RATE_22050 |\
|
|
SNDRV_PCM_RATE_32000 | SNDRV_PCM_RATE_44100 |\
|
|
SNDRV_PCM_RATE_48000 | SNDRV_PCM_RATE_12000 |\
|
|
SNDRV_PCM_RATE_24000)
|
|
|
|
#define JZDLV_FORMATS (SNDRV_PCM_FORMAT_S8 | SNDRV_PCM_FMTBIT_S16_LE)
|
|
|
|
struct snd_soc_dai jzdlv_dai = {
|
|
.name = "JZDLV",
|
|
.playback = {
|
|
.stream_name = "Playback",
|
|
.channels_min = 1,
|
|
.channels_max = 2,
|
|
.rates = JZDLV_RATES,
|
|
.formats = JZDLV_FORMATS,},
|
|
.capture = {
|
|
.stream_name = "Capture",
|
|
.channels_min = 1,
|
|
.channels_max = 2,
|
|
.rates = JZDLV_RATES,
|
|
.formats = JZDLV_FORMATS,},
|
|
.ops = {
|
|
.trigger = jzdlv_pcm_trigger,
|
|
.prepare = jzdlv_pcm_prepare,
|
|
.hw_params = jzdlv_hw_params,
|
|
.shutdown = jzdlv_shutdown,
|
|
},
|
|
.dai_ops = {
|
|
.digital_mute = jzdlv_mute,
|
|
.set_sysclk = jzdlv_set_dai_sysclk,
|
|
.set_fmt = jzdlv_set_dai_fmt,
|
|
}
|
|
};
|
|
EXPORT_SYMBOL_GPL(jzdlv_dai);
|
|
|
|
#ifdef CONFIG_PM
|
|
static int jzdlv_suspend(struct platform_device *pdev, pm_message_t state)
|
|
{
|
|
#if 0
|
|
struct snd_soc_device *socdev = platform_get_drvdata(pdev);
|
|
struct snd_soc_codec *codec = socdev->codec;
|
|
jzcodec_reg_pm[ICODEC_1_LOW] = jzcodec_read_reg_cache(codec, ICODEC_1_LOW);
|
|
jzcodec_reg_pm[ICODEC_1_HIGH] = jzcodec_read_reg_cache(codec, ICODEC_1_HIGH);
|
|
jzcodec_reg_pm[ICODEC_2_LOW] = jzcodec_read_reg_cache(codec, ICODEC_2_LOW);
|
|
jzcodec_reg_pm[ICODEC_2_HIGH] = jzcodec_read_reg_cache(codec, ICODEC_2_HIGH);
|
|
|
|
jzcodec_dapm_event(codec, SNDRV_CTL_POWER_D3cold);
|
|
#endif
|
|
return 0;
|
|
}
|
|
|
|
static int jzdlv_resume(struct platform_device *pdev)
|
|
{
|
|
#if 0
|
|
struct snd_soc_device *socdev = platform_get_drvdata(pdev);
|
|
struct snd_soc_codec *codec = socdev->codec;
|
|
u16 reg_val;
|
|
|
|
jzcodec_dapm_event(codec, SNDRV_CTL_POWER_D3hot);
|
|
reg_val = jzcodec_reg_pm[ICODEC_1_LOW];
|
|
jzcodec_write(codec, ICODEC_1_LOW, reg_val);
|
|
reg_val = jzcodec_reg_pm[ICODEC_1_HIGH];
|
|
jzcodec_write(codec, ICODEC_1_HIGH, reg_val);
|
|
reg_val = jzcodec_reg_pm[ICODEC_2_LOW];
|
|
jzcodec_write(codec, ICODEC_2_LOW, reg_val);
|
|
reg_val = jzcodec_reg_pm[ICODEC_2_HIGH];
|
|
jzcodec_write(codec, ICODEC_2_HIGH, reg_val);
|
|
|
|
jzcodec_dapm_event(codec, codec->suspend_dapm_state);
|
|
#endif
|
|
return 0;
|
|
}
|
|
#else
|
|
#define jzdlv_suspend NULL
|
|
#define jzdlv_resume NULL
|
|
#endif
|
|
/*
|
|
* initialise the JZDLV driver
|
|
* register the mixer and dsp interfaces with the kernel
|
|
*/
|
|
static int jzdlv_init(struct snd_soc_device *socdev)
|
|
{
|
|
struct snd_soc_codec *codec = socdev->codec;
|
|
int ret = 0, retval;
|
|
|
|
/*REG_CPM_CPCCR &= ~(1 << 31);
|
|
REG_CPM_CPCCR &= ~(1 << 30);*/
|
|
write_codec_file(0, 0xf);
|
|
|
|
REG_AIC_I2SCR = 0x10;
|
|
__i2s_internal_codec();
|
|
__i2s_as_slave();
|
|
__i2s_select_i2s();
|
|
__aic_select_i2s();
|
|
__aic_reset();
|
|
mdelay(10);
|
|
REG_AIC_I2SCR = 0x10;
|
|
mdelay(20);
|
|
|
|
/* power on DLV */
|
|
write_codec_file(8, 0x3f);
|
|
write_codec_file(9, 0xff);
|
|
mdelay(10);
|
|
|
|
__cpm_start_idct();
|
|
__cpm_start_db();
|
|
__cpm_start_me();
|
|
__cpm_start_mc();
|
|
__cpm_start_ipu();
|
|
|
|
codec->name = "JZDLV";
|
|
codec->owner = THIS_MODULE;
|
|
codec->read = jzdlv_read_reg_cache;
|
|
codec->write = jzdlv_write;
|
|
//codec->dapm_event = jzdlv_dapm_event;
|
|
codec->dai = &jzdlv_dai;
|
|
codec->num_dai = 1;
|
|
codec->reg_cache_size = sizeof(jzdlv_reg);
|
|
codec->reg_cache = kmemdup(jzdlv_reg, sizeof(jzdlv_reg), GFP_KERNEL);
|
|
if (codec->reg_cache == NULL)
|
|
return -ENOMEM;
|
|
|
|
jzdlv_reset(codec);
|
|
/* register pcms */
|
|
ret = snd_soc_new_pcms(socdev, SNDRV_DEFAULT_IDX1, SNDRV_DEFAULT_STR1);
|
|
if (ret < 0) {
|
|
printk(KERN_ERR "jzdlv: failed to create pcms\n");
|
|
goto pcm_err;
|
|
}
|
|
|
|
/* power on device */
|
|
jzdlv_dapm_event(codec, SNDRV_CTL_POWER_D3hot);
|
|
jzdlv_add_controls(codec);
|
|
jzdlv_add_widgets(codec);
|
|
ret = snd_soc_register_card(socdev);
|
|
if (ret < 0) {
|
|
printk(KERN_ERR "jzcodec: failed to register card\n");
|
|
goto card_err;
|
|
}
|
|
|
|
mdelay(10);
|
|
REG_AIC_I2SCR = 0x10;
|
|
mdelay(20);
|
|
/* power on DLV */
|
|
write_codec_file(9, 0xff);
|
|
write_codec_file(8, 0x3f);
|
|
retval = request_irq(IRQ_AIC, aic_codec_irq, IRQF_DISABLED, "aic_codec_irq", NULL);
|
|
if (retval) {
|
|
printk("Could not get aic codec irq %d\n", IRQ_AIC);
|
|
return retval;
|
|
}
|
|
|
|
printk_codec_files();
|
|
|
|
return ret;
|
|
|
|
card_err:
|
|
snd_soc_free_pcms(socdev);
|
|
snd_soc_dapm_free(socdev);
|
|
pcm_err:
|
|
kfree(codec->reg_cache);
|
|
return ret;
|
|
}
|
|
|
|
static struct snd_soc_device *jzdlv_socdev;
|
|
|
|
static int write_codec_reg(u16 * add, char * name, int reg)
|
|
{
|
|
write_codec_file(reg, *add);
|
|
return 0;
|
|
}
|
|
|
|
static int jzdlv_probe(struct platform_device *pdev)
|
|
{
|
|
struct snd_soc_device *socdev = platform_get_drvdata(pdev);
|
|
struct snd_soc_codec *codec;
|
|
struct jzdlv_priv *jzdlv;
|
|
int ret = 0;
|
|
|
|
codec = kzalloc(sizeof(struct snd_soc_codec), GFP_KERNEL);
|
|
if (codec == NULL)
|
|
return -ENOMEM;
|
|
|
|
jzdlv = kzalloc(sizeof(struct jzdlv_priv), GFP_KERNEL);
|
|
if (jzdlv == NULL) {
|
|
kfree(codec);
|
|
return -ENOMEM;
|
|
}
|
|
|
|
codec->private_data = jzdlv;
|
|
socdev->codec = codec;
|
|
mutex_init(&codec->mutex);
|
|
INIT_LIST_HEAD(&codec->dapm_widgets);
|
|
INIT_LIST_HEAD(&codec->dapm_paths);
|
|
|
|
jzdlv_socdev = socdev;
|
|
|
|
/* Add other interfaces here ,no I2C connection */
|
|
codec->hw_write = (hw_write_t)write_codec_reg;
|
|
//codec->hw_read = (hw_read_t)read_codec_reg;
|
|
ret = jzdlv_init(jzdlv_socdev);
|
|
|
|
if (ret < 0) {
|
|
codec = jzdlv_socdev->codec;
|
|
err("failed to initialise jzdlv\n");
|
|
kfree(codec);
|
|
}
|
|
|
|
return ret;
|
|
}
|
|
|
|
/* power down chip */
|
|
static int jzdlv_remove(struct platform_device *pdev)
|
|
{
|
|
struct snd_soc_device *socdev = platform_get_drvdata(pdev);
|
|
struct snd_soc_codec *codec = socdev->codec;
|
|
|
|
if (codec->control_data)
|
|
jzdlv_dapm_event(codec, SNDRV_CTL_POWER_D3cold);
|
|
|
|
snd_soc_free_pcms(socdev);
|
|
snd_soc_dapm_free(socdev);
|
|
kfree(codec->private_data);
|
|
kfree(codec);
|
|
|
|
return 0;
|
|
}
|
|
|
|
struct snd_soc_codec_device soc_codec_dev_jzdlv = {
|
|
.probe = jzdlv_probe,
|
|
.remove = jzdlv_remove,
|
|
.suspend = jzdlv_suspend,
|
|
.resume = jzdlv_resume,
|
|
};
|
|
|
|
EXPORT_SYMBOL_GPL(soc_codec_dev_jzdlv);
|
|
|
|
MODULE_DESCRIPTION("ASoC JZDLV driver");
|
|
MODULE_AUTHOR("Richard");
|
|
MODULE_LICENSE("GPL");
|