mirror of
git://projects.qi-hardware.com/openwrt-xburst.git
synced 2024-11-18 07:22:50 +02:00
c155089844
Before it was tried to initialize the deactivated PCIe core in client mode, but this causes the SoC to hang. Just do not initialize it at all and ignore the core it is not working and nothing is connected to it when the specific bit is set in the boardflags. git-svn-id: svn://svn.openwrt.org/openwrt/trunk@33620 3c298f89-4303-0410-b956-a3cf2f4a3e73
105 lines
2.7 KiB
Diff
105 lines
2.7 KiB
Diff
--- a/drivers/bcma/driver_pci_host.c
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+++ b/drivers/bcma/driver_pci_host.c
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@@ -94,19 +94,19 @@ static int bcma_extpci_read_config(struc
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if (dev == 0) {
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/* we support only two functions on device 0 */
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if (func > 1)
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- return -EINVAL;
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+ goto out;
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/* accesses to config registers with offsets >= 256
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* requires indirect access.
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*/
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if (off >= PCI_CONFIG_SPACE_SIZE) {
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addr = (func << 12);
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- addr |= (off & 0x0FFF);
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+ addr |= (off & 0x0FFC);
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val = bcma_pcie_read_config(pc, addr);
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} else {
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addr = BCMA_CORE_PCI_PCICFG0;
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addr |= (func << 8);
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- addr |= (off & 0xfc);
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+ addr |= (off & 0xFC);
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val = pcicore_read32(pc, addr);
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}
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} else {
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@@ -122,8 +122,6 @@ static int bcma_extpci_read_config(struc
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val = 0xffffffff;
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goto unmap;
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}
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-
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- val = readl(mmio);
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}
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val >>= (8 * (off & 3));
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@@ -151,7 +149,7 @@ static int bcma_extpci_write_config(stru
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const void *buf, int len)
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{
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int err = -EINVAL;
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- u32 addr = 0, val = 0;
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+ u32 addr, val;
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void __iomem *mmio = 0;
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u16 chipid = pc->core->bus->chipinfo.id;
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@@ -159,16 +157,22 @@ static int bcma_extpci_write_config(stru
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if (unlikely(len != 1 && len != 2 && len != 4))
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goto out;
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if (dev == 0) {
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+ /* we support only two functions on device 0 */
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+ if (func > 1)
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+ goto out;
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+
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/* accesses to config registers with offsets >= 256
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* requires indirect access.
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*/
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- if (off < PCI_CONFIG_SPACE_SIZE) {
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- addr = pc->core->addr + BCMA_CORE_PCI_PCICFG0;
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+ if (off >= PCI_CONFIG_SPACE_SIZE) {
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+ addr = (func << 12);
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+ addr |= (off & 0x0FFC);
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+ val = bcma_pcie_read_config(pc, addr);
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+ } else {
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+ addr = BCMA_CORE_PCI_PCICFG0;
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addr |= (func << 8);
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- addr |= (off & 0xfc);
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- mmio = ioremap_nocache(addr, sizeof(val));
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- if (!mmio)
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- goto out;
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+ addr |= (off & 0xFC);
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+ val = pcicore_read32(pc, addr);
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}
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} else {
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addr = bcma_get_cfgspace_addr(pc, dev, func, off);
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@@ -187,12 +191,10 @@ static int bcma_extpci_write_config(stru
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switch (len) {
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case 1:
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- val = readl(mmio);
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val &= ~(0xFF << (8 * (off & 3)));
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val |= *((const u8 *)buf) << (8 * (off & 3));
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break;
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case 2:
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- val = readl(mmio);
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val &= ~(0xFFFF << (8 * (off & 3)));
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val |= *((const u16 *)buf) << (8 * (off & 3));
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break;
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@@ -200,13 +202,14 @@ static int bcma_extpci_write_config(stru
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val = *((const u32 *)buf);
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break;
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}
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- if (dev == 0 && !addr) {
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+ if (dev == 0) {
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/* accesses to config registers with offsets >= 256
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* requires indirect access.
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*/
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- addr = (func << 12);
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- addr |= (off & 0x0FFF);
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- bcma_pcie_write_config(pc, addr, val);
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+ if (off >= PCI_CONFIG_SPACE_SIZE)
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+ bcma_pcie_write_config(pc, addr, val);
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+ else
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+ pcicore_write32(pc, addr, val);
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} else {
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writel(val, mmio);
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