mirror of
git://projects.qi-hardware.com/openwrt-xburst.git
synced 2024-11-25 10:42:48 +02:00
dc3d3f1c49
it's basically also provided by ingenic and nativly based on 2.6.27, adjusted to fit into the OpenWrt-environment
125 lines
4.3 KiB
C
125 lines
4.3 KiB
C
/*
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* linux/include/asm-mips/mach-jz4750/board-apus.h
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*
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* JZ4750-based APUS board ver 1.x definition.
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*
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* Copyright (C) 2008 Ingenic Semiconductor Inc.
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*
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* Author: <cwjia@ingenic.cn>
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*
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* This program is free software; you can redistribute it and/or modify
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* it under the terms of the GNU General Public License version 2 as
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* published by the Free Software Foundation.
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*/
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#ifndef __ASM_JZ4750_APUS_H__
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#define __ASM_JZ4750_APUS_H__
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/*======================================================================
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* Frequencies of on-board oscillators
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*/
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#define JZ_EXTAL 24000000 /* Main extal freq: 24 MHz */
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#define JZ_EXTAL2 32768 /* RTC extal freq: 32.768 KHz */
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/*======================================================================
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* GPIO
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*/
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#define GPIO_DISP_OFF_N (32*4+25) /* GPE25 */
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#define GPIO_SD0_VCC_EN_N (32*2+10) /* GPC10 */
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#define GPIO_SD0_CD_N (32*2+11) /* GPC11 */
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#define GPIO_SD0_WP (32*2+12) /* GPC12 */
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#define GPIO_SD1_VCC_EN_N (32*2+13) /* GPC13 */
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#define GPIO_SD1_CD_N (32*2+14) /* GPC14 */
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#define GPIO_USB_DETE (32*2+15) /* GPC15 */
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#define GPIO_DC_DETE_N (32*2+8) /* GPC8 */
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#define GPIO_CHARG_STAT_N (32*2+9) /* GPC9 */
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#define GPIO_LCD_VCC_EN_N (32*3+30) /* GPC10 */
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#define GPIO_LCD_PWM (32*4+24) /* GPE24 */
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#define GPIO_UDC_HOTPLUG GPIO_USB_DETE
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#define GPIO_NET_INT (32*2+6) /* GPC6 */
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#define GPIO_AMPEN_N (32*2+7)
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/*====================================================================
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* GPIO KEYS and ADKEYS
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*/
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#define GPIO_HOME (32*5+22) // SW3-GPF22
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#define GPIO_MENU (32*5+20) // SW5-GPF20
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#define GPIO_CALL (32*5+23) // SW2-GPF23
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#define GPIO_ENDCALL (32*2+31) // SW6-boot_sel1-GPC31
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#define GPIO_BACK (32*5+21) // SW4-GPF21
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#define GPIO_SW7 (32*2+30) // SW7-boot_sel0-GPC30
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#define GPIO_ADKEY_INT (32+30) // GPB30
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/*====================================================================
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* ADKEYS LEVEL
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*/
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#define DPAD_LEFT_LEVEL 225 //0.18105V, 225=0.18105/3.3*4096
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#define DPAD_DOWN_LEVEL 535 //0.4314V
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#define DPAD_UP_LEVEL 887 //0.7143V
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#define DPAD_CENTER_LEVEL 1422 //1.1456V
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#define DPAD_RIGHT_LEVEL 2333 //1.88V
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/*======================================================================
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* Analog input for VBAT is the battery voltage divided by CFG_PBAT_DIV.
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*/
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#define CFG_PBAT_DIV 4
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/*======================================================================
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* MMC/SD
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*/
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#define MSC0_WP_PIN GPIO_SD0_WP
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#define MSC0_HOTPLUG_PIN GPIO_SD0_CD_N
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#define MSC0_HOTPLUG_IRQ (IRQ_GPIO_0 + GPIO_SD0_CD_N)
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#define MSC1_WP_PIN GPIO_SD1_WP
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#define MSC1_HOTPLUG_PIN GPIO_SD1_CD_N
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#define MSC1_HOTPLUG_IRQ (IRQ_GPIO_0 + GPIO_SD1_CD_N)
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/*======================================================================
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* LCD backlight
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*/
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#define LCD_PWM_CHN 4 /* pwm channel */
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#define LCD_PWM_FULL 256
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/* 100 level: 0,1,...,100 */
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#define __lcd_set_backlight_level(n) \
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do { \
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__gpio_as_pwm(4); \
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__tcu_disable_pwm_output(LCD_PWM_CHN); \
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__tcu_stop_counter(LCD_PWM_CHN); \
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__tcu_init_pwm_output_high(LCD_PWM_CHN); \
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__tcu_set_pwm_output_shutdown_abrupt(LCD_PWM_CHN); \
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__tcu_select_clk_div1(LCD_PWM_CHN); \
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__tcu_mask_full_match_irq(LCD_PWM_CHN); \
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__tcu_mask_half_match_irq(LCD_PWM_CHN); \
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__tcu_set_count(LCD_PWM_CHN,0); \
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__tcu_set_full_data(LCD_PWM_CHN,__cpm_get_extalclk()/30000); \
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__tcu_set_half_data(LCD_PWM_CHN,__cpm_get_extalclk()/30000*n/(LCD_PWM_FULL-1)); \
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__tcu_enable_pwm_output(LCD_PWM_CHN); \
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__tcu_select_extalclk(LCD_PWM_CHN); \
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__tcu_start_counter(LCD_PWM_CHN); \
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} while (0)
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#define __lcd_close_backlight() \
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do { \
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__gpio_as_output(GPIO_LCD_PWM); \
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__gpio_clear_pin(GPIO_LCD_PWM); \
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} while (0)
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/*
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* The key interrupt pin is low voltage or fall edge acitve
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*/
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#define ACTIVE_LOW_HOME 1
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#define ACTIVE_LOW_MENU 1
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#define ACTIVE_LOW_BACK 1
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#define ACTIVE_LOW_CALL 1
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#define ACTIVE_LOW_ENDCALL 0
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#define ACTIVE_LOW_SW10 1
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#define ACTIVE_LOW_ADKEY 0
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#define ACTIVE_LOW_MSC0_CD 1 /* work when GPIO_SD1_CD_N is low */
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#define ACTIVE_LOW_MSC1_CD 0 /* work when GPIO_SD1_CD_N is high */
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#endif /* __ASM_JZ4750_APUS_H__ */
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