1
0
mirror of git://projects.qi-hardware.com/openwrt-xburst.git synced 2024-12-12 18:15:01 +02:00
openwrt-xburst/target/linux/xburst/files-2.6.32/arch/mips/jz4740/reset.c
lars d0f76caa10 [xburst] Add per board struct describing the external clock setup.
git-svn-id: svn://svn.openwrt.org/openwrt/trunk@19783 3c298f89-4303-0410-b956-a3cf2f4a3e73
2010-02-20 20:45:00 +00:00

53 lines
1.2 KiB
C

/*
* linux/arch/mips/jz4740/reset.c
*
* JZ4740 reset routines.
*
* Copyright (c) 2006-2007 Ingenic Semiconductor Inc.
* Author: <yliu@ingenic.cn>
*
* This program is free software; you can redistribute it and/or modify
* it under the terms of the GNU General Public License version 2 as
* published by the Free Software Foundation.
*/
#include <linux/sched.h>
#include <linux/mm.h>
#include <asm/io.h>
#include <asm/pgtable.h>
#include <asm/processor.h>
#include <asm/reboot.h>
#include <asm/system.h>
#include <asm/mach-jz4740/regs.h>
#include <asm/mach-jz4740/timer.h>
#include <asm/mach-jz4740/jz4740.h>
#include "clock.h"
void jz_restart(char *command)
{
printk(KERN_NOTICE "Restarting after 4 ms\n");
REG_WDT_TCSR = WDT_TCSR_PRESCALE4 | WDT_TCSR_EXT_EN;
REG_WDT_TCNT = 0;
REG_WDT_TDR = jz4740_clock_bdata.ext_rate / 1000; /* reset after 4ms */
jz4740_timer_enable_watchdog();
REG_WDT_TCER = WDT_TCER_TCEN; /* wdt start */
while (1);
}
void jz_halt(void)
{
/* Put CPU to power down mode */
while (!(REG_RTC_RCR & RTC_RCR_WRDY));
REG_RTC_HCR = RTC_HCR_PD;
while (1)
__asm__(".set\tmips3\n\t"
"wait\n\t"
".set\tmips0");
}
void jz_power_off(void)
{
jz_halt();
}