mirror of
git://projects.qi-hardware.com/openwrt-xburst.git
synced 2024-10-30 09:29:41 +02:00
284a2e1864
git-svn-id: svn://svn.openwrt.org/openwrt/trunk@12311 3c298f89-4303-0410-b956-a3cf2f4a3e73
153 lines
5.2 KiB
Diff
153 lines
5.2 KiB
Diff
--- a/drivers/ssb/driver_chipcommon.c
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+++ b/drivers/ssb/driver_chipcommon.c
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@@ -39,12 +39,14 @@
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ssb_write32(cc->dev, offset, value);
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}
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-static inline void chipco_write32_masked(struct ssb_chipcommon *cc, u16 offset,
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- u32 mask, u32 value)
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+static inline u32 chipco_write32_masked(struct ssb_chipcommon *cc, u16 offset,
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+ u32 mask, u32 value)
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{
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value &= mask;
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value |= chipco_read32(cc, offset) & ~mask;
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chipco_write32(cc, offset, value);
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+
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+ return value;
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}
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void ssb_chipco_set_clockmode(struct ssb_chipcommon *cc,
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@@ -355,16 +357,37 @@
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{
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return chipco_read32(cc, SSB_CHIPCO_GPIOIN) & mask;
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}
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+EXPORT_SYMBOL(ssb_chipco_gpio_in);
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+
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+u32 ssb_chipco_gpio_out(struct ssb_chipcommon *cc, u32 mask, u32 value)
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+{
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+ return chipco_write32_masked(cc, SSB_CHIPCO_GPIOOUT, mask, value);
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+}
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+EXPORT_SYMBOL(ssb_chipco_gpio_out);
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+
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+u32 ssb_chipco_gpio_outen(struct ssb_chipcommon *cc, u32 mask, u32 value)
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+{
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+ return chipco_write32_masked(cc, SSB_CHIPCO_GPIOOUTEN, mask, value);
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+}
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+EXPORT_SYMBOL(ssb_chipco_gpio_outen);
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+
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+u32 ssb_chipco_gpio_control(struct ssb_chipcommon *cc, u32 mask, u32 value)
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+{
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+ return chipco_write32_masked(cc, SSB_CHIPCO_GPIOCTL, mask, value);
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+}
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+EXPORT_SYMBOL(ssb_chipco_gpio_control);
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-void ssb_chipco_gpio_out(struct ssb_chipcommon *cc, u32 mask, u32 value)
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+u32 ssb_chipco_gpio_intmask(struct ssb_chipcommon *cc, u32 mask, u32 value)
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{
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- chipco_write32_masked(cc, SSB_CHIPCO_GPIOOUT, mask, value);
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+ return chipco_write32_masked(cc, SSB_CHIPCO_GPIOIRQ, mask, value);
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}
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+EXPORT_SYMBOL(ssb_chipco_gpio_intmask);
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-void ssb_chipco_gpio_outen(struct ssb_chipcommon *cc, u32 mask, u32 value)
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+u32 ssb_chipco_gpio_polarity(struct ssb_chipcommon *cc, u32 mask, u32 value)
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{
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- chipco_write32_masked(cc, SSB_CHIPCO_GPIOOUTEN, mask, value);
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+ return chipco_write32_masked(cc, SSB_CHIPCO_GPIOPOL, mask, value);
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}
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+EXPORT_SYMBOL(ssb_chipco_gpio_polarity);
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#ifdef CONFIG_SSB_SERIAL
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int ssb_chipco_serial_init(struct ssb_chipcommon *cc,
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--- a/drivers/ssb/driver_extif.c
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+++ b/drivers/ssb/driver_extif.c
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@@ -27,12 +27,14 @@
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ssb_write32(extif->dev, offset, value);
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}
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-static inline void extif_write32_masked(struct ssb_extif *extif, u16 offset,
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- u32 mask, u32 value)
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+static inline u32 extif_write32_masked(struct ssb_extif *extif, u16 offset,
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+ u32 mask, u32 value)
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{
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value &= mask;
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value |= extif_read32(extif, offset) & ~mask;
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extif_write32(extif, offset, value);
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+
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+ return value;
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}
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#ifdef CONFIG_SSB_SERIAL
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@@ -114,16 +116,30 @@
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{
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return extif_read32(extif, SSB_EXTIF_GPIO_IN) & mask;
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}
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+EXPORT_SYMBOL(ssb_extif_gpio_in);
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-void ssb_extif_gpio_out(struct ssb_extif *extif, u32 mask, u32 value)
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+u32 ssb_extif_gpio_out(struct ssb_extif *extif, u32 mask, u32 value)
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{
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return extif_write32_masked(extif, SSB_EXTIF_GPIO_OUT(0),
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mask, value);
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}
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+EXPORT_SYMBOL(ssb_extif_gpio_out);
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-void ssb_extif_gpio_outen(struct ssb_extif *extif, u32 mask, u32 value)
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+u32 ssb_extif_gpio_outen(struct ssb_extif *extif, u32 mask, u32 value)
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{
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return extif_write32_masked(extif, SSB_EXTIF_GPIO_OUTEN(0),
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mask, value);
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}
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+EXPORT_SYMBOL(ssb_extif_gpio_outen);
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+
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+u32 ssb_extif_gpio_polarity(struct ssb_extif *extif, u32 mask, u32 value)
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+{
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+ return extif_write32_masked(extif, SSB_EXTIF_GPIO_INTPOL, mask, value);
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+}
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+EXPORT_SYMBOL(ssb_extif_gpio_polarity);
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+u32 ssb_extif_gpio_intmask(struct ssb_extif *extif, u32 mask, u32 value)
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+{
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+ return extif_write32_masked(extif, SSB_EXTIF_GPIO_INTMASK, mask, value);
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+}
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+EXPORT_SYMBOL(ssb_extif_gpio_intmask);
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--- a/include/linux/ssb/ssb_driver_chipcommon.h
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+++ b/include/linux/ssb/ssb_driver_chipcommon.h
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@@ -382,11 +382,13 @@
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extern void ssb_chipco_watchdog_timer_set(struct ssb_chipcommon *cc,
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u32 ticks);
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+/* Chipcommon GPIO pin access. */
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u32 ssb_chipco_gpio_in(struct ssb_chipcommon *cc, u32 mask);
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-
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-void ssb_chipco_gpio_out(struct ssb_chipcommon *cc, u32 mask, u32 value);
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-
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-void ssb_chipco_gpio_outen(struct ssb_chipcommon *cc, u32 mask, u32 value);
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+u32 ssb_chipco_gpio_out(struct ssb_chipcommon *cc, u32 mask, u32 value);
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+u32 ssb_chipco_gpio_outen(struct ssb_chipcommon *cc, u32 mask, u32 value);
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+u32 ssb_chipco_gpio_control(struct ssb_chipcommon *cc, u32 mask, u32 value);
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+u32 ssb_chipco_gpio_intmask(struct ssb_chipcommon *cc, u32 mask, u32 value);
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+u32 ssb_chipco_gpio_polarity(struct ssb_chipcommon *cc, u32 mask, u32 value);
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#ifdef CONFIG_SSB_SERIAL
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extern int ssb_chipco_serial_init(struct ssb_chipcommon *cc,
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--- a/include/linux/ssb/ssb_driver_extif.h
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+++ b/include/linux/ssb/ssb_driver_extif.h
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@@ -171,11 +171,12 @@
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extern void ssb_extif_timing_init(struct ssb_extif *extif,
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unsigned long ns);
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+/* Extif GPIO pin access */
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u32 ssb_extif_gpio_in(struct ssb_extif *extif, u32 mask);
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-
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-void ssb_extif_gpio_out(struct ssb_extif *extif, u32 mask, u32 value);
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-
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-void ssb_extif_gpio_outen(struct ssb_extif *extif, u32 mask, u32 value);
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+u32 ssb_extif_gpio_out(struct ssb_extif *extif, u32 mask, u32 value);
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+u32 ssb_extif_gpio_outen(struct ssb_extif *extif, u32 mask, u32 value);
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+u32 ssb_extif_gpio_polarity(struct ssb_extif *extif, u32 mask, u32 value);
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+u32 ssb_extif_gpio_intmask(struct ssb_extif *extif, u32 mask, u32 value);
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#ifdef CONFIG_SSB_SERIAL
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extern int ssb_extif_serial_init(struct ssb_extif *extif,
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