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openwrt-xburst/target/linux/ar71xx/patches-3.6/604-MIPS-ath79-ap81-fixes.patch
juhosg df88996997 ar71xx: add initial support for 3.6
The nand subtarget is not working yet.

Signed-off-by: Gabor Juhos <juhosg@openwrt.org>

git-svn-id: svn://svn.openwrt.org/openwrt/trunk@33983 3c298f89-4303-0410-b956-a3cf2f4a3e73
2012-10-28 19:52:02 +00:00

129 lines
3.1 KiB
Diff

--- a/arch/mips/ath79/mach-ap81.c
+++ b/arch/mips/ath79/mach-ap81.c
@@ -9,12 +9,16 @@
* by the Free Software Foundation.
*/
-#include "machtypes.h"
-#include "dev-wmac.h"
+#include <linux/mtd/mtd.h>
+#include <linux/mtd/partitions.h>
+
+#include "dev-eth.h"
#include "dev-gpio-buttons.h"
#include "dev-leds-gpio.h"
-#include "dev-spi.h"
+#include "dev-m25p80.h"
#include "dev-usb.h"
+#include "dev-wmac.h"
+#include "machtypes.h"
#define AP81_GPIO_LED_STATUS 1
#define AP81_GPIO_LED_AOSS 3
@@ -29,6 +33,37 @@
#define AP81_CAL_DATA_ADDR 0x1fff1000
+static struct mtd_partition ap81_partitions[] = {
+ {
+ .name = "u-boot",
+ .offset = 0,
+ .size = 0x040000,
+ .mask_flags = MTD_WRITEABLE,
+ }, {
+ .name = "u-boot-env",
+ .offset = 0x040000,
+ .size = 0x010000,
+ }, {
+ .name = "rootfs",
+ .offset = 0x050000,
+ .size = 0x500000,
+ }, {
+ .name = "uImage",
+ .offset = 0x550000,
+ .size = 0x100000,
+ }, {
+ .name = "ART",
+ .offset = 0x650000,
+ .size = 0x1b0000,
+ .mask_flags = MTD_WRITEABLE,
+ }
+};
+
+static struct flash_platform_data ap81_flash_data = {
+ .parts = ap81_partitions,
+ .nr_parts = ARRAY_SIZE(ap81_partitions),
+};
+
static struct gpio_led ap81_leds_gpio[] __initdata = {
{
.name = "ap81:green:status",
@@ -67,26 +102,6 @@ static struct gpio_keys_button ap81_gpio
}
};
-static struct ath79_spi_controller_data ap81_spi0_data = {
- .cs_type = ATH79_SPI_CS_TYPE_INTERNAL,
- .cs_line = 0,
-};
-
-static struct spi_board_info ap81_spi_info[] = {
- {
- .bus_num = 0,
- .chip_select = 0,
- .max_speed_hz = 25000000,
- .modalias = "m25p64",
- .controller_data = &ap81_spi0_data,
- }
-};
-
-static struct ath79_spi_platform_data ap81_spi_data = {
- .bus_num = 0,
- .num_chipselect = 1,
-};
-
static void __init ap81_setup(void)
{
u8 *cal_data = (u8 *) KSEG1ADDR(AP81_CAL_DATA_ADDR);
@@ -96,10 +111,24 @@ static void __init ap81_setup(void)
ath79_register_gpio_keys_polled(-1, AP81_KEYS_POLL_INTERVAL,
ARRAY_SIZE(ap81_gpio_keys),
ap81_gpio_keys);
- ath79_register_spi(&ap81_spi_data, ap81_spi_info,
- ARRAY_SIZE(ap81_spi_info));
+ ath79_register_m25p80(&ap81_flash_data);
ath79_register_wmac(cal_data, NULL);
ath79_register_usb();
+
+ ath79_register_mdio(0, 0x0);
+
+ ath79_init_mac(ath79_eth0_data.mac_addr, cal_data, 0);
+ ath79_eth0_data.phy_if_mode = PHY_INTERFACE_MODE_RMII;
+ ath79_eth0_data.speed = SPEED_100;
+ ath79_eth0_data.duplex = DUPLEX_FULL;
+ ath79_eth0_data.has_ar8216 = 1;
+
+ ath79_init_mac(ath79_eth1_data.mac_addr, cal_data, 1);
+ ath79_eth1_data.phy_if_mode = PHY_INTERFACE_MODE_RMII;
+ ath79_eth1_data.phy_mask = 0x10;
+
+ ath79_register_eth(0);
+ ath79_register_eth(1);
}
MIPS_MACHINE(ATH79_MACH_AP81, "AP81", "Atheros AP81 reference board",
--- a/arch/mips/ath79/Kconfig
+++ b/arch/mips/ath79/Kconfig
@@ -30,9 +30,10 @@ config ATH79_MACH_AP136
config ATH79_MACH_AP81
bool "Atheros AP81 reference board"
select SOC_AR913X
+ select ATH79_DEV_ETH
select ATH79_DEV_GPIO_BUTTONS
select ATH79_DEV_LEDS_GPIO
- select ATH79_DEV_SPI
+ select ATH79_DEV_M25P80
select ATH79_DEV_USB
select ATH79_DEV_WMAC
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