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* adds stage1 lzma * new boards * fixes settings for PSC ram * lost of cleanups git-svn-id: svn://svn.openwrt.org/openwrt/trunk@25694 3c298f89-4303-0410-b956-a3cf2f4a3e73
219 lines
5.3 KiB
C
219 lines
5.3 KiB
C
/*
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* (C) Copyright 2003
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* Wolfgang Denk, DENX Software Engineering, wd@denx.de.
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* (C) Copyright 2009
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* Infineon Technologies AG, http://www.infineon.com
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*
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* See file CREDITS for list of people who contributed to this
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* project.
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*
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* This program is free software; you can redistribute it and/or
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* modify it under the terms of the GNU General Public License as
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* published by the Free Software Foundation; either version 2 of
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* the License, or (at your option) any later version.
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*
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* This program is distributed in the hope that it will be useful,
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* but WITHOUT ANY WARRANTY; without even the implied warranty of
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* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
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* GNU General Public License for more details.
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*
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* You should have received a copy of the GNU General Public License
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* along with this program; if not, write to the Free Software
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* Foundation, Inc., 59 Temple Place, Suite 330, Boston,
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* MA 02111-1307 USA
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*/
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#include <config.h>
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#include <common.h>
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#include <asm/io.h>
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#include <asm/addrspace.h>
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#include "ifx_asc.h"
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#define SET_BIT(reg, mask) asc_writel(reg, asc_readl(reg) | (mask))
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#define CLEAR_BIT(reg, mask) asc_writel(reg, asc_readl(reg) & (~mask))
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#define SET_BITFIELD(reg, mask, off, val) asc_writel(reg, (asc_readl(reg) & (~mask)) | (val << off) )
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#undef DEBUG_ASC_RAW
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#ifdef DEBUG_ASC_RAW
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#define DEBUG_ASC_RAW_RX_BUF 0xA0800000
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#define DEBUG_ASC_RAW_TX_BUF 0xA0900000
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#endif
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DECLARE_GLOBAL_DATA_PTR;
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static IfxAsc_t *pAsc = (IfxAsc_t *)CKSEG1ADDR(CONFIG_SYS_IFX_ASC_BASE);
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/*
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* FDV fASC
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* BaudRate = ----- * --------------------
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* 512 16 * (ReloadValue+1)
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*/
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/*
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* FDV fASC
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* ReloadValue = ( ----- * --------------- ) - 1
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* 512 16 * BaudRate
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*/
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static void serial_divs(u32 baudrate, u32 fasc, u32 *pfdv, u32 *preload)
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{
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u32 clock = fasc / 16;
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u32 fdv; /* best fdv */
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u32 reload = 0; /* best reload */
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u32 diff; /* smallest diff */
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u32 idiff; /* current diff */
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u32 ireload; /* current reload */
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u32 i; /* current fdv */
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u32 result; /* current resulting baudrate */
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if (clock > 0x7FFFFF)
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clock /= 512;
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else
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baudrate *= 512;
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fdv = 512; /* start with 1:1 fraction */
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diff = baudrate; /* highest possible */
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/* i is the test fdv value -- start with the largest possible */
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for (i = 512; i > 0; i--)
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{
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ireload = (clock * i) / baudrate;
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if (ireload < 1)
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break; /* already invalid */
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result = (clock * i) / ireload;
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idiff = (result > baudrate) ? (result - baudrate) : (baudrate - result);
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if (idiff == 0)
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{
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fdv = i;
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reload = ireload;
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break; /* can't do better */
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}
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else if (idiff < diff)
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{
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fdv = i; /* best so far */
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reload = ireload;
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diff = idiff; /* update lowest diff*/
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}
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}
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*pfdv = (fdv == 512) ? 0 : fdv;
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*preload = reload - 1;
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}
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void serial_setbrg (void)
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{
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u32 ReloadValue, fdv;
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serial_divs(gd->baudrate, get_bus_freq(0), &fdv, &ReloadValue);
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/* Disable Baud Rate Generator; BG should only be written when R=0 */
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CLEAR_BIT(asc_con, ASCCON_R);
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/* Enable Fractional Divider */
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SET_BIT(asc_con, ASCCON_FDE); /* FDE = 1 */
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/* Set fractional divider value */
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asc_writel(asc_fdv, fdv & ASCFDV_VALUE_MASK);
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/* Set reload value in BG */
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asc_writel(asc_bg, ReloadValue);
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/* Enable Baud Rate Generator */
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SET_BIT(asc_con, ASCCON_R); /* R = 1 */
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}
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int serial_init (void)
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{
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/* and we have to set CLC register*/
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CLEAR_BIT(asc_clc, ASCCLC_DISS);
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SET_BITFIELD(asc_clc, ASCCLC_RMCMASK, ASCCLC_RMCOFFSET, 0x0001);
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/* initialy we are in async mode */
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asc_writel(asc_con, ASCCON_M_8ASYNC);
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/* select input port */
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asc_writel(asc_pisel, CONSOLE_TTY & 0x1);
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/* TXFIFO's filling level */
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SET_BITFIELD(asc_txfcon, ASCTXFCON_TXFITLMASK,
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ASCTXFCON_TXFITLOFF, ASC_TXFIFO_FL);
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/* enable TXFIFO */
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SET_BIT(asc_txfcon, ASCTXFCON_TXFEN);
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/* RXFIFO's filling level */
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SET_BITFIELD(asc_txfcon, ASCRXFCON_RXFITLMASK,
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ASCRXFCON_RXFITLOFF, ASC_RXFIFO_FL);
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/* enable RXFIFO */
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SET_BIT(asc_rxfcon, ASCRXFCON_RXFEN);
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/* set baud rate */
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serial_setbrg();
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/* enable error signals & Receiver enable */
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SET_BIT(asc_whbstate, ASCWHBSTATE_SETREN|ASCCON_FEN|ASCCON_TOEN|ASCCON_ROEN);
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return 0;
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}
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void serial_putc (const char c)
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{
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u32 txFl = 0;
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#ifdef DEBUG_ASC_RAW
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static u8 * debug = (u8 *) DEBUG_ASC_RAW_TX_BUF;
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*debug++=c;
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#endif
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if (c == '\n')
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serial_putc ('\r');
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/* check do we have a free space in the TX FIFO */
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/* get current filling level */
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do {
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txFl = ( asc_readl(asc_fstat) & ASCFSTAT_TXFFLMASK ) >> ASCFSTAT_TXFFLOFF;
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}
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while ( txFl == ASC_TXFIFO_FULL );
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asc_writel(asc_tbuf, c); /* write char to Transmit Buffer Register */
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/* check for errors */
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if ( asc_readl(asc_state) & ASCSTATE_TOE ) {
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SET_BIT(asc_whbstate, ASCWHBSTATE_CLRTOE);
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return;
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}
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}
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void serial_puts (const char *s)
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{
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while (*s) {
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serial_putc (*s++);
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}
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}
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int serial_getc (void)
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{
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char c;
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while ((asc_readl(asc_fstat) & ASCFSTAT_RXFFLMASK) == 0 );
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c = (char)(asc_readl(asc_rbuf) & 0xff);
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#ifdef DEBUG_ASC_RAW
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static u8* debug=(u8*)(DEBUG_ASC_RAW_RX_BUF);
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*debug++=c;
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#endif
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return c;
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}
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int serial_tstc (void)
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{
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int res = 1;
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if ( (asc_readl(asc_fstat) & ASCFSTAT_RXFFLMASK) == 0 ) {
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res = 0;
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}
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return res;
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}
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