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openwrt-xburst/package/ifx-vmmc/patches-2.6.33/100-ifxmips.patch
blogic 0b10449413 [ifxmips] 
* remove references to gpio_dev
* make vmmc driver register its own memory and dont rely on arch code to do so
* makes any Danube board with a CFI commandset 2 NOR flash chip functional again
* fixes filenames of downloaded firmwares

thanks, Ithamar R. Adema



git-svn-id: svn://svn.openwrt.org/openwrt/trunk@22515 3c298f89-4303-0410-b956-a3cf2f4a3e73
2010-08-06 15:49:42 +00:00

514 lines
17 KiB
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--- a/src/drv_vmmc_access.h
+++ b/src/drv_vmmc_access.h
@@ -24,6 +24,10 @@
#include "drv_mps_vmmc.h"
#endif
+#if (LINUX_VERSION_CODE > KERNEL_VERSION(2,6,28))
+# define IFX_MPS IFXMIPS_MPS_BASE_ADDR
+#endif
+
/* ============================= */
/* Global Defines */
/* ============================= */
--- a/src/drv_vmmc_bbd.c
+++ b/src/drv_vmmc_bbd.c
@@ -939,7 +939,11 @@ static IFX_int32_t vmmc_BBD_DownloadChCr
IFX_uint8_t padBytes = 0;
#endif
IFX_uint16_t cram_offset, cram_crc,
- pCmd [MAX_CMD_WORD] = {0};
+ pCmd [MAX_CMD_WORD]
+#if defined (__GNUC__) || defined (__GNUG__)
+ __attribute__ ((aligned(4)))
+#endif
+ = {0};
/* read offset */
cpb2w (&cram_offset, &bbd_cram->pData[0], sizeof (IFX_uint16_t));
--- a/src/drv_vmmc_danube.h
+++ b/src/drv_vmmc_danube.h
@@ -15,12 +15,59 @@
*/
#if defined SYSTEM_DANUBE
-#include <asm/ifx/ifx_gpio.h>
+# if (LINUX_VERSION_CODE > KERNEL_VERSION(2,6,28))
+# include <asm/mach-ifxmips/ifxmips_gpio.h>
+
+# define IFX_GPIO_PIN_NUMBER_PER_PORT 16
+# define IFX_GPIO_PIN_ID(port, pin) ((port) \
+ * IFX_GPIO_PIN_NUMBER_PER_PORT \
+ + (pin))
+# define IFX_GPIO_PIN_ID_TO_PORT(pin_id) (pin_id >> 4)
+# define IFX_GPIO_PIN_ID_TO_PIN(pin_id) (pin_id & 0x0F)
+
+# define IFX_GPIO_MODULE_TAPI_VMMC 0 /* not used */
+
+# define ifx_gpio_pin_reserve(a,b) 0 /* obsolete */
+
+# define ifx_gpio_open_drain_set(a,b) ifxmips_port_set_open_drain( \
+ IFX_GPIO_PIN_ID_TO_PORT(a), \
+ IFX_GPIO_PIN_ID_TO_PIN(a))
+
+# define ifx_gpio_altsel0_set(a,b) ifxmips_port_set_altsel0( \
+ IFX_GPIO_PIN_ID_TO_PORT(a), \
+ IFX_GPIO_PIN_ID_TO_PIN(a))
+
+# define ifx_gpio_altsel1_set(a,b) ifxmips_port_set_altsel1( \
+ IFX_GPIO_PIN_ID_TO_PORT(a), \
+ IFX_GPIO_PIN_ID_TO_PIN(a))
+
+# define ifx_gpio_altsel0_clear(a,b) ifxmips_port_clear_altsel0( \
+ IFX_GPIO_PIN_ID_TO_PORT(a), \
+ IFX_GPIO_PIN_ID_TO_PIN(a))
+
+# define ifx_gpio_altsel1_clear(a,b) ifxmips_port_clear_altsel1( \
+ IFX_GPIO_PIN_ID_TO_PORT(a), \
+ IFX_GPIO_PIN_ID_TO_PIN(a))
+
+# define ifx_gpio_dir_in_set(a,b) ifxmips_port_set_dir_in( \
+ IFX_GPIO_PIN_ID_TO_PORT(a), \
+ IFX_GPIO_PIN_ID_TO_PIN(a))
+
+# define ifx_gpio_dir_out_set(a,b) ifxmips_port_set_dir_out( \
+ IFX_GPIO_PIN_ID_TO_PORT(a), \
+ IFX_GPIO_PIN_ID_TO_PIN(a))
+
+# define ifx_gpio_pin_free(a,b) ifxmips_port_free_pin( \
+ IFX_GPIO_PIN_ID_TO_PORT(a), \
+ IFX_GPIO_PIN_ID_TO_PIN(a))
+# else
+# include <asm/ifx/ifx_gpio.h>
+# endif
#else
#error no system selected
#endif
-#define VMMC_TAPI_GPIO_MODULE_ID IFX_GPIO_MODULE_TAPI_VMMC
+#define VMMC_TAPI_GPIO_MODULE_ID IFX_GPIO_MODULE_TAPI_VMMC
/**
*/
--- a/src/drv_vmmc_init.c
+++ b/src/drv_vmmc_init.c
@@ -48,6 +48,14 @@
#include "drv_vmmc_pmc.h"
#endif /* PMC_SUPPORTED */
+#if (LINUX_VERSION_CODE > KERNEL_VERSION(2,6,28))
+# define IFX_MPS_CAD0SR IFXMIPS_MPS_CAD0SR
+# define IFX_MPS_CAD1SR IFXMIPS_MPS_CAD1SR
+# define IFX_MPS_CVC0SR IFXMIPS_MPS_CVC0SR
+# define IFX_MPS_CVC1SR IFXMIPS_MPS_CVC1SR
+# define IFX_MPS_CVC2SR IFXMIPS_MPS_CVC2SR
+# define IFX_MPS_CVC3SR IFXMIPS_MPS_CVC3SR
+#endif
/* ============================= */
/* Local Macros & Definitions */
--- a/src/drv_vmmc_init_cap.c
+++ b/src/drv_vmmc_init_cap.c
@@ -22,6 +22,11 @@
#include "drv_mps_vmmc.h"
#include "drv_mps_vmmc_device.h"
+#if (LINUX_VERSION_CODE > KERNEL_VERSION(2,6,28))
+# define IFX_MPS_CHIPID_VERSION_GET IFXMIPS_MPS_CHIPID_VERSION_GET
+# define IFX_MPS_CHIPID IFXMIPS_MPS_CHIPID
+#endif
+
/* ============================= */
/* Configuration defintions */
/* ============================= */
--- a/src/mps/drv_mps_vmmc_common.c
+++ b/src/mps/drv_mps_vmmc_common.c
@@ -35,8 +35,35 @@
#include "ifxos_interrupt.h"
#include "ifxos_time.h"
-#include <asm/ifx/ifx_regs.h>
-#include <asm/ifx/ifx_gptu.h>
+#if (LINUX_VERSION_CODE > KERNEL_VERSION(2,6,28))
+# include <asm/mach-ifxmips/ifxmips.h>
+# include <asm/mach-ifxmips/ifxmips_irq.h>
+# include <asm/mach-ifxmips/ifxmips_gptu.h>
+
+# define ifx_gptu_timer_request ifxmips_request_timer
+# define ifx_gptu_timer_start ifxmips_start_timer
+# define ifx_gptu_countvalue_get ifxmips_get_count_value
+# define ifx_gptu_timer_free ifxmips_free_timer
+
+# define IFX_MPS_SRAM IFXMIPS_MPS_SRAM
+# define IFX_MPS_AD0ENR IFXMIPS_MPS_AD0ENR
+# define IFX_MPS_AD1ENR IFXMIPS_MPS_AD1ENR
+# define IFX_MPS_VC0ENR IFXMIPS_MPS_VC0ENR
+# define IFX_MPS_SAD0SR IFXMIPS_MPS_SAD0SR
+# define IFX_MPS_RAD0SR IFXMIPS_MPS_RAD0SR
+# define IFX_MPS_RAD1SR IFXMIPS_MPS_RAD1SR
+# define IFX_MPS_CAD0SR IFXMIPS_MPS_CAD0SR
+# define IFX_MPS_CAD1SR IFXMIPS_MPS_CAD1SR
+# define IFX_MPS_RVC0SR IFXMIPS_MPS_RVC0SR
+# define IFX_MPS_CVC0SR IFXMIPS_MPS_CVC0SR
+
+# define INT_NUM_IM4_IRL14 (INT_NUM_IM4_IRL0 + 14)
+
+# define bsp_mask_and_ack_irq ifxmips_mask_and_ack_irq
+#else
+# include <asm/ifx/ifx_regs.h>
+# include <asm/ifx/ifx_gptu.h>
+#endif
#include "drv_mps_vmmc.h"
#include "drv_mps_vmmc_dbg.h"
@@ -193,7 +220,8 @@ IFX_boolean_t ifx_mps_ext_bufman ()
*/
IFX_void_t *ifx_mps_fastbuf_malloc (IFX_size_t size, IFX_int32_t priority)
{
- IFX_uint32_t ptr, flags;
+ unsigned long flags;
+ IFX_uint32_t ptr;
IFX_int32_t index = fastbuf_index;
if (fastbuf_initialized == 0)
@@ -219,11 +247,11 @@ IFX_void_t *ifx_mps_fastbuf_malloc (IFX_
if ((volatile IFX_uint32_t) fastbuf_pool[index] & FASTBUF_USED)
continue;
ptr = fastbuf_pool[index];
- (volatile IFX_uint32_t) fastbuf_pool[index] |= FASTBUF_USED;
+ fastbuf_pool[index] = (volatile IFX_uint32_t) fastbuf_pool[index] | FASTBUF_USED;
if ((priority == FASTBUF_FW_OWNED) || (priority == FASTBUF_CMD_OWNED) ||
(priority == FASTBUF_EVENT_OWNED) ||
(priority == FASTBUF_WRITE_OWNED))
- (volatile IFX_uint32_t) fastbuf_pool[index] |= priority;
+ fastbuf_pool[index] = (volatile IFX_uint32_t) fastbuf_pool[index] | priority;
fastbuf_index = index;
IFXOS_UNLOCKINT (flags);
return (IFX_void_t *) ptr;
@@ -247,7 +275,7 @@ IFX_void_t *ifx_mps_fastbuf_malloc (IFX_
*/
IFX_void_t ifx_mps_fastbuf_free (const IFX_void_t * ptr)
{
- IFX_uint32_t flags;
+ unsigned long flags;
IFX_int32_t index = fastbuf_index;
IFXOS_LOCKINT (flags);
@@ -261,8 +289,9 @@ IFX_void_t ifx_mps_fastbuf_free (const I
FASTBUF_EVENT_OWNED | FASTBUF_WRITE_OWNED))
== ((IFX_uint32_t) ptr | FASTBUF_USED))
{
- (volatile IFX_uint32_t) fastbuf_pool[index] &= ~FASTBUF_USED;
- (volatile IFX_uint32_t) fastbuf_pool[index] &=
+ fastbuf_pool[index] = (volatile IFX_uint32_t) fastbuf_pool[index] & ~FASTBUF_USED;
+
+ fastbuf_pool[index] = (volatile IFX_uint32_t) fastbuf_pool[index] &
~(FASTBUF_FW_OWNED | FASTBUF_CMD_OWNED | FASTBUF_EVENT_OWNED |
FASTBUF_WRITE_OWNED);
IFXOS_UNLOCKINT (flags);
@@ -444,7 +473,7 @@ static mps_buffer_state_e ifx_mps_bufman
*/
static IFX_int32_t ifx_mps_bufman_inc_level (IFX_uint32_t value)
{
- IFX_uint32_t flags;
+ unsigned long flags;
if (mps_buffer.buf_level + value > MPS_BUFFER_MAX_LEVEL)
{
@@ -471,7 +500,7 @@ static IFX_int32_t ifx_mps_bufman_inc_le
*/
static IFX_int32_t ifx_mps_bufman_dec_level (IFX_uint32_t value)
{
- IFX_uint32_t flags;
+ unsigned long flags;
if (mps_buffer.buf_level < value)
{
@@ -932,7 +961,7 @@ IFX_int32_t ifx_mps_common_open (mps_com
mps_mbx_dev * pMBDev, IFX_int32_t bcommand,
IFX_boolean_t from_kernel)
{
- IFX_uint32_t flags;
+ unsigned long flags;
IFXOS_LOCKINT (flags);
@@ -1048,7 +1077,7 @@ IFX_int32_t ifx_mps_common_close (mps_mb
IFX_void_t ifx_mps_release_structures (mps_comm_dev * pDev)
{
IFX_int32_t count;
- IFX_uint32_t flags;
+ unsigned long flags;
IFXOS_LOCKINT (flags);
IFXOS_BlockFree (pFW_img_data);
@@ -1544,7 +1573,7 @@ IFX_int32_t ifx_mps_mbx_read_message (mp
IFX_uint32_t * bytes)
{
IFX_int32_t i, ret;
- IFX_uint32_t flags;
+ unsigned long flags;
IFXOS_LOCKINT (flags);
@@ -1751,7 +1780,7 @@ IFX_int32_t ifx_mps_mbx_write_message (m
{
mps_fifo *mbx;
IFX_uint32_t i;
- IFX_uint32_t flags;
+ unsigned long flags;
IFX_int32_t retval = -EAGAIN;
IFX_int32_t retries = 0;
IFX_uint32_t word = 0;
@@ -2138,6 +2167,7 @@ IFX_int32_t ifx_mps_mbx_write_cmd (mps_m
TRACE (MPS, DBG_LEVEL_HIGH,
("%s(): Invalid device ID %d !\n", __FUNCTION__, pMBDev->devID));
}
+
return retval;
}
@@ -2161,7 +2191,7 @@ IFX_void_t ifx_mps_mbx_data_upstream (IF
mps_mbx_dev *mbx_dev;
MbxMsg_s msg;
IFX_uint32_t bytes_read = 0;
- IFX_uint32_t flags;
+ unsigned long flags;
IFX_int32_t ret;
/* set pointer to data upstream mailbox, no matter if 0,1,2 or 3 because
@@ -2252,7 +2282,7 @@ IFX_void_t ifx_mps_mbx_data_upstream (IF
{
ifx_mps_bufman_dec_level (1);
if ((ifx_mps_bufman_get_level () <= mps_buffer.buf_threshold) &&
- (atomic_read (&pMPSDev->provide_buffer->object.count) == 0))
+ ((volatile unsigned int)pMPSDev->provide_buffer->object.count == 0))
{
IFXOS_LockRelease (pMPSDev->provide_buffer);
}
@@ -2295,7 +2325,7 @@ IFX_void_t ifx_mps_mbx_data_upstream (IF
#endif /* CONFIG_PROC_FS */
ifx_mps_bufman_dec_level (1);
if ((ifx_mps_bufman_get_level () <= mps_buffer.buf_threshold) &&
- (atomic_read (&pMPSDev->provide_buffer->object.count) == 0))
+ ((volatile unsigned int)pMPSDev->provide_buffer->object.count == 0))
{
IFXOS_LockRelease (pMPSDev->provide_buffer);
}
@@ -2325,7 +2355,7 @@ IFX_void_t ifx_mps_mbx_data_upstream (IF
IFX_void_t ifx_mps_mbx_cmd_upstream (IFX_ulong_t dummy)
{
mps_fifo *mbx;
- IFX_uint32_t flags;
+ unsigned long flags;
/* set pointer to upstream command mailbox */
mbx = &(pMPSDev->cmd_upstrm_fifo);
@@ -2373,7 +2403,7 @@ IFX_void_t ifx_mps_mbx_event_upstream (I
mps_event_msg msg;
IFX_int32_t length = 0;
IFX_int32_t read_length = 0;
- IFX_uint32_t flags;
+ unsigned long flags;
/* set pointer to upstream event mailbox */
mbx = &(pMPSDev->event_upstrm_fifo);
@@ -2616,7 +2646,7 @@ IFX_void_t ifx_mps_disable_mailbox_int (
*/
IFX_void_t ifx_mps_dd_mbx_int_enable (IFX_void_t)
{
- IFX_uint32_t flags;
+ unsigned long flags;
MPS_Ad0Reg_u Ad0Reg;
IFXOS_LOCKINT (flags);
@@ -2642,7 +2672,7 @@ IFX_void_t ifx_mps_dd_mbx_int_enable (IF
*/
IFX_void_t ifx_mps_dd_mbx_int_disable (IFX_void_t)
{
- IFX_uint32_t flags;
+ unsigned long flags;
MPS_Ad0Reg_u Ad0Reg;
IFXOS_LOCKINT (flags);
@@ -2769,6 +2799,7 @@ irqreturn_t ifx_mps_ad0_irq (IFX_int32_t
}
}
+
if (MPS_Ad0StatusReg.fld.du_mbx)
{
#ifdef CONFIG_PROC_FS
@@ -3062,7 +3093,8 @@ IFX_int32_t ifx_mps_get_fw_version (IFX_
*/
IFX_return_t ifx_mps_init_gpt ()
{
- IFX_uint32_t flags, timer_flags, timer, loops = 0;
+ unsigned long flags;
+ IFX_uint32_t timer_flags, timer, loops = 0;
IFX_ulong_t count;
#if defined(SYSTEM_AR9) || defined(SYSTEM_VR9)
timer = TIMER1A;
--- a/src/mps/drv_mps_vmmc_danube.c
+++ b/src/mps/drv_mps_vmmc_danube.c
@@ -32,9 +32,20 @@
#include "ifxos_select.h"
#include "ifxos_interrupt.h"
-#include <asm/ifx/ifx_regs.h>
-#include <asm/ifx/ifx_gpio.h>
-#include <asm/ifx/common_routines.h>
+#if (LINUX_VERSION_CODE > KERNEL_VERSION(2,6,28))
+# include <asm/mach-ifxmips/ifxmips.h>
+# include <asm/mach-ifxmips/ifxmips_irq.h>
+# include <asm/mach-ifxmips/ifxmips_gptu.h>
+# include <asm/mach-ifxmips/ifxmips_prom.h>
+# include <linux/dma-mapping.h>
+
+# define IFX_RCU_RST_REQ IFXMIPS_RCU_RST
+# define IFX_RCU_RST_REQ_CPU1 IFXMIPS_RCU_RST_CPU1
+#else
+# include <asm/ifx/ifx_regs.h>
+# include <asm/ifx_vpe.h>
+# include <asm/ifx/ifx_gpio.h>
+#endif
#include "drv_mps_vmmc.h"
#include "drv_mps_vmmc_dbg.h"
@@ -72,6 +71,23 @@ volatile IFX_uint32_t *danube_cp1_base;
/* Local function definition */
/* ============================= */
+#if (LINUX_VERSION_CODE > KERNEL_VERSION(2,6,28))
+IFX_uint32_t ifx_get_cp1_size(IFX_void_t)
+{
+ return 2;
+}
+
+IFX_uint32_t *ifx_get_cp1_base(IFX_void_t)
+{
+ if (!danube_cp1_base) {
+ dma_addr_t dma;
+ danube_cp1_base = dma_alloc_coherent(NULL, ifx_get_cp1_size()<<20, &dma, GFP_ATOMIC);
+ }
+
+ return (IFX_uint32_t*)danube_cp1_base;
+}
+#endif
+
/******************************************************************************
* DANUBE Specific Routines
******************************************************************************/
@@ -119,6 +132,15 @@ IFX_int32_t ifx_mps_download_firmware (m
}
/* check if FW image fits in available memory space */
+#if (LINUX_VERSION_CODE > KERNEL_VERSION(2,6,28))
+ if (mem > ifx_get_cp1_size()<<20)
+ {
+ TRACE (MPS, DBG_LEVEL_HIGH,
+ ("[%s %s %d]: error, firmware memory exceeds reserved space (%i > %i)!\n",
+ __FILE__, __func__, __LINE__, mem, ifx_get_cp1_size()<<20));
+ return IFX_ERROR;
+ }
+#else
if (mem > ifx_get_cp1_size())
{
TRACE (MPS, DBG_LEVEL_HIGH,
@@ -126,6 +148,7 @@ IFX_int32_t ifx_mps_download_firmware (m
__FILE__, __func__, __LINE__, mem, ifx_get_cp1_size()));
return IFX_ERROR;
}
+#endif
/* reset the driver */
ifx_mps_reset ();
@@ -337,7 +360,7 @@ IFX_void_t ifx_mps_release (IFX_void_t)
*/
IFX_void_t ifx_mps_wdog_expiry()
{
- IFX_uint32_t flags;
+ unsigned long flags;
IFXOS_LOCKINT (flags);
/* recalculate and compare the firmware checksum */
--- a/src/mps/drv_mps_vmmc_device.h
+++ b/src/mps/drv_mps_vmmc_device.h
@@ -16,8 +16,15 @@
declarations.
*******************************************************************************/
-#include <asm/ifx/ifx_regs.h>
-#include <asm/ifx_vpe.h>
+#if (LINUX_VERSION_CODE > KERNEL_VERSION(2,6,28))
+# include <asm/mach-ifxmips/ifxmips.h>
+# include <asm/mach-ifxmips/ifxmips_irq.h>
+# include <asm/mach-ifxmips/ifxmips_gpio.h>
+# include <gpio.h>
+#else
+# include <asm/ifx/ifx_regs.h>
+# include <asm/ifx_vpe.h>
+#endif
/* ============================= */
/* MPS Common defines */
--- a/src/mps/drv_mps_vmmc_linux.c
+++ b/src/mps/drv_mps_vmmc_linux.c
@@ -40,10 +40,26 @@
#include <linux/moduleparam.h>
#endif /* */
-
-#include <asm/ifx/irq.h>
-#include <asm/ifx/ifx_regs.h>
-#include <asm/ifx_vpe.h>
+#if (LINUX_VERSION_CODE > KERNEL_VERSION(2,6,28))
+# include <asm/mach-ifxmips/ifxmips.h>
+# include <asm/mach-ifxmips/ifxmips_irq.h>
+
+# define IFX_MPS_AD0ENR IFXMIPS_MPS_AD0ENR
+# define IFX_MPS_AD1ENR IFXMIPS_MPS_AD1ENR
+# define IFX_MPS_RAD0SR IFXMIPS_MPS_RAD0SR
+# define IFX_MPS_RAD1SR IFXMIPS_MPS_RAD1SR
+# define IFX_MPS_VC0ENR IFXMIPS_MPS_VC0ENR
+# define IFX_MPS_RVC0SR IFXMIPS_MPS_RVC0SR
+
+# define INT_NUM_IM4_IRL14 (INT_NUM_IM4_IRL0 + 14)
+# define INT_NUM_IM4_IRL18 (INT_NUM_IM4_IRL0 + 18)
+# define INT_NUM_IM4_IRL19 (INT_NUM_IM4_IRL0 + 19)
+# define IFX_ICU_IM4_IER IFXMIPS_ICU_IM4_IER
+#else
+# include <asm/ifx/irq.h>
+# include <asm/ifx/ifx_regs.h>
+# include <asm/ifx_vpe.h>
+#endif
/* lib_ifxos headers */
#include "ifx_types.h"
@@ -914,7 +930,7 @@ IFX_int32_t ifx_mps_ioctl (struct inode
#endif /* MPS_FIFO_BLOCKING_WRITE */
case FIO_MPS_GET_STATUS:
{
- IFX_uint32_t flags;
+ unsigned long flags;
IFXOS_LOCKINT (flags);
@@ -949,7 +965,7 @@ IFX_int32_t ifx_mps_ioctl (struct inode
#if CONFIG_MPS_HISTORY_SIZE > 0
case FIO_MPS_GET_CMD_HISTORY:
{
- IFX_uint32_t flags;
+ unsigned long flags;
if (from_kernel)
{
@@ -1637,6 +1653,7 @@ IFX_int32_t ifx_mps_get_status_proc (IFX
sprintf (buf + len, " minLv: \t %8d\n",
ifx_mps_dev.voice_mb[i].upstrm_fifo->min_space);
}
+
return len;
}
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