mirror of
git://projects.qi-hardware.com/openwrt-xburst.git
synced 2024-08-20 11:47:09 +03:00
git-svn-id: svn://svn.openwrt.org/openwrt/trunk@24180 3c298f89-4303-0410-b956-a3cf2f4a3e73
247 lines
6.7 KiB
Diff
247 lines
6.7 KiB
Diff
Index: linux-2.6.32.26/arch/mips/ar7/platform.c
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===================================================================
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--- linux-2.6.32.26.orig/arch/mips/ar7/platform.c 2010-11-28 03:22:24.522383766 -0800
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+++ linux-2.6.32.26/arch/mips/ar7/platform.c 2010-11-28 04:17:24.872413302 -0800
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@@ -46,7 +46,6 @@
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int reset_bit;
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};
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-
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static int vlynq_on(struct vlynq_device *dev)
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{
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int result;
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@@ -72,7 +71,8 @@
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msleep(50);
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- gpio_set_value(pdata->gpio_bit, 1);
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+ gpio_set_value(pdata->gpio_bit,
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+ __vlynq_rev_reg(dev->local) < 0x00010205);
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msleep(50);
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return 0;
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@@ -601,6 +601,18 @@
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}
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}
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+static void auto_mdix_on(void)
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+{
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+ ar7_gpio_enable(28);
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+ ar7_gpio_disable(30);
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+}
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+
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+/*static void auto_mdix_off(void)
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+{
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+ ar7_gpio_disable(28);
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+ ar7_gpio_disable(30);
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+}*/
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+
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static void cpmac_get_mac(int instance, unsigned char *dev_addr)
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{
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int i;
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@@ -662,6 +674,7 @@
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u16 chip_id;
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int res;
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u32 *bootcr, val;
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+ void __iomem *mii_reg;
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#ifdef CONFIG_SERIAL_8250
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static struct uart_port uart_port[2];
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@@ -715,27 +728,6 @@
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return res;
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}
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- if (ar7_has_high_cpmac()) {
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- res = fixed_phy_add(PHY_POLL, ar7_is_titan() ? cpmac_high_titan.id : cpmac_high.id,
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- &fixed_phy_status);
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- if (res && res != -ENODEV)
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- return res;
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-
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- cpmac_get_mac(1, ar7_is_titan() ? cpmac_high_data_titan.dev_addr :
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- cpmac_high_data.dev_addr);
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- res = platform_device_register(ar7_is_titan() ? &cpmac_high_titan :
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- &cpmac_high);
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-
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- if (res)
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- return res;
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- } else {
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- if (ar7_is_titan())
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- cpmac_low_data_titan.phy_mask = 0xffffffff;
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- else
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- cpmac_low_data.phy_mask = 0xffffffff;
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-
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- }
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-
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res = fixed_phy_add(PHY_POLL, ar7_is_titan() ? cpmac_low_titan.id :
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cpmac_low.id, &fixed_phy_status);
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if (res && res != -ENODEV)
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@@ -748,6 +740,34 @@
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if (res)
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return res;
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+ if (ar7_has_high_cpmac()) {
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+ res = fixed_phy_add(PHY_POLL, ar7_is_titan() ?
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+ cpmac_high_titan.id : cpmac_high.id,
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+ &fixed_phy_status);
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+ if (res && res != -ENODEV)
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+ return res;
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+
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+ cpmac_get_mac(1, ar7_is_titan() ?
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+ cpmac_high_data_titan.dev_addr :
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+ cpmac_high_data.dev_addr);
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+ res = platform_device_register(ar7_is_titan() ?
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+ &cpmac_high_titan : &cpmac_high);
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+
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+ if (res)
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+ return res;
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+ } else {
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+ mii_reg = ioremap(AR7_REGS_MII, 4);
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+ if (mii_reg) {
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+ writel(readl(mii_reg) | 1, mii_reg);
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+ iounmap(mii_reg);
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+ }
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+
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+ ar7_gpio_disable(17);
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+ mdelay(20);
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+ ar7_gpio_enable(17);
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+ auto_mdix_on();
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+ }
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+
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detect_leds();
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res = platform_device_register(&ar7_gpio_leds);
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if (res)
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@@ -771,8 +791,10 @@
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ar7_wdt_res.end = ar7_wdt_res.start + 0x20;
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bootcr = (u32 *)ioremap_nocache(AR7_REGS_DCL, 4);
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- val = *bootcr;
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- iounmap(bootcr);
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+ if (bootcr) {
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+ val = *bootcr;
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+ iounmap(bootcr);
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+ }
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/* Register watchdog only if enabled in hardware */
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if (val & AR7_WDT_HW_ENA)
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Index: linux-2.6.32.26/arch/mips/include/asm/mach-ar7/ar7.h
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===================================================================
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--- linux-2.6.32.26.orig/arch/mips/include/asm/mach-ar7/ar7.h 2010-11-28 03:22:24.522383766 -0800
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+++ linux-2.6.32.26/arch/mips/include/asm/mach-ar7/ar7.h 2010-11-28 03:22:25.012385426 -0800
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@@ -41,6 +41,7 @@
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#define AR7_REGS_RESET (AR7_REGS_BASE + 0x1600)
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#define AR7_REGS_VLYNQ0 (AR7_REGS_BASE + 0x1800)
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#define AR7_REGS_DCL (AR7_REGS_BASE + 0x1a00)
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+#define AR7_REGS_MII (AR7_REGS_BASE + 0x1a08)
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#define AR7_REGS_VLYNQ1 (AR7_REGS_BASE + 0x1c00)
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#define AR7_REGS_MDIO (AR7_REGS_BASE + 0x1e00)
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#define AR7_REGS_IRQ (AR7_REGS_BASE + 0x2400)
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Index: linux-2.6.32.26/drivers/net/cpmac.c
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===================================================================
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--- linux-2.6.32.26.orig/drivers/net/cpmac.c 2010-11-28 03:22:24.982383427 -0800
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+++ linux-2.6.32.26/drivers/net/cpmac.c 2010-11-28 05:23:59.482390691 -0800
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@@ -668,9 +668,8 @@
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for (i = 0; i < 8; i++)
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cpmac_write(priv->regs, CPMAC_MAC_ADDR_LO(i), dev->dev_addr[5]);
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cpmac_write(priv->regs, CPMAC_MAC_ADDR_MID, dev->dev_addr[4]);
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- cpmac_write(priv->regs, CPMAC_MAC_ADDR_HI, dev->dev_addr[0] |
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- (dev->dev_addr[1] << 8) | (dev->dev_addr[2] << 16) |
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- (dev->dev_addr[3] << 24));
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+ cpmac_write(priv->regs, CPMAC_MAC_ADDR_HI, be32_to_cpu(*(u32 *)
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+ dev->dev_addr));
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cpmac_write(priv->regs, CPMAC_MAX_LENGTH, CPMAC_SKB_SIZE);
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cpmac_write(priv->regs, CPMAC_UNICAST_CLEAR, 0xff);
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cpmac_write(priv->regs, CPMAC_RX_INT_CLEAR, 0xff);
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@@ -1104,8 +1103,6 @@
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.ndo_set_mac_address = eth_mac_addr,
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};
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-static int external_switch;
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-
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static int __devinit cpmac_probe(struct platform_device *pdev)
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{
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int rc, phy_id;
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@@ -1117,24 +1114,26 @@
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pdata = pdev->dev.platform_data;
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- if (external_switch || dumb_switch) {
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- strncpy(mdio_bus_id, "0", MII_BUS_ID_SIZE); /* fixed phys bus */
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- phy_id = pdev->id;
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- } else {
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- for (phy_id = 0; phy_id < PHY_MAX_ADDR; phy_id++) {
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- if (!(pdata->phy_mask & (1 << phy_id)))
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- continue;
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- if (!cpmac_mii->phy_map[phy_id])
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- continue;
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- strncpy(mdio_bus_id, cpmac_mii->id, MII_BUS_ID_SIZE);
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- break;
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- }
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+ if (dumb_switch)
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+ phy_id = PHY_MAX_ADDR;
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+ else for (phy_id = 0; phy_id < PHY_MAX_ADDR; phy_id++) {
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+ if (!((pdata->phy_mask | cpmac_mii->phy_mask) &
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+ (1 << phy_id)))
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+ continue;
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+ if (cpmac_mii->phy_map[phy_id])
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+ continue;
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+ strncpy(mdio_bus_id, cpmac_mii->id, MII_BUS_ID_SIZE);
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+ break;
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}
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if (phy_id == PHY_MAX_ADDR) {
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dev_err(&pdev->dev, "no PHY present, falling back to switch mode\n");
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strncpy(mdio_bus_id, "0", MII_BUS_ID_SIZE); /* fixed phys bus */
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phy_id = pdev->id;
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+ } else {
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+ /* Now disable EPHY and enable MII */
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+ dev_info(&pdev->dev, "trying external MII\n");
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+ ar7_device_disable(AR7_RESET_BIT_EPHY);
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}
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dev = alloc_etherdev_mq(sizeof(*priv), CPMAC_QUEUES);
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@@ -1168,7 +1167,7 @@
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priv->dev = dev;
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priv->ring_size = 64;
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priv->msg_enable = netif_msg_init(debug_level, 0xff);
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- memcpy(dev->dev_addr, pdata->dev_addr, sizeof(dev->dev_addr));
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+ memcpy(dev->dev_addr, pdata->dev_addr, sizeof(pdata->dev_addr));
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snprintf(priv->phy_name, MII_BUS_ID_SIZE, PHY_ID_FMT, mdio_bus_id, phy_id);
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@@ -1244,14 +1243,14 @@
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ar7_gpio_disable(26);
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ar7_gpio_disable(27);
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- if (!ar7_is_titan()) {
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+ if (ar7_is_titan()) {
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+ ar7_device_reset(AR7_RESET_BIT_EPHY);
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+ ar7_device_reset(TITAN_RESET_BIT_EPHY1);
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+ } else {
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ar7_device_reset(AR7_RESET_BIT_CPMAC_LO);
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ar7_device_reset(AR7_RESET_BIT_CPMAC_HI);
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- }
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- ar7_device_reset(AR7_RESET_BIT_EPHY);
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- if (ar7_is_titan()) {
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- ar7_device_reset(TITAN_RESET_BIT_EPHY1);
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+ ar7_device_reset(AR7_RESET_BIT_EPHY);
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}
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cpmac_mii->reset(cpmac_mii);
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@@ -1262,14 +1261,7 @@
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else
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msleep(10);
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- mask &= 0x7fffffff;
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- if (mask & (mask - 1)) {
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- external_switch = 1;
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- mask = 0;
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- }
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-
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- cpmac_mii->phy_mask = ar7_is_titan()? ~(mask | 0x80000000 | 0x40000000):
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- ~(mask | 0x80000000);
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+ cpmac_mii->phy_mask = ~mask;
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snprintf(cpmac_mii->id, MII_BUS_ID_SIZE, "1");
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res = mdiobus_register(cpmac_mii);
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