mirror of
git://projects.qi-hardware.com/openwrt-xburst.git
synced 2024-11-30 05:06:16 +02:00
2cea1e6b9a
openwrt. this gives us the ability to better support different hardware models, without changing any external tar-balls. only et.o and wl.o is missing and is fetched from my webserver. git-svn-id: svn://svn.openwrt.org/openwrt/trunk@379 3c298f89-4303-0410-b956-a3cf2f4a3e73
131 lines
2.5 KiB
C
131 lines
2.5 KiB
C
/*
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* Generic interrupt control functions for Broadcom MIPS boards
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*
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* Copyright 2004, Broadcom Corporation
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* All Rights Reserved.
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*
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* THIS SOFTWARE IS OFFERED "AS IS", AND BROADCOM GRANTS NO WARRANTIES OF ANY
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* KIND, EXPRESS OR IMPLIED, BY STATUTE, COMMUNICATION OR OTHERWISE. BROADCOM
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* SPECIFICALLY DISCLAIMS ANY IMPLIED WARRANTIES OF MERCHANTABILITY, FITNESS
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* FOR A SPECIFIC PURPOSE OR NONINFRINGEMENT CONCERNING THIS SOFTWARE.
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*
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* $Id$
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*/
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#include <linux/config.h>
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#include <linux/init.h>
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#include <linux/kernel.h>
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#include <linux/types.h>
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#include <linux/interrupt.h>
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#include <linux/irq.h>
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#include <asm/irq.h>
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#include <asm/mipsregs.h>
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#include <asm/gdb-stub.h>
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#define ALLINTS (IE_IRQ0 | IE_IRQ1 | IE_IRQ2 | IE_IRQ3 | IE_IRQ4 | IE_IRQ5)
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extern asmlinkage void brcmIRQ(void);
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extern asmlinkage unsigned int do_IRQ(int irq, struct pt_regs *regs);
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void
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brcm_irq_dispatch(struct pt_regs *regs)
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{
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u32 cause;
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cause = read_c0_cause() &
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read_c0_status() &
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CAUSEF_IP;
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#ifdef CONFIG_KERNPROF
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change_c0_status(cause | 1, 1);
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#else
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clear_c0_status(cause);
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#endif
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if (cause & CAUSEF_IP7)
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do_IRQ(7, regs);
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if (cause & CAUSEF_IP2)
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do_IRQ(2, regs);
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if (cause & CAUSEF_IP3)
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do_IRQ(3, regs);
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if (cause & CAUSEF_IP4)
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do_IRQ(4, regs);
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if (cause & CAUSEF_IP5)
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do_IRQ(5, regs);
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if (cause & CAUSEF_IP6)
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do_IRQ(6, regs);
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}
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static void
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enable_brcm_irq(unsigned int irq)
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{
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if (irq < 8)
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set_c0_status(1 << (irq + 8));
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else
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set_c0_status(IE_IRQ0);
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}
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static void
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disable_brcm_irq(unsigned int irq)
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{
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if (irq < 8)
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clear_c0_status(1 << (irq + 8));
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else
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clear_c0_status(IE_IRQ0);
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}
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static void
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ack_brcm_irq(unsigned int irq)
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{
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/* Already done in brcm_irq_dispatch */
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}
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static unsigned int
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startup_brcm_irq(unsigned int irq)
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{
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enable_brcm_irq(irq);
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return 0; /* never anything pending */
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}
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static void
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end_brcm_irq(unsigned int irq)
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{
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if (!(irq_desc[irq].status & (IRQ_DISABLED|IRQ_INPROGRESS)))
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enable_brcm_irq(irq);
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}
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static struct hw_interrupt_type brcm_irq_type = {
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typename: "MIPS",
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startup: startup_brcm_irq,
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shutdown: disable_brcm_irq,
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enable: enable_brcm_irq,
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disable: disable_brcm_irq,
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ack: ack_brcm_irq,
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end: end_brcm_irq,
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NULL
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};
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void __init
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init_IRQ(void)
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{
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int i;
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for (i = 0; i < NR_IRQS; i++) {
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irq_desc[i].status = IRQ_DISABLED;
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irq_desc[i].action = 0;
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irq_desc[i].depth = 1;
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irq_desc[i].handler = &brcm_irq_type;
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}
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set_except_vector(0, brcmIRQ);
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change_c0_status(ST0_IM, ALLINTS);
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#ifdef CONFIG_REMOTE_DEBUG
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printk("Breaking into debugger...\n");
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set_debug_traps();
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breakpoint();
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#endif
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}
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