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openwrt-xburst/target/linux/sibyte/patches-3.3/101-rhone_physmap.patch
juhosg 8e84deb1d4 sibyte: add 3.3 support
git-svn-id: svn://svn.openwrt.org/openwrt/trunk@31680 3c298f89-4303-0410-b956-a3cf2f4a3e73
2012-05-12 10:49:26 +00:00

83 lines
1.8 KiB
Diff

--- a/arch/mips/sibyte/swarm/platform.c
+++ b/arch/mips/sibyte/swarm/platform.c
@@ -5,6 +5,7 @@
#include <linux/platform_device.h>
#include <linux/ata_platform.h>
+#include <asm/addrspace.h>
#include <asm/sibyte/board.h>
#include <asm/sibyte/sb1250_genbus.h>
#include <asm/sibyte/sb1250_regs.h>
@@ -137,3 +138,71 @@ static int __init sb1250_device_init(voi
return ret;
}
device_initcall(sb1250_device_init);
+
+#ifdef CONFIG_SIBYTE_RHONE
+
+#include <linux/mtd/partitions.h>
+#include <linux/mtd/physmap.h>
+
+/* The board has 16MB flash but CFE sets up only 2MB */
+#define PHYS_TO_K1(a) CKSEG1ADDR(a)
+#define BOOTROM_SIZE 0x100
+
+static void fixup_cs0_size(void)
+{
+ SBWRITECSR(((A_IO_EXT_CS_BASE(0)) + R_IO_EXT_MULT_SIZE), BOOTROM_SIZE);
+}
+
+static struct mtd_partition flash_parts[] = {
+ {
+ .name = "cfe",
+ .offset = 0x00000000,
+ .size = 0x00200000,
+ .mask_flags = MTD_WRITEABLE,
+ },
+ {
+ .name = "os",
+ .offset = 0x00200000,
+ .size = 0x00d00000,
+ },
+ {
+ .name = "environment",
+ .offset = 0x00f00000,
+ .size = 0x00100000,
+ .mask_flags = MTD_WRITEABLE,
+ },
+};
+
+static struct physmap_flash_data flash_data = {
+ .width = 1,
+ .nr_parts = ARRAY_SIZE(flash_parts),
+ .parts = flash_parts,
+};
+
+static struct resource flash_resource = {
+ .start = 0x1fc00000,
+ .end = 0x20bfffff,
+ .flags = IORESOURCE_MEM,
+};
+
+static struct platform_device flash_device = {
+ .name = "physmap-flash",
+ .id = 0,
+ .resource = &flash_resource,
+ .num_resources = 1,
+ .dev = {
+ .platform_data = &flash_data,
+ },
+};
+
+static int __init flash_setup(void)
+{
+ fixup_cs0_size();
+ platform_device_register(&flash_device);
+
+ return 0;
+};
+
+device_initcall(flash_setup);
+
+#endif /* CONFIG_SIBYTE_RHONE */