mirror of
git://projects.qi-hardware.com/openwrt-xburst.git
synced 2024-08-22 01:40:15 +03:00
git-svn-id: svn://svn.openwrt.org/openwrt/branches/buildroot-ng/openwrt@4440 3c298f89-4303-0410-b956-a3cf2f4a3e73
86 lines
2.6 KiB
Diff
86 lines
2.6 KiB
Diff
diff -urN gcc-3.4.6/gcc/config/mips/mips.c gcc-3.4.6-nonmips/gcc/config/mips/mips.c
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--- gcc-3.4.6/gcc/config/mips/mips.c 2005-07-31 10:35:15.000000000 +0200
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+++ gcc-3.4.6-nonmips/gcc/config/mips/mips.c 2006-07-19 20:25:03.000000000 +0200
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@@ -3466,26 +3466,26 @@
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for (offset = 0, i = 0; offset + delta <= length; offset += delta, i++)
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{
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regs[i] = gen_reg_rtx (mode);
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- if (MEM_ALIGN (src) >= bits)
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+ //if (MEM_ALIGN (src) >= bits)
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emit_move_insn (regs[i], adjust_address (src, mode, offset));
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- else
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- {
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- rtx part = adjust_address (src, BLKmode, offset);
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- if (!mips_expand_unaligned_load (regs[i], part, bits, 0))
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- abort ();
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- }
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+ //else
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+ //{
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+ //rtx part = adjust_address (src, BLKmode, offset);
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+ //if (!mips_expand_unaligned_load (regs[i], part, bits, 0))
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+ //abort ();
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+ //}
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}
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/* Copy the chunks to the destination. */
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for (offset = 0, i = 0; offset + delta <= length; offset += delta, i++)
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- if (MEM_ALIGN (dest) >= bits)
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+ //if (MEM_ALIGN (dest) >= bits)
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emit_move_insn (adjust_address (dest, mode, offset), regs[i]);
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- else
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- {
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- rtx part = adjust_address (dest, BLKmode, offset);
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- if (!mips_expand_unaligned_store (part, regs[i], bits, 0))
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- abort ();
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- }
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+ //else
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+ //{
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+ //rtx part = adjust_address (dest, BLKmode, offset);
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+ //if (!mips_expand_unaligned_store (part, regs[i], bits, 0))
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+ //abort ();
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+ //}
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/* Mop up any left-over bytes. */
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if (offset < length)
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@@ -4488,6 +4488,7 @@
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mips_expand_unaligned_load (rtx dest, rtx src, unsigned int width, int bitpos)
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{
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rtx left, right, temp;
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+ return false;
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/* If TARGET_64BIT, the destination of a 32-bit load will be a
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paradoxical word_mode subreg. This is the only case in which
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@@ -4514,8 +4515,9 @@
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}
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else
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{
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- emit_insn (gen_mov_lwl (temp, src, left));
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- emit_insn (gen_mov_lwr (dest, copy_rtx (src), right, temp));
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+ return false;
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+ //emit_insn (gen_mov_lwl (temp, src, left));
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+ //emit_insn (gen_mov_lwr (dest, copy_rtx (src), right, temp));
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}
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return true;
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}
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@@ -4528,6 +4530,7 @@
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mips_expand_unaligned_store (rtx dest, rtx src, unsigned int width, int bitpos)
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{
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rtx left, right;
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+ return false;
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if (!mips_get_unaligned_mem (&dest, width, bitpos, &left, &right))
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return false;
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@@ -4541,8 +4544,10 @@
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}
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else
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{
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- emit_insn (gen_mov_swl (dest, src, left));
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- emit_insn (gen_mov_swr (copy_rtx (dest), copy_rtx (src), right));
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+ /* Patented instructions */
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+ //emit_insn (gen_mov_swl (dest, src, left));
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+ //emit_insn (gen_mov_swr (copy_rtx (dest), copy_rtx (src), right));
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+ return false;
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}
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return true;
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}
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