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git://projects.qi-hardware.com/openwrt-xburst.git
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9823d2fc7e
Fixes broken ethernet on the Planex MZK-W04NU/W300NH boards. Cc: bacfire@openwrt.org git-svn-id: svn://svn.openwrt.org/openwrt/trunk@20753 3c298f89-4303-0410-b956-a3cf2f4a3e73
838 lines
19 KiB
C
838 lines
19 KiB
C
/*
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* ar8216.c: AR8216 switch driver
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*
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* Copyright (C) 2009 Felix Fietkau <nbd@openwrt.org>
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*
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* This program is free software; you can redistribute it and/or
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* modify it under the terms of the GNU General Public License
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* as published by the Free Software Foundation; either version 2
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* of the License, or (at your option) any later version.
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*
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* This program is distributed in the hope that it will be useful,
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* but WITHOUT ANY WARRANTY; without even the implied warranty of
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* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
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* GNU General Public License for more details.
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*/
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#include <linux/if.h>
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#include <linux/module.h>
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#include <linux/init.h>
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#include <linux/list.h>
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#include <linux/if_ether.h>
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#include <linux/skbuff.h>
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#include <linux/netdevice.h>
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#include <linux/netlink.h>
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#include <linux/bitops.h>
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#include <net/genetlink.h>
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#include <linux/switch.h>
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#include <linux/delay.h>
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#include <linux/phy.h>
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#include <linux/netdevice.h>
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#include <linux/etherdevice.h>
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#include "ar8216.h"
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/* size of the vlan table */
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#define AR8X16_MAX_VLANS 128
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#define AR8X16_PROBE_RETRIES 10
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struct ar8216_priv {
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struct switch_dev dev;
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struct phy_device *phy;
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u32 (*read)(struct ar8216_priv *priv, int reg);
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void (*write)(struct ar8216_priv *priv, int reg, u32 val);
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const struct net_device_ops *ndo_old;
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struct net_device_ops ndo;
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struct mutex reg_mutex;
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int chip;
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/* all fields below are cleared on reset */
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bool vlan;
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u16 vlan_id[AR8X16_MAX_VLANS];
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u8 vlan_table[AR8X16_MAX_VLANS];
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u8 vlan_tagged;
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u16 pvid[AR8216_NUM_PORTS];
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};
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static struct switch_dev athdev;
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#define to_ar8216(_dev) container_of(_dev, struct ar8216_priv, dev)
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static inline void
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split_addr(u32 regaddr, u16 *r1, u16 *r2, u16 *page)
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{
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regaddr >>= 1;
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*r1 = regaddr & 0x1e;
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regaddr >>= 5;
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*r2 = regaddr & 0x7;
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regaddr >>= 3;
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*page = regaddr & 0x1ff;
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}
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static u32
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ar8216_mii_read(struct ar8216_priv *priv, int reg)
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{
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struct phy_device *phy = priv->phy;
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u16 r1, r2, page;
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u16 lo, hi;
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split_addr((u32) reg, &r1, &r2, &page);
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phy->bus->write(phy->bus, 0x18, 0, page);
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msleep(1); /* wait for the page switch to propagate */
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lo = phy->bus->read(phy->bus, 0x10 | r2, r1);
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hi = phy->bus->read(phy->bus, 0x10 | r2, r1 + 1);
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return (hi << 16) | lo;
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}
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static void
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ar8216_mii_write(struct ar8216_priv *priv, int reg, u32 val)
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{
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struct phy_device *phy = priv->phy;
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u16 r1, r2, r3;
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u16 lo, hi;
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split_addr((u32) reg, &r1, &r2, &r3);
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phy->bus->write(phy->bus, 0x18, 0, r3);
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msleep(1); /* wait for the page switch to propagate */
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lo = val & 0xffff;
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hi = (u16) (val >> 16);
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phy->bus->write(phy->bus, 0x10 | r2, r1 + 1, hi);
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phy->bus->write(phy->bus, 0x10 | r2, r1, lo);
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}
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static u32
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ar8216_rmw(struct ar8216_priv *priv, int reg, u32 mask, u32 val)
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{
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u32 v;
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v = priv->read(priv, reg);
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v &= ~mask;
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v |= val;
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priv->write(priv, reg, v);
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return v;
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}
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static inline int
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ar8216_id_chip(struct ar8216_priv *priv)
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{
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u32 val;
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u16 id;
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int i;
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val = ar8216_mii_read(priv, AR8216_REG_CTRL);
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if (val == ~0)
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return UNKNOWN;
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id = val & (AR8216_CTRL_REVISION | AR8216_CTRL_VERSION);
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for (i = 0; i < AR8X16_PROBE_RETRIES; i++) {
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u16 t;
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val = ar8216_mii_read(priv, AR8216_REG_CTRL);
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if (val == ~0)
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return UNKNOWN;
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t = val & (AR8216_CTRL_REVISION | AR8216_CTRL_VERSION);
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if (t != id)
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return UNKNOWN;
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}
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switch (id) {
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case 0x0101:
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return AR8216;
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case 0x1001:
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return AR8316;
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default:
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printk(KERN_ERR
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"ar8216: Unknown Atheros device [ver=%d, rev=%d, phy_id=%04x%04x]\n",
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(int)(val >> AR8216_CTRL_VERSION_S),
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(int)(val & AR8216_CTRL_REVISION),
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priv->phy->bus->read(priv->phy->bus, priv->phy->addr, 2),
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priv->phy->bus->read(priv->phy->bus, priv->phy->addr, 3));
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return UNKNOWN;
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}
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}
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static int
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ar8216_set_vlan(struct switch_dev *dev, const struct switch_attr *attr,
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struct switch_val *val)
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{
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struct ar8216_priv *priv = to_ar8216(dev);
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priv->vlan = !!val->value.i;
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return 0;
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}
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static int
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ar8216_get_vlan(struct switch_dev *dev, const struct switch_attr *attr,
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struct switch_val *val)
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{
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struct ar8216_priv *priv = to_ar8216(dev);
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val->value.i = priv->vlan;
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return 0;
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}
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static int
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ar8216_set_pvid(struct switch_dev *dev, int port, int vlan)
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{
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struct ar8216_priv *priv = to_ar8216(dev);
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/* make sure no invalid PVIDs get set */
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if (vlan >= dev->vlans)
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return -EINVAL;
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priv->pvid[port] = vlan;
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return 0;
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}
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static int
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ar8216_get_pvid(struct switch_dev *dev, int port, int *vlan)
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{
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struct ar8216_priv *priv = to_ar8216(dev);
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*vlan = priv->pvid[port];
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return 0;
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}
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static int
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ar8216_set_vid(struct switch_dev *dev, const struct switch_attr *attr,
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struct switch_val *val)
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{
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struct ar8216_priv *priv = to_ar8216(dev);
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priv->vlan_id[val->port_vlan] = val->value.i;
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return 0;
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}
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static int
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ar8216_get_vid(struct switch_dev *dev, const struct switch_attr *attr,
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struct switch_val *val)
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{
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struct ar8216_priv *priv = to_ar8216(dev);
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val->value.i = priv->vlan_id[val->port_vlan];
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return 0;
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}
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static int
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ar8216_mangle_tx(struct sk_buff *skb, struct net_device *dev)
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{
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struct ar8216_priv *priv = dev->phy_ptr;
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unsigned char *buf;
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if (unlikely(!priv))
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goto error;
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if (!priv->vlan)
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goto send;
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if (unlikely(skb_headroom(skb) < 2)) {
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if (pskb_expand_head(skb, 2, 0, GFP_ATOMIC) < 0)
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goto error;
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}
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buf = skb_push(skb, 2);
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buf[0] = 0x10;
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buf[1] = 0x80;
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send:
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return priv->ndo_old->ndo_start_xmit(skb, dev);
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error:
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dev_kfree_skb_any(skb);
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return 0;
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}
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static int
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ar8216_mangle_rx(struct sk_buff *skb, int napi)
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{
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struct ar8216_priv *priv;
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struct net_device *dev;
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unsigned char *buf;
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int port, vlan;
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dev = skb->dev;
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if (!dev)
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goto error;
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priv = dev->phy_ptr;
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if (!priv)
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goto error;
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/* don't strip the header if vlan mode is disabled */
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if (!priv->vlan)
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goto recv;
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/* strip header, get vlan id */
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buf = skb->data;
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skb_pull(skb, 2);
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/* check for vlan header presence */
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if ((buf[12 + 2] != 0x81) || (buf[13 + 2] != 0x00))
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goto recv;
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port = buf[0] & 0xf;
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/* no need to fix up packets coming from a tagged source */
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if (priv->vlan_tagged & (1 << port))
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goto recv;
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/* lookup port vid from local table, the switch passes an invalid vlan id */
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vlan = priv->vlan_id[priv->pvid[port]];
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buf[14 + 2] &= 0xf0;
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buf[14 + 2] |= vlan >> 8;
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buf[15 + 2] = vlan & 0xff;
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recv:
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skb->protocol = eth_type_trans(skb, skb->dev);
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if (napi)
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return netif_receive_skb(skb);
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else
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return netif_rx(skb);
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error:
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/* no vlan? eat the packet! */
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dev_kfree_skb_any(skb);
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return 0;
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}
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static int
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ar8216_netif_rx(struct sk_buff *skb)
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{
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return ar8216_mangle_rx(skb, 0);
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}
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static int
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ar8216_netif_receive_skb(struct sk_buff *skb)
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{
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return ar8216_mangle_rx(skb, 1);
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}
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static struct switch_attr ar8216_globals[] = {
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{
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.type = SWITCH_TYPE_INT,
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.name = "enable_vlan",
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.description = "Enable VLAN mode",
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.set = ar8216_set_vlan,
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.get = ar8216_get_vlan,
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.max = 1
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},
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};
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static struct switch_attr ar8216_port[] = {
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};
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static struct switch_attr ar8216_vlan[] = {
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{
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.type = SWITCH_TYPE_INT,
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.name = "pvid",
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.description = "VLAN ID",
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.set = ar8216_set_vid,
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.get = ar8216_get_vid,
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.max = 4094,
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},
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};
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static int
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ar8216_get_ports(struct switch_dev *dev, struct switch_val *val)
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{
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struct ar8216_priv *priv = to_ar8216(dev);
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u8 ports = priv->vlan_table[val->port_vlan];
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int i;
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val->len = 0;
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for (i = 0; i < AR8216_NUM_PORTS; i++) {
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struct switch_port *p;
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if (!(ports & (1 << i)))
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continue;
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p = &val->value.ports[val->len++];
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p->id = i;
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if (priv->vlan_tagged & (1 << i))
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p->flags = (1 << SWITCH_PORT_FLAG_TAGGED);
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else
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p->flags = 0;
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}
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return 0;
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}
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static int
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ar8216_set_ports(struct switch_dev *dev, struct switch_val *val)
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{
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struct ar8216_priv *priv = to_ar8216(dev);
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u8 *vt = &priv->vlan_table[val->port_vlan];
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int i, j;
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*vt = 0;
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for (i = 0; i < val->len; i++) {
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struct switch_port *p = &val->value.ports[i];
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if (p->flags & (1 << SWITCH_PORT_FLAG_TAGGED))
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priv->vlan_tagged |= (1 << p->id);
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else {
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priv->vlan_tagged &= ~(1 << p->id);
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priv->pvid[p->id] = val->port_vlan;
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/* make sure that an untagged port does not
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* appear in other vlans */
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for (j = 0; j < AR8X16_MAX_VLANS; j++) {
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if (j == val->port_vlan)
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continue;
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priv->vlan_table[j] &= ~(1 << p->id);
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}
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}
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*vt |= 1 << p->id;
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}
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return 0;
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}
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static int
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ar8216_wait_bit(struct ar8216_priv *priv, int reg, u32 mask, u32 val)
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{
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int timeout = 20;
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while ((priv->read(priv, reg) & mask) != val) {
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if (timeout-- <= 0) {
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printk(KERN_ERR "ar8216: timeout waiting for operation to complete\n");
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return 1;
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}
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}
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return 0;
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}
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static void
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ar8216_vtu_op(struct ar8216_priv *priv, u32 op, u32 val)
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{
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if (ar8216_wait_bit(priv, AR8216_REG_VTU, AR8216_VTU_ACTIVE, 0))
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return;
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if ((op & AR8216_VTU_OP) == AR8216_VTU_OP_LOAD) {
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val &= AR8216_VTUDATA_MEMBER;
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val |= AR8216_VTUDATA_VALID;
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priv->write(priv, AR8216_REG_VTU_DATA, val);
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}
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op |= AR8216_VTU_ACTIVE;
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priv->write(priv, AR8216_REG_VTU, op);
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}
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static int
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ar8216_hw_apply(struct switch_dev *dev)
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{
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struct ar8216_priv *priv = to_ar8216(dev);
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u8 portmask[AR8216_NUM_PORTS];
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int i, j;
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mutex_lock(&priv->reg_mutex);
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/* flush all vlan translation unit entries */
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ar8216_vtu_op(priv, AR8216_VTU_OP_FLUSH, 0);
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memset(portmask, 0, sizeof(portmask));
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if (priv->vlan) {
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/* calculate the port destination masks and load vlans
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* into the vlan translation unit */
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for (j = 0; j < AR8X16_MAX_VLANS; j++) {
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u8 vp = priv->vlan_table[j];
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if (!vp)
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continue;
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for (i = 0; i < AR8216_NUM_PORTS; i++) {
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u8 mask = (1 << i);
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if (vp & mask)
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portmask[i] |= vp & ~mask;
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}
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ar8216_vtu_op(priv,
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AR8216_VTU_OP_LOAD |
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(priv->vlan_id[j] << AR8216_VTU_VID_S),
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priv->vlan_table[j]);
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}
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} else {
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/* vlan disabled:
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* isolate all ports, but connect them to the cpu port */
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for (i = 0; i < AR8216_NUM_PORTS; i++) {
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if (i == AR8216_PORT_CPU)
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continue;
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portmask[i] = 1 << AR8216_PORT_CPU;
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portmask[AR8216_PORT_CPU] |= (1 << i);
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}
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}
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/* update the port destination mask registers and tag settings */
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for (i = 0; i < AR8216_NUM_PORTS; i++) {
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int egress, ingress;
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int pvid;
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if (priv->vlan) {
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pvid = priv->vlan_id[priv->pvid[i]];
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} else {
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pvid = i;
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}
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if (priv->vlan && (priv->vlan_tagged & (1 << i))) {
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egress = AR8216_OUT_ADD_VLAN;
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} else {
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egress = AR8216_OUT_STRIP_VLAN;
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}
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if (priv->vlan) {
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ingress = AR8216_IN_SECURE;
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} else {
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ingress = AR8216_IN_PORT_ONLY;
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}
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ar8216_rmw(priv, AR8216_REG_PORT_CTRL(i),
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AR8216_PORT_CTRL_LEARN | AR8216_PORT_CTRL_VLAN_MODE |
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AR8216_PORT_CTRL_SINGLE_VLAN | AR8216_PORT_CTRL_STATE |
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AR8216_PORT_CTRL_HEADER | AR8216_PORT_CTRL_LEARN_LOCK,
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AR8216_PORT_CTRL_LEARN |
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(priv->vlan && i == AR8216_PORT_CPU && (priv->chip == AR8216) ?
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AR8216_PORT_CTRL_HEADER : 0) |
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(egress << AR8216_PORT_CTRL_VLAN_MODE_S) |
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(AR8216_PORT_STATE_FORWARD << AR8216_PORT_CTRL_STATE_S));
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ar8216_rmw(priv, AR8216_REG_PORT_VLAN(i),
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AR8216_PORT_VLAN_DEST_PORTS | AR8216_PORT_VLAN_MODE |
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AR8216_PORT_VLAN_DEFAULT_ID,
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(portmask[i] << AR8216_PORT_VLAN_DEST_PORTS_S) |
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(ingress << AR8216_PORT_VLAN_MODE_S) |
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(pvid << AR8216_PORT_VLAN_DEFAULT_ID_S));
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}
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mutex_unlock(&priv->reg_mutex);
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return 0;
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}
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static int
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ar8316_hw_init(struct ar8216_priv *priv) {
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static int initialized;
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int i;
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|
u32 val;
|
|
struct mii_bus *bus;
|
|
|
|
if (initialized)
|
|
return 0;
|
|
|
|
val = priv->read(priv, 0x8);
|
|
|
|
if (priv->phy->interface == PHY_INTERFACE_MODE_RGMII) {
|
|
/* value taken from Ubiquiti RouterStation Pro */
|
|
if (val == 0x81461bea) {
|
|
/* switch already intialized by bootloader */
|
|
initialized = true;
|
|
return 0;
|
|
}
|
|
priv->write(priv, 0x8, 0x81461bea);
|
|
} else if (priv->phy->interface == PHY_INTERFACE_MODE_GMII) {
|
|
/* value taken from AVM Fritz!Box 7390 sources */
|
|
if (val == 0x010e5b71) {
|
|
/* switch already initialized by bootloader */
|
|
initialized = true;
|
|
return 0;
|
|
}
|
|
priv->write(priv, 0x8, 0x010e5b71);
|
|
} else {
|
|
/* no known value for phy interface */
|
|
printk(KERN_ERR "ar8316: unsupported mii mode: %d.\n",
|
|
priv->phy->interface);
|
|
return -EINVAL;
|
|
}
|
|
|
|
/* standard atheros magic */
|
|
priv->write(priv, 0x38, 0xc000050e);
|
|
|
|
/* Initialize the ports */
|
|
bus = priv->phy->bus;
|
|
for (i = 0; i < 5; i++) {
|
|
if ((i == 4) &&
|
|
priv->phy->interface == PHY_INTERFACE_MODE_RGMII) {
|
|
/* work around for phy4 rgmii mode */
|
|
bus->write(bus, i, MII_ATH_DBG_ADDR, 0x12);
|
|
bus->write(bus, i, MII_ATH_DBG_DATA, 0x480c);
|
|
/* rx delay */
|
|
bus->write(bus, i, MII_ATH_DBG_ADDR, 0x0);
|
|
bus->write(bus, i, MII_ATH_DBG_DATA, 0x824e);
|
|
/* tx delay */
|
|
bus->write(bus, i, MII_ATH_DBG_ADDR, 0x5);
|
|
bus->write(bus, i, MII_ATH_DBG_DATA, 0x3d47);
|
|
msleep(1000);
|
|
}
|
|
|
|
/* initialize the port itself */
|
|
bus->write(bus, i, MII_ADVERTISE,
|
|
ADVERTISE_ALL | ADVERTISE_PAUSE_CAP | ADVERTISE_PAUSE_ASYM);
|
|
bus->write(bus, i, MII_CTRL1000, ADVERTISE_1000FULL);
|
|
bus->write(bus, i, MII_BMCR, BMCR_RESET | BMCR_ANENABLE);
|
|
msleep(1000);
|
|
}
|
|
initialized = true;
|
|
return 0;
|
|
}
|
|
|
|
static int
|
|
ar8216_reset_switch(struct switch_dev *dev)
|
|
{
|
|
struct ar8216_priv *priv = to_ar8216(dev);
|
|
int i;
|
|
|
|
mutex_lock(&priv->reg_mutex);
|
|
memset(&priv->vlan, 0, sizeof(struct ar8216_priv) -
|
|
offsetof(struct ar8216_priv, vlan));
|
|
for (i = 0; i < AR8X16_MAX_VLANS; i++) {
|
|
priv->vlan_id[i] = i;
|
|
}
|
|
for (i = 0; i < AR8216_NUM_PORTS; i++) {
|
|
/* Enable port learning and tx */
|
|
priv->write(priv, AR8216_REG_PORT_CTRL(i),
|
|
AR8216_PORT_CTRL_LEARN |
|
|
(4 << AR8216_PORT_CTRL_STATE_S));
|
|
|
|
priv->write(priv, AR8216_REG_PORT_VLAN(i), 0);
|
|
|
|
/* Configure all PHYs */
|
|
if (i == AR8216_PORT_CPU) {
|
|
priv->write(priv, AR8216_REG_PORT_STATUS(i),
|
|
AR8216_PORT_STATUS_LINK_UP |
|
|
((priv->chip == AR8316) ?
|
|
AR8216_PORT_SPEED_1000M : AR8216_PORT_SPEED_100M) |
|
|
AR8216_PORT_STATUS_TXMAC |
|
|
AR8216_PORT_STATUS_RXMAC |
|
|
((priv->chip == AR8316) ? AR8216_PORT_STATUS_RXFLOW : 0) |
|
|
((priv->chip == AR8316) ? AR8216_PORT_STATUS_TXFLOW : 0) |
|
|
AR8216_PORT_STATUS_DUPLEX);
|
|
} else {
|
|
priv->write(priv, AR8216_REG_PORT_STATUS(i),
|
|
AR8216_PORT_STATUS_LINK_AUTO);
|
|
}
|
|
}
|
|
/* XXX: undocumented magic from atheros, required! */
|
|
priv->write(priv, 0x38, 0xc000050e);
|
|
|
|
if (priv->chip == AR8216) {
|
|
ar8216_rmw(priv, AR8216_REG_GLOBAL_CTRL,
|
|
AR8216_GCTRL_MTU, 1518 + 8 + 2);
|
|
} else if (priv->chip == AR8316) {
|
|
/* enable jumbo frames */
|
|
ar8216_rmw(priv, AR8216_REG_GLOBAL_CTRL,
|
|
AR8316_GCTRL_MTU, 9018 + 8 + 2);
|
|
}
|
|
|
|
if (priv->chip == AR8316) {
|
|
/* enable cpu port to receive multicast and broadcast frames */
|
|
priv->write(priv, AR8216_REG_FLOOD_MASK, 0x003f003f);
|
|
}
|
|
mutex_unlock(&priv->reg_mutex);
|
|
return ar8216_hw_apply(dev);
|
|
}
|
|
|
|
static int
|
|
ar8216_config_init(struct phy_device *pdev)
|
|
{
|
|
struct ar8216_priv *priv;
|
|
struct net_device *dev = pdev->attached_dev;
|
|
int ret;
|
|
|
|
priv = kzalloc(sizeof(struct ar8216_priv), GFP_KERNEL);
|
|
if (priv == NULL)
|
|
return -ENOMEM;
|
|
|
|
priv->phy = pdev;
|
|
|
|
priv->chip = ar8216_id_chip(priv);
|
|
|
|
printk(KERN_INFO "%s: AR%d PHY driver attached.\n",
|
|
pdev->attached_dev->name, priv->chip);
|
|
|
|
if (pdev->addr != 0) {
|
|
if (priv->chip == AR8316) {
|
|
pdev->supported |= SUPPORTED_1000baseT_Full;
|
|
pdev->advertising |= ADVERTISED_1000baseT_Full;
|
|
}
|
|
kfree(priv);
|
|
return 0;
|
|
}
|
|
|
|
pdev->supported = priv->chip == AR8316 ?
|
|
SUPPORTED_1000baseT_Full : SUPPORTED_100baseT_Full;
|
|
pdev->advertising = pdev->supported;
|
|
|
|
mutex_init(&priv->reg_mutex);
|
|
priv->read = ar8216_mii_read;
|
|
priv->write = ar8216_mii_write;
|
|
memcpy(&priv->dev, &athdev, sizeof(struct switch_dev));
|
|
pdev->priv = priv;
|
|
|
|
if (priv->chip == AR8316) {
|
|
priv->dev.name = "Atheros AR8316";
|
|
priv->dev.vlans = AR8X16_MAX_VLANS;
|
|
/* port 5 connected to the other mac, therefore unusable */
|
|
priv->dev.ports = (AR8216_NUM_PORTS - 1);
|
|
}
|
|
|
|
if ((ret = register_switch(&priv->dev, pdev->attached_dev)) < 0) {
|
|
kfree(priv);
|
|
goto done;
|
|
}
|
|
|
|
if (priv->chip == AR8316) {
|
|
ret = ar8316_hw_init(priv);
|
|
if (ret) {
|
|
kfree(priv);
|
|
goto done;
|
|
}
|
|
}
|
|
|
|
ret = ar8216_reset_switch(&priv->dev);
|
|
if (ret) {
|
|
kfree(priv);
|
|
goto done;
|
|
}
|
|
|
|
dev->phy_ptr = priv;
|
|
|
|
/* VID fixup only needed on ar8216 */
|
|
if (pdev->addr == 0 && priv->chip == AR8216) {
|
|
pdev->pkt_align = 2;
|
|
pdev->netif_receive_skb = ar8216_netif_receive_skb;
|
|
pdev->netif_rx = ar8216_netif_rx;
|
|
priv->ndo_old = dev->netdev_ops;
|
|
memcpy(&priv->ndo, priv->ndo_old, sizeof(struct net_device_ops));
|
|
priv->ndo.ndo_start_xmit = ar8216_mangle_tx;
|
|
dev->netdev_ops = &priv->ndo;
|
|
}
|
|
|
|
done:
|
|
return ret;
|
|
}
|
|
|
|
static int
|
|
ar8216_read_status(struct phy_device *phydev)
|
|
{
|
|
struct ar8216_priv *priv = phydev->priv;
|
|
int ret;
|
|
if (phydev->addr != 0) {
|
|
return genphy_read_status(phydev);
|
|
}
|
|
|
|
phydev->speed = priv->chip == AR8316 ? SPEED_1000 : SPEED_100;
|
|
phydev->duplex = DUPLEX_FULL;
|
|
phydev->link = 1;
|
|
|
|
/* flush the address translation unit */
|
|
mutex_lock(&priv->reg_mutex);
|
|
ret = ar8216_wait_bit(priv, AR8216_REG_ATU, AR8216_ATU_ACTIVE, 0);
|
|
|
|
if (!ret)
|
|
priv->write(priv, AR8216_REG_ATU, AR8216_ATU_OP_FLUSH);
|
|
else
|
|
ret = -ETIMEDOUT;
|
|
mutex_unlock(&priv->reg_mutex);
|
|
|
|
phydev->state = PHY_RUNNING;
|
|
netif_carrier_on(phydev->attached_dev);
|
|
phydev->adjust_link(phydev->attached_dev);
|
|
|
|
return ret;
|
|
}
|
|
|
|
static int
|
|
ar8216_config_aneg(struct phy_device *phydev)
|
|
{
|
|
if (phydev->addr == 0)
|
|
return 0;
|
|
|
|
return genphy_config_aneg(phydev);
|
|
}
|
|
|
|
static int
|
|
ar8216_probe(struct phy_device *pdev)
|
|
{
|
|
struct ar8216_priv priv;
|
|
u16 chip;
|
|
|
|
priv.phy = pdev;
|
|
chip = ar8216_id_chip(&priv);
|
|
if (chip == UNKNOWN)
|
|
return -ENODEV;
|
|
|
|
return 0;
|
|
}
|
|
|
|
static void
|
|
ar8216_remove(struct phy_device *pdev)
|
|
{
|
|
struct ar8216_priv *priv = pdev->priv;
|
|
struct net_device *dev = pdev->attached_dev;
|
|
|
|
if (!priv)
|
|
return;
|
|
|
|
if (priv->ndo_old && dev)
|
|
dev->netdev_ops = priv->ndo_old;
|
|
if (pdev->addr == 0)
|
|
unregister_switch(&priv->dev);
|
|
kfree(priv);
|
|
}
|
|
|
|
/* template */
|
|
static struct switch_dev athdev = {
|
|
.name = "Atheros AR8216",
|
|
.cpu_port = AR8216_PORT_CPU,
|
|
.ports = AR8216_NUM_PORTS,
|
|
.vlans = AR8216_NUM_VLANS,
|
|
.attr_global = {
|
|
.attr = ar8216_globals,
|
|
.n_attr = ARRAY_SIZE(ar8216_globals),
|
|
},
|
|
.attr_port = {
|
|
.attr = ar8216_port,
|
|
.n_attr = ARRAY_SIZE(ar8216_port),
|
|
},
|
|
.attr_vlan = {
|
|
.attr = ar8216_vlan,
|
|
.n_attr = ARRAY_SIZE(ar8216_vlan),
|
|
},
|
|
.get_port_pvid = ar8216_get_pvid,
|
|
.set_port_pvid = ar8216_set_pvid,
|
|
.get_vlan_ports = ar8216_get_ports,
|
|
.set_vlan_ports = ar8216_set_ports,
|
|
.apply_config = ar8216_hw_apply,
|
|
.reset_switch = ar8216_reset_switch,
|
|
};
|
|
|
|
static struct phy_driver ar8216_driver = {
|
|
.phy_id = 0x004d0000,
|
|
.name = "Atheros AR8216/AR8316",
|
|
.phy_id_mask = 0xffff0000,
|
|
.features = PHY_BASIC_FEATURES,
|
|
.probe = ar8216_probe,
|
|
.remove = ar8216_remove,
|
|
.config_init = &ar8216_config_init,
|
|
.config_aneg = &ar8216_config_aneg,
|
|
.read_status = &ar8216_read_status,
|
|
.driver = { .owner = THIS_MODULE },
|
|
};
|
|
|
|
int __init
|
|
ar8216_init(void)
|
|
{
|
|
return phy_driver_register(&ar8216_driver);
|
|
}
|
|
|
|
void __exit
|
|
ar8216_exit(void)
|
|
{
|
|
phy_driver_unregister(&ar8216_driver);
|
|
}
|
|
|
|
module_init(ar8216_init);
|
|
module_exit(ar8216_exit);
|
|
MODULE_LICENSE("GPL");
|
|
|