mirror of
git://projects.qi-hardware.com/openwrt-xburst.git
synced 2024-11-28 10:47:30 +02:00
14f0acdc28
git-svn-id: svn://svn.openwrt.org/openwrt/trunk@31573 3c298f89-4303-0410-b956-a3cf2f4a3e73
139 lines
3.1 KiB
Diff
139 lines
3.1 KiB
Diff
--- a/arch/mips/bcm47xx/nvram.c
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+++ b/arch/mips/bcm47xx/nvram.c
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@@ -20,11 +20,12 @@
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#include <asm/addrspace.h>
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#include <asm/mach-bcm47xx/nvram.h>
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#include <asm/mach-bcm47xx/bcm47xx.h>
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+#include <asm/mach-bcm47xx/bus.h>
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static char nvram_buf[NVRAM_SPACE];
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/* Probe for NVRAM header */
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-static void early_nvram_init(void)
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+static void early_nvram_init_pflash(void)
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{
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#ifdef CONFIG_BCM47XX_SSB
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struct ssb_chipcommon *ssb_cc;
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@@ -50,9 +51,6 @@ static void early_nvram_init(void)
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#ifdef CONFIG_BCM47XX_BCMA
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case BCM47XX_BUS_TYPE_BCMA:
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bcma_cc = &bcm47xx_bus.bcma.bus.drv_cc;
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- if (bcma_cc->flash_type != BCMA_PFLASH)
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- return;
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-
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base = bcma_cc->pflash.window;
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lim = bcma_cc->pflash.window_size;
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break;
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@@ -86,7 +84,110 @@ found:
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for (i = 0; i < sizeof(struct nvram_header); i += 4)
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*dst++ = *src++;
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for (; i < header->len && i < NVRAM_SPACE; i += 4)
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- *dst++ = le32_to_cpu(*src++);
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+ *dst++ = *src++;
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+}
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+
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+static int early_nvram_init_sflash(void)
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+{
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+ struct nvram_header header;
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+ u32 off;
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+ int ret;
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+ char *dst;
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+ int len;
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+
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+ /* check if the struct is already initilized */
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+ if (!bcm47xx_sflash.size)
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+ return -1;
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+
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+ off = FLASH_MIN;
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+ while (off <= bcm47xx_sflash.size) {
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+ ret = bcm47xx_sflash.read(&bcm47xx_sflash, off - NVRAM_SPACE, sizeof(header), (u8 *)&header);
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+ if (ret != sizeof(header))
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+ return ret;
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+ if (header.magic == NVRAM_HEADER)
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+ goto found;
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+ off <<= 1;
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+ }
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+
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+ off = FLASH_MIN;
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+ while (off <= bcm47xx_sflash.size) {
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+ ret = bcm47xx_sflash.read(&bcm47xx_sflash, off - (2 * NVRAM_SPACE), sizeof(header), (u8 *)&header);
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+ if (ret != sizeof(header))
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+ return ret;
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+ if (header.magic == NVRAM_HEADER)
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+ goto found;
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+ off <<= 1;
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+ }
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+ return -1;
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+
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+found:
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+ len = NVRAM_SPACE;
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+ dst = nvram_buf;
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+ while (len) {
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+ ret = bcm47xx_sflash.read(&bcm47xx_sflash, off - (2 * NVRAM_SPACE), len, dst);
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+ if (ret < 0)
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+ return ret;
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+ off += ret;
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+ len -= ret;
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+ dst += ret;
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+ }
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+ return 0;
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+}
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+
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+#ifdef CONFIG_BCM47XX_SSB
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+static void early_nvram_init_ssb(void)
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+{
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+ int err;
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+
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+ switch (bcm47xx_bus.ssb.chipco.flash_type) {
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+ case SSB_PFLASH:
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+ early_nvram_init_pflash();
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+ break;
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+ case SSB_SFLASH:
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+ err = early_nvram_init_sflash();
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+ if (err < 0)
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+ printk(KERN_WARNING "can not read from flash: %i\n", err);
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+ break;
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+ default:
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+ printk(KERN_WARNING "unknow flash type\n");
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+ }
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+}
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+#endif
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+
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+#ifdef CONFIG_BCM47XX_BCMA
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+static void early_nvram_init_bcma(void)
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+{
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+ int err;
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+
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+ switch (bcm47xx_bus.bcma.bus.drv_cc.flash_type) {
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+ case BCMA_PFLASH:
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+ early_nvram_init_pflash();
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+ break;
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+ case BCMA_SFLASH:
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+ err = early_nvram_init_sflash();
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+ if (err < 0)
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+ printk(KERN_WARNING "can not read from flash: %i\n", err);
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+ break;
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+ default:
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+ printk(KERN_WARNING "unknow flash type\n");
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+ }
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+}
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+#endif
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+
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+static void early_nvram_init(void)
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+{
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+ switch (bcm47xx_bus_type) {
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+#ifdef CONFIG_BCM47XX_SSB
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+ case BCM47XX_BUS_TYPE_SSB:
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+ early_nvram_init_ssb();
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+ break;
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+#endif
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+#ifdef CONFIG_BCM47XX_BCMA
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+ case BCM47XX_BUS_TYPE_BCMA:
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+ early_nvram_init_bcma();
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+ break;
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+#endif
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+ }
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}
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int nvram_getenv(char *name, char *val, size_t val_len)
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