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git://projects.qi-hardware.com/openwrt-xburst.git
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342ac43e68
git-svn-id: svn://svn.openwrt.org/openwrt/trunk@30655 3c298f89-4303-0410-b956-a3cf2f4a3e73
381 lines
9.0 KiB
C
381 lines
9.0 KiB
C
/*
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* Ralink RT3662/RT3883 SoC platform device registration
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*
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* Copyright (C) 2011-2012 Gabor Juhos <juhosg@openwrt.org>
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*
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* This program is free software; you can redistribute it and/or modify it
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* under the terms of the GNU General Public License version 2 as published
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* by the Free Software Foundation.
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*/
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#include <linux/kernel.h>
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#include <linux/platform_device.h>
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#include <linux/mtd/mtd.h>
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#include <linux/mtd/physmap.h>
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#include <linux/mtd/partitions.h>
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#include <linux/dma-mapping.h>
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#include <linux/delay.h>
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#include <linux/err.h>
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#include <linux/clk.h>
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#include <linux/rt2x00_platform.h>
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#include <asm/addrspace.h>
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#include <asm/mach-ralink/rt3883.h>
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#include <asm/mach-ralink/rt3883_regs.h>
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#include <asm/mach-ralink/rt3883_ehci_platform.h>
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#include <asm/mach-ralink/rt3883_ohci_platform.h>
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#include <asm/mach-ralink/ramips_nand_platform.h>
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#include "devices.h"
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#include <ramips_eth_platform.h>
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static struct resource rt3883_flash0_resources[] = {
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{
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.flags = IORESOURCE_MEM,
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.start = RT3883_BOOT_BASE,
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.end = RT3883_BOOT_BASE + RT3883_BOOT_SIZE - 1,
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},
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};
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struct physmap_flash_data rt3883_flash0_data;
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static struct platform_device rt3883_flash0_device = {
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.name = "physmap-flash",
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.resource = rt3883_flash0_resources,
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.num_resources = ARRAY_SIZE(rt3883_flash0_resources),
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.dev = {
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.platform_data = &rt3883_flash0_data,
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},
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};
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static struct resource rt3883_flash1_resources[] = {
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{
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.flags = IORESOURCE_MEM,
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.start = RT3883_SRAM_BASE,
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.end = RT3883_SRAM_BASE + RT3883_SRAM_SIZE - 1,
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},
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};
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struct physmap_flash_data rt3883_flash1_data;
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static struct platform_device rt3883_flash1_device = {
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.name = "physmap-flash",
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.resource = rt3883_flash1_resources,
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.num_resources = ARRAY_SIZE(rt3883_flash1_resources),
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.dev = {
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.platform_data = &rt3883_flash1_data,
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},
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};
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static int rt3883_flash_instance __initdata;
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void __init rt3883_register_pflash(unsigned int id)
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{
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struct platform_device *pdev;
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struct physmap_flash_data *pdata;
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void __iomem *fscc_base;
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u32 t;
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int reg;
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switch (id) {
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case 0:
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pdev = &rt3883_flash0_device;
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reg = RT3883_FSCC_REG_FLASH_CFG0;
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break;
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case 1:
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pdev = &rt3883_flash1_device;
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reg = RT3883_FSCC_REG_FLASH_CFG1;
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break;
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default:
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return;
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}
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pdata = pdev->dev.platform_data;
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fscc_base = ioremap(RT3883_FSCC_BASE, RT3883_FSCC_SIZE);
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if (!fscc_base)
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panic("RT3883: ioremap failed for FSCC");
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t = __raw_readl(fscc_base + reg);
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iounmap(fscc_base);
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t = (t >> RT3883_FLASH_CFG_WIDTH_SHIFT) & RT3883_FLASH_CFG_WIDTH_MASK;
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switch (t) {
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case RT3883_FLASH_CFG_WIDTH_8BIT:
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pdata->width = 1;
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break;
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case RT3883_FLASH_CFG_WIDTH_16BIT:
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pdata->width = 2;
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break;
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case RT3883_FLASH_CFG_WIDTH_32BIT:
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if (id == 1) {
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pdata->width = 4;
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break;
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}
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/* fallthrough */
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default:
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pr_warn("RT3883: flash bank%d: invalid width detected\n", id);
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return;
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}
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pdev->id = rt3883_flash_instance;
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platform_device_register(pdev);
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rt3883_flash_instance++;
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}
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static atomic_t rt3883_usb_use_count = ATOMIC_INIT(0);
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static void rt3883_usb_host_start(void)
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{
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u32 t;
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if (atomic_inc_return(&rt3883_usb_use_count) != 1)
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return;
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t = rt3883_sysc_rr(RT3883_SYSC_REG_USB_PS);
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#if 0
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/* put the HOST controller into reset */
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t = rt3883_sysc_rr(RT3883_SYSC_REG_RSTCTRL);
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t |= RT3883_RSTCTRL_UHST;
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rt3883_sysc_wr(t, RT3883_SYSC_REG_RSTCTRL);
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#endif
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/* enable clock for port0's and port1's phys */
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t = rt3883_sysc_rr(RT3883_SYSC_REG_CLKCFG1);
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t = t | RT3883_CLKCFG1_UPHY0_CLK_EN | RT3883_CLKCFG1_UPHY1_CLK_EN;
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rt3883_sysc_wr(t, RT3883_SYSC_REG_CLKCFG1);
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mdelay(500);
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/* pull USBHOST and USBDEV out from reset */
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t = rt3883_sysc_rr(RT3883_SYSC_REG_RSTCTRL);
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t &= ~(RT3883_RSTCTRL_UHST | RT3883_RSTCTRL_UDEV);
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rt3883_sysc_wr(t, RT3883_SYSC_REG_RSTCTRL);
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mdelay(500);
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/* enable host mode */
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t = rt3883_sysc_rr(RT3883_SYSC_REG_SYSCFG1);
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t |= RT3883_SYSCFG1_USB0_HOST_MODE;
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rt3883_sysc_wr(t, RT3883_SYSC_REG_SYSCFG1);
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t = rt3883_sysc_rr(RT3883_SYSC_REG_USB_PS);
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}
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static void rt3883_usb_host_stop(void)
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{
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u32 t;
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if (atomic_dec_return(&rt3883_usb_use_count) != 0)
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return;
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/* put USBHOST and USBDEV into reset */
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t = rt3883_sysc_rr(RT3883_SYSC_REG_RSTCTRL);
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t |= RT3883_RSTCTRL_UHST | RT3883_RSTCTRL_UDEV;
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rt3883_sysc_wr(t, RT3883_SYSC_REG_RSTCTRL);
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udelay(10000);
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/* disable clock for port0's and port1's phys*/
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t = rt3883_sysc_rr(RT3883_SYSC_REG_CLKCFG1);
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t &= ~(RT3883_CLKCFG1_UPHY0_CLK_EN | RT3883_CLKCFG1_UPHY1_CLK_EN);
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rt3883_sysc_wr(t, RT3883_SYSC_REG_CLKCFG1);
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udelay(10000);
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}
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static struct rt3883_ehci_platform_data rt3883_ehci_data = {
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.start_hw = rt3883_usb_host_start,
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.stop_hw = rt3883_usb_host_stop,
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};
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static struct resource rt3883_ehci_resources[] = {
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{
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.start = RT3883_EHCI_BASE,
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.end = RT3883_EHCI_BASE + PAGE_SIZE - 1,
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.flags = IORESOURCE_MEM,
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}, {
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.start = RT3883_INTC_IRQ_UHST,
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.end = RT3883_INTC_IRQ_UHST,
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.flags = IORESOURCE_IRQ,
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},
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};
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static u64 rt3883_ehci_dmamask = DMA_BIT_MASK(32);
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static struct platform_device rt3883_ehci_device = {
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.name = "rt3883-ehci",
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.id = -1,
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.resource = rt3883_ehci_resources,
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.num_resources = ARRAY_SIZE(rt3883_ehci_resources),
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.dev = {
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.dma_mask = &rt3883_ehci_dmamask,
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.coherent_dma_mask = DMA_BIT_MASK(32),
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.platform_data = &rt3883_ehci_data,
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},
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};
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static struct resource rt3883_ohci_resources[] = {
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{
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.start = RT3883_OHCI_BASE,
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.end = RT3883_OHCI_BASE + PAGE_SIZE - 1,
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.flags = IORESOURCE_MEM,
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}, {
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.start = RT3883_INTC_IRQ_UHST,
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.end = RT3883_INTC_IRQ_UHST,
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.flags = IORESOURCE_IRQ,
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},
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};
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static struct rt3883_ohci_platform_data rt3883_ohci_data = {
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.start_hw = rt3883_usb_host_start,
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.stop_hw = rt3883_usb_host_stop,
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};
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static u64 rt3883_ohci_dmamask = DMA_BIT_MASK(32);
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static struct platform_device rt3883_ohci_device = {
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.name = "rt3883-ohci",
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.id = -1,
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.resource = rt3883_ohci_resources,
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.num_resources = ARRAY_SIZE(rt3883_ohci_resources),
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.dev = {
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.dma_mask = &rt3883_ohci_dmamask,
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.coherent_dma_mask = DMA_BIT_MASK(32),
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.platform_data = &rt3883_ohci_data,
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},
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};
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void __init rt3883_register_usbhost(void)
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{
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platform_device_register(&rt3883_ehci_device);
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platform_device_register(&rt3883_ohci_device);
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}
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static void rt3883_fe_reset(void)
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{
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u32 t;
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t = rt3883_sysc_rr(RT3883_SYSC_REG_RSTCTRL);
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t |= RT3883_RSTCTRL_FE;
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rt3883_sysc_wr(t , RT3883_SYSC_REG_RSTCTRL);
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t &= ~RT3883_RSTCTRL_FE;
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rt3883_sysc_wr(t, RT3883_SYSC_REG_RSTCTRL);
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}
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static struct resource rt3883_eth_resources[] = {
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{
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.start = RT3883_FE_BASE,
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.end = RT3883_FE_BASE + PAGE_SIZE - 1,
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.flags = IORESOURCE_MEM,
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}, {
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.start = RT3883_CPU_IRQ_FE,
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.end = RT3883_CPU_IRQ_FE,
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.flags = IORESOURCE_IRQ,
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},
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};
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struct ramips_eth_platform_data rt3883_eth_data = {
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.mac = { 0x00, 0x11, 0x22, 0x33, 0x44, 0x55 },
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.reset_fe = rt3883_fe_reset,
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.min_pkt_len = 64,
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};
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static struct platform_device rt3883_eth_device = {
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.name = "ramips_eth",
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.resource = rt3883_eth_resources,
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.num_resources = ARRAY_SIZE(rt3883_eth_resources),
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.dev = {
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.platform_data = &rt3883_eth_data,
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}
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};
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void __init rt3883_register_ethernet(void)
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{
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struct clk *clk;
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clk = clk_get(NULL, "sys");
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if (IS_ERR(clk))
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panic("unable to get SYS clock, err=%ld", PTR_ERR(clk));
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rt3883_eth_data.sys_freq = clk_get_rate(clk);
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platform_device_register(&rt3883_eth_device);
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}
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static struct resource rt3883_wlan_resources[] = {
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{
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.start = RT3883_WLAN_BASE,
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.end = RT3883_WLAN_BASE + 0x3FFFF,
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.flags = IORESOURCE_MEM,
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}, {
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.start = RT3883_CPU_IRQ_WLAN,
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.end = RT3883_CPU_IRQ_WLAN,
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.flags = IORESOURCE_IRQ,
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},
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};
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struct rt2x00_platform_data rt3883_wlan_data;
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static struct platform_device rt3883_wlan_device = {
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.name = "rt2800_wmac",
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.resource = rt3883_wlan_resources,
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.num_resources = ARRAY_SIZE(rt3883_wlan_resources),
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.dev = {
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.platform_data = &rt3883_wlan_data,
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}
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};
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void __init rt3883_register_wlan(void)
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{
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rt3883_wlan_data.eeprom_file_name = "RT3883.eeprom",
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platform_device_register(&rt3883_wlan_device);
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}
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static struct resource rt3883_wdt_resources[] = {
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{
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.start = RT3883_TIMER_BASE,
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.end = RT3883_TIMER_BASE + RT3883_TIMER_SIZE - 1,
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.flags = IORESOURCE_MEM,
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},
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};
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static struct platform_device rt3883_wdt_device = {
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.name = "ramips-wdt",
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.id = -1,
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.resource = rt3883_wdt_resources,
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.num_resources = ARRAY_SIZE(rt3883_wdt_resources),
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};
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void __init rt3883_register_wdt(bool enable_reset)
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{
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if (enable_reset) {
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u32 t;
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/* enable WDT reset output on GPIO 2 */
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t = rt3883_sysc_rr(RT3883_SYSC_REG_SYSCFG1);
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t |= RT3883_SYSCFG1_GPIO2_AS_WDT_OUT;
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rt3883_sysc_wr(t, RT3883_SYSC_REG_SYSCFG1);
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}
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platform_device_register(&rt3883_wdt_device);
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}
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static struct resource rt3883_nand_resources[] = {
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{
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.flags = IORESOURCE_MEM,
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.start = RT3883_NANDC_BASE,
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.end = RT3883_NANDC_BASE + RT3883_NANDC_SIZE - 1,
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},
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};
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struct ramips_nand_platform_data rt3883_nand_data;
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static struct platform_device rt3883_nand_device = {
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.name = RAMIPS_NAND_DRIVER_NAME,
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.id = -1,
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.resource = rt3883_nand_resources,
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.num_resources = ARRAY_SIZE(rt3883_nand_resources),
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.dev = {
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.platform_data = &rt3883_nand_data,
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},
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};
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void __init rt3883_register_nand(void)
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{
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platform_device_register(&rt3883_nand_device);
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}
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