mirror of
git://projects.qi-hardware.com/openwrt-xburst.git
synced 2024-08-22 02:58:58 +03:00
git-svn-id: svn://svn.openwrt.org/openwrt/trunk@29725 3c298f89-4303-0410-b956-a3cf2f4a3e73
593 lines
20 KiB
Diff
593 lines
20 KiB
Diff
--- a/drivers/ssb/b43_pci_bridge.c
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+++ b/drivers/ssb/b43_pci_bridge.c
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@@ -5,12 +5,13 @@
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* because of its small size we include it in the SSB core
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* instead of creating a standalone module.
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*
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- * Copyright 2007 Michael Buesch <mb@bu3sch.de>
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+ * Copyright 2007 Michael Buesch <m@bues.ch>
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*
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* Licensed under the GNU/GPL. See COPYING for details.
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*/
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#include <linux/pci.h>
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+#include <linux/module.h>
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#include <linux/ssb/ssb.h>
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#include "ssb_private.h"
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--- a/drivers/ssb/driver_chipcommon.c
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+++ b/drivers/ssb/driver_chipcommon.c
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@@ -3,7 +3,7 @@
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* Broadcom ChipCommon core driver
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*
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* Copyright 2005, Broadcom Corporation
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- * Copyright 2006, 2007, Michael Buesch <mb@bu3sch.de>
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+ * Copyright 2006, 2007, Michael Buesch <m@bues.ch>
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*
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* Licensed under the GNU/GPL. See COPYING for details.
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*/
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--- a/drivers/ssb/driver_chipcommon_pmu.c
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+++ b/drivers/ssb/driver_chipcommon_pmu.c
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@@ -2,7 +2,7 @@
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* Sonics Silicon Backplane
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* Broadcom ChipCommon Power Management Unit driver
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*
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- * Copyright 2009, Michael Buesch <mb@bu3sch.de>
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+ * Copyright 2009, Michael Buesch <m@bues.ch>
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* Copyright 2007, Broadcom Corporation
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*
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* Licensed under the GNU/GPL. See COPYING for details.
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@@ -417,9 +417,9 @@ static void ssb_pmu_resources_init(struc
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u32 min_msk = 0, max_msk = 0;
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unsigned int i;
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const struct pmu_res_updown_tab_entry *updown_tab = NULL;
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- unsigned int updown_tab_size;
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+ unsigned int updown_tab_size = 0;
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const struct pmu_res_depend_tab_entry *depend_tab = NULL;
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- unsigned int depend_tab_size;
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+ unsigned int depend_tab_size = 0;
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switch (bus->chip_id) {
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case 0x4312:
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--- a/drivers/ssb/driver_extif.c
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+++ b/drivers/ssb/driver_extif.c
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@@ -3,7 +3,7 @@
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* Broadcom EXTIF core driver
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*
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* Copyright 2005, Broadcom Corporation
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- * Copyright 2006, 2007, Michael Buesch <mb@bu3sch.de>
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+ * Copyright 2006, 2007, Michael Buesch <m@bues.ch>
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* Copyright 2006, 2007, Felix Fietkau <nbd@openwrt.org>
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* Copyright 2007, Aurelien Jarno <aurelien@aurel32.net>
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*
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--- a/drivers/ssb/driver_gige.c
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+++ b/drivers/ssb/driver_gige.c
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@@ -3,7 +3,7 @@
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* Broadcom Gigabit Ethernet core driver
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*
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* Copyright 2008, Broadcom Corporation
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- * Copyright 2008, Michael Buesch <mb@bu3sch.de>
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+ * Copyright 2008, Michael Buesch <m@bues.ch>
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*
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* Licensed under the GNU/GPL. See COPYING for details.
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*/
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@@ -106,8 +106,9 @@ void gige_pcicfg_write32(struct ssb_gige
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gige_write32(dev, SSB_GIGE_PCICFG + offset, value);
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}
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-static int ssb_gige_pci_read_config(struct pci_bus *bus, unsigned int devfn,
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- int reg, int size, u32 *val)
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+static int __devinit ssb_gige_pci_read_config(struct pci_bus *bus,
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+ unsigned int devfn, int reg,
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+ int size, u32 *val)
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{
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struct ssb_gige *dev = container_of(bus->ops, struct ssb_gige, pci_ops);
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unsigned long flags;
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@@ -136,8 +137,9 @@ static int ssb_gige_pci_read_config(stru
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return PCIBIOS_SUCCESSFUL;
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}
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-static int ssb_gige_pci_write_config(struct pci_bus *bus, unsigned int devfn,
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- int reg, int size, u32 val)
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+static int __devinit ssb_gige_pci_write_config(struct pci_bus *bus,
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+ unsigned int devfn, int reg,
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+ int size, u32 val)
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{
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struct ssb_gige *dev = container_of(bus->ops, struct ssb_gige, pci_ops);
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unsigned long flags;
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@@ -166,7 +168,8 @@ static int ssb_gige_pci_write_config(str
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return PCIBIOS_SUCCESSFUL;
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}
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-static int ssb_gige_probe(struct ssb_device *sdev, const struct ssb_device_id *id)
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+static int __devinit ssb_gige_probe(struct ssb_device *sdev,
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+ const struct ssb_device_id *id)
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{
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struct ssb_gige *dev;
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u32 base, tmslow, tmshigh;
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--- a/drivers/ssb/driver_mipscore.c
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+++ b/drivers/ssb/driver_mipscore.c
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@@ -3,7 +3,7 @@
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* Broadcom MIPS core driver
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*
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* Copyright 2005, Broadcom Corporation
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- * Copyright 2006, 2007, Michael Buesch <mb@bu3sch.de>
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+ * Copyright 2006, 2007, Michael Buesch <m@bues.ch>
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*
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* Licensed under the GNU/GPL. See COPYING for details.
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*/
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--- a/drivers/ssb/driver_pcicore.c
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+++ b/drivers/ssb/driver_pcicore.c
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@@ -3,7 +3,7 @@
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* Broadcom PCI-core driver
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*
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* Copyright 2005, Broadcom Corporation
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- * Copyright 2006, 2007, Michael Buesch <mb@bu3sch.de>
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+ * Copyright 2006, 2007, Michael Buesch <m@bues.ch>
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*
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* Licensed under the GNU/GPL. See COPYING for details.
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*/
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@@ -314,7 +314,7 @@ int ssb_pcicore_pcibios_map_irq(const st
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return ssb_mips_irq(extpci_core->dev) + 2;
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}
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-static void ssb_pcicore_init_hostmode(struct ssb_pcicore *pc)
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+static void __devinit ssb_pcicore_init_hostmode(struct ssb_pcicore *pc)
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{
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u32 val;
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@@ -379,7 +379,7 @@ static void ssb_pcicore_init_hostmode(st
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register_pci_controller(&ssb_pcicore_controller);
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}
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-static int pcicore_is_in_hostmode(struct ssb_pcicore *pc)
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+static int __devinit pcicore_is_in_hostmode(struct ssb_pcicore *pc)
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{
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struct ssb_bus *bus = pc->dev->bus;
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u16 chipid_top;
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@@ -412,7 +412,7 @@ static int pcicore_is_in_hostmode(struct
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* Workarounds.
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**************************************************/
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-static void ssb_pcicore_fix_sprom_core_index(struct ssb_pcicore *pc)
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+static void __devinit ssb_pcicore_fix_sprom_core_index(struct ssb_pcicore *pc)
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{
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u16 tmp = pcicore_read16(pc, SSB_PCICORE_SPROM(0));
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if (((tmp & 0xF000) >> 12) != pc->dev->core_index) {
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@@ -514,7 +514,7 @@ static void ssb_pcicore_pcie_setup_worka
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* Generic and Clientmode operation code.
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**************************************************/
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-static void ssb_pcicore_init_clientmode(struct ssb_pcicore *pc)
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+static void __devinit ssb_pcicore_init_clientmode(struct ssb_pcicore *pc)
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{
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struct ssb_device *pdev = pc->dev;
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struct ssb_bus *bus = pdev->bus;
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--- a/drivers/ssb/embedded.c
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+++ b/drivers/ssb/embedded.c
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@@ -3,7 +3,7 @@
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* Embedded systems support code
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*
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* Copyright 2005-2008, Broadcom Corporation
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- * Copyright 2006-2008, Michael Buesch <mb@bu3sch.de>
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+ * Copyright 2006-2008, Michael Buesch <m@bues.ch>
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*
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* Licensed under the GNU/GPL. See COPYING for details.
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*/
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--- a/drivers/ssb/main.c
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+++ b/drivers/ssb/main.c
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@@ -3,7 +3,7 @@
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* Subsystem core
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*
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* Copyright 2005, Broadcom Corporation
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- * Copyright 2006, 2007, Michael Buesch <mb@bu3sch.de>
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+ * Copyright 2006, 2007, Michael Buesch <m@bues.ch>
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*
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* Licensed under the GNU/GPL. See COPYING for details.
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*/
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@@ -12,6 +12,7 @@
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#include <linux/delay.h>
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#include <linux/io.h>
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+#include <linux/module.h>
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#include <linux/ssb/ssb.h>
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#include <linux/ssb/ssb_regs.h>
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#include <linux/ssb/ssb_driver_gige.h>
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@@ -557,7 +558,7 @@ error:
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}
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/* Needs ssb_buses_lock() */
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-static int ssb_attach_queued_buses(void)
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+static int __devinit ssb_attach_queued_buses(void)
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{
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struct ssb_bus *bus, *n;
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int err = 0;
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@@ -768,9 +769,9 @@ out:
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return err;
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}
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-static int ssb_bus_register(struct ssb_bus *bus,
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- ssb_invariants_func_t get_invariants,
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- unsigned long baseaddr)
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+static int __devinit ssb_bus_register(struct ssb_bus *bus,
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+ ssb_invariants_func_t get_invariants,
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+ unsigned long baseaddr)
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{
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int err;
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@@ -851,8 +852,8 @@ err_disable_xtal:
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}
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#ifdef CONFIG_SSB_PCIHOST
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-int ssb_bus_pcibus_register(struct ssb_bus *bus,
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- struct pci_dev *host_pci)
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+int __devinit ssb_bus_pcibus_register(struct ssb_bus *bus,
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+ struct pci_dev *host_pci)
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{
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int err;
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@@ -875,9 +876,9 @@ EXPORT_SYMBOL(ssb_bus_pcibus_register);
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#endif /* CONFIG_SSB_PCIHOST */
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#ifdef CONFIG_SSB_PCMCIAHOST
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-int ssb_bus_pcmciabus_register(struct ssb_bus *bus,
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- struct pcmcia_device *pcmcia_dev,
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- unsigned long baseaddr)
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+int __devinit ssb_bus_pcmciabus_register(struct ssb_bus *bus,
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+ struct pcmcia_device *pcmcia_dev,
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+ unsigned long baseaddr)
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{
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int err;
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@@ -897,8 +898,9 @@ EXPORT_SYMBOL(ssb_bus_pcmciabus_register
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#endif /* CONFIG_SSB_PCMCIAHOST */
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#ifdef CONFIG_SSB_SDIOHOST
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-int ssb_bus_sdiobus_register(struct ssb_bus *bus, struct sdio_func *func,
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- unsigned int quirks)
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+int __devinit ssb_bus_sdiobus_register(struct ssb_bus *bus,
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+ struct sdio_func *func,
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+ unsigned int quirks)
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{
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int err;
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@@ -918,9 +920,9 @@ int ssb_bus_sdiobus_register(struct ssb_
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EXPORT_SYMBOL(ssb_bus_sdiobus_register);
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#endif /* CONFIG_SSB_PCMCIAHOST */
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-int ssb_bus_ssbbus_register(struct ssb_bus *bus,
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- unsigned long baseaddr,
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- ssb_invariants_func_t get_invariants)
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+int __devinit ssb_bus_ssbbus_register(struct ssb_bus *bus,
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+ unsigned long baseaddr,
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+ ssb_invariants_func_t get_invariants)
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{
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int err;
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@@ -1001,8 +1003,8 @@ u32 ssb_calc_clock_rate(u32 plltype, u32
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switch (plltype) {
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case SSB_PLLTYPE_6: /* 100/200 or 120/240 only */
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if (m & SSB_CHIPCO_CLK_T6_MMASK)
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- return SSB_CHIPCO_CLK_T6_M0;
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- return SSB_CHIPCO_CLK_T6_M1;
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+ return SSB_CHIPCO_CLK_T6_M1;
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+ return SSB_CHIPCO_CLK_T6_M0;
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case SSB_PLLTYPE_1: /* 48Mhz base, 3 dividers */
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case SSB_PLLTYPE_3: /* 25Mhz, 2 dividers */
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case SSB_PLLTYPE_4: /* 48Mhz, 4 dividers */
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@@ -1259,13 +1261,34 @@ void ssb_device_disable(struct ssb_devic
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}
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EXPORT_SYMBOL(ssb_device_disable);
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+/* Some chipsets need routing known for PCIe and 64-bit DMA */
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+static bool ssb_dma_translation_special_bit(struct ssb_device *dev)
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+{
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+ u16 chip_id = dev->bus->chip_id;
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+
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+ if (dev->id.coreid == SSB_DEV_80211) {
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+ return (chip_id == 0x4322 || chip_id == 43221 ||
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+ chip_id == 43231 || chip_id == 43222);
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+ }
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+
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+ return 0;
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+}
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+
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u32 ssb_dma_translation(struct ssb_device *dev)
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{
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switch (dev->bus->bustype) {
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case SSB_BUSTYPE_SSB:
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return 0;
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case SSB_BUSTYPE_PCI:
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- return SSB_PCI_DMA;
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+ if (pci_is_pcie(dev->bus->host_pci) &&
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+ ssb_read32(dev, SSB_TMSHIGH) & SSB_TMSHIGH_DMA64) {
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+ return SSB_PCIE_DMA_H32;
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+ } else {
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+ if (ssb_dma_translation_special_bit(dev))
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+ return SSB_PCIE_DMA_H32;
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+ else
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+ return SSB_PCI_DMA;
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+ }
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default:
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__ssb_dma_not_implemented(dev);
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}
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--- a/drivers/ssb/pci.c
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+++ b/drivers/ssb/pci.c
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@@ -1,7 +1,7 @@
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/*
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* Sonics Silicon Backplane PCI-Hostbus related functions.
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*
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- * Copyright (C) 2005-2006 Michael Buesch <mb@bu3sch.de>
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+ * Copyright (C) 2005-2006 Michael Buesch <m@bues.ch>
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* Copyright (C) 2005 Martin Langer <martin-langer@gmx.de>
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* Copyright (C) 2005 Stefano Brivio <st3@riseup.net>
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* Copyright (C) 2005 Danny van Dyk <kugelfang@gentoo.org>
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@@ -607,6 +607,29 @@ static void sprom_extract_r8(struct ssb_
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memcpy(&out->antenna_gain.ghz5, &out->antenna_gain.ghz24,
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sizeof(out->antenna_gain.ghz5));
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+ /* Extract FEM info */
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+ SPEX(fem.ghz2.tssipos, SSB_SPROM8_FEM2G,
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+ SSB_SROM8_FEM_TSSIPOS, SSB_SROM8_FEM_TSSIPOS_SHIFT);
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+ SPEX(fem.ghz2.extpa_gain, SSB_SPROM8_FEM2G,
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+ SSB_SROM8_FEM_EXTPA_GAIN, SSB_SROM8_FEM_EXTPA_GAIN_SHIFT);
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+ SPEX(fem.ghz2.pdet_range, SSB_SPROM8_FEM2G,
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+ SSB_SROM8_FEM_PDET_RANGE, SSB_SROM8_FEM_PDET_RANGE_SHIFT);
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+ SPEX(fem.ghz2.tr_iso, SSB_SPROM8_FEM2G,
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+ SSB_SROM8_FEM_TR_ISO, SSB_SROM8_FEM_TR_ISO_SHIFT);
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+ SPEX(fem.ghz2.antswlut, SSB_SPROM8_FEM2G,
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+ SSB_SROM8_FEM_ANTSWLUT, SSB_SROM8_FEM_ANTSWLUT_SHIFT);
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+
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+ SPEX(fem.ghz5.tssipos, SSB_SPROM8_FEM5G,
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+ SSB_SROM8_FEM_TSSIPOS, SSB_SROM8_FEM_TSSIPOS_SHIFT);
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+ SPEX(fem.ghz5.extpa_gain, SSB_SPROM8_FEM5G,
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+ SSB_SROM8_FEM_EXTPA_GAIN, SSB_SROM8_FEM_EXTPA_GAIN_SHIFT);
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+ SPEX(fem.ghz5.pdet_range, SSB_SPROM8_FEM5G,
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+ SSB_SROM8_FEM_PDET_RANGE, SSB_SROM8_FEM_PDET_RANGE_SHIFT);
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+ SPEX(fem.ghz5.tr_iso, SSB_SPROM8_FEM5G,
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+ SSB_SROM8_FEM_TR_ISO, SSB_SROM8_FEM_TR_ISO_SHIFT);
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+ SPEX(fem.ghz5.antswlut, SSB_SPROM8_FEM5G,
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+ SSB_SROM8_FEM_ANTSWLUT, SSB_SROM8_FEM_ANTSWLUT_SHIFT);
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+
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sprom_extract_r458(out, in);
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/* TODO - get remaining rev 8 stuff needed */
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@@ -734,12 +757,9 @@ out_free:
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static void ssb_pci_get_boardinfo(struct ssb_bus *bus,
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struct ssb_boardinfo *bi)
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{
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- pci_read_config_word(bus->host_pci, PCI_SUBSYSTEM_VENDOR_ID,
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- &bi->vendor);
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- pci_read_config_word(bus->host_pci, PCI_SUBSYSTEM_ID,
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- &bi->type);
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- pci_read_config_word(bus->host_pci, PCI_REVISION_ID,
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- &bi->rev);
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+ bi->vendor = bus->host_pci->subsystem_vendor;
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+ bi->type = bus->host_pci->subsystem_device;
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+ bi->rev = bus->host_pci->revision;
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}
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int ssb_pci_get_invariants(struct ssb_bus *bus,
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--- a/drivers/ssb/pcihost_wrapper.c
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+++ b/drivers/ssb/pcihost_wrapper.c
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@@ -6,7 +6,7 @@
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* Copyright (c) 2005 Stefano Brivio <st3@riseup.net>
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* Copyright (c) 2005 Danny van Dyk <kugelfang@gentoo.org>
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* Copyright (c) 2005 Andreas Jaggi <andreas.jaggi@waterwave.ch>
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- * Copyright (c) 2005-2007 Michael Buesch <mbuesch@freenet.de>
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+ * Copyright (c) 2005-2007 Michael Buesch <m@bues.ch>
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*
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* Licensed under the GNU/GPL. See COPYING for details.
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*/
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@@ -53,8 +53,8 @@ static int ssb_pcihost_resume(struct pci
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# define ssb_pcihost_resume NULL
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#endif /* CONFIG_PM */
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-static int ssb_pcihost_probe(struct pci_dev *dev,
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- const struct pci_device_id *id)
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+static int __devinit ssb_pcihost_probe(struct pci_dev *dev,
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+ const struct pci_device_id *id)
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{
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struct ssb_bus *ssb;
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int err = -ENOMEM;
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@@ -110,7 +110,7 @@ static void ssb_pcihost_remove(struct pc
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pci_set_drvdata(dev, NULL);
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}
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-int ssb_pcihost_register(struct pci_driver *driver)
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+int __devinit ssb_pcihost_register(struct pci_driver *driver)
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{
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driver->probe = ssb_pcihost_probe;
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driver->remove = ssb_pcihost_remove;
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|
--- a/drivers/ssb/pcmcia.c
|
|
+++ b/drivers/ssb/pcmcia.c
|
|
@@ -3,7 +3,7 @@
|
|
* PCMCIA-Hostbus related functions
|
|
*
|
|
* Copyright 2006 Johannes Berg <johannes@sipsolutions.net>
|
|
- * Copyright 2007-2008 Michael Buesch <mb@bu3sch.de>
|
|
+ * Copyright 2007-2008 Michael Buesch <m@bues.ch>
|
|
*
|
|
* Licensed under the GNU/GPL. See COPYING for details.
|
|
*/
|
|
--- a/drivers/ssb/scan.c
|
|
+++ b/drivers/ssb/scan.c
|
|
@@ -2,7 +2,7 @@
|
|
* Sonics Silicon Backplane
|
|
* Bus scanning
|
|
*
|
|
- * Copyright (C) 2005-2007 Michael Buesch <mb@bu3sch.de>
|
|
+ * Copyright (C) 2005-2007 Michael Buesch <m@bues.ch>
|
|
* Copyright (C) 2005 Martin Langer <martin-langer@gmx.de>
|
|
* Copyright (C) 2005 Stefano Brivio <st3@riseup.net>
|
|
* Copyright (C) 2005 Danny van Dyk <kugelfang@gentoo.org>
|
|
@@ -310,8 +310,7 @@ int ssb_bus_scan(struct ssb_bus *bus,
|
|
} else {
|
|
if (bus->bustype == SSB_BUSTYPE_PCI) {
|
|
bus->chip_id = pcidev_to_chipid(bus->host_pci);
|
|
- pci_read_config_byte(bus->host_pci, PCI_REVISION_ID,
|
|
- &bus->chip_rev);
|
|
+ bus->chip_rev = bus->host_pci->revision;
|
|
bus->chip_package = 0;
|
|
} else {
|
|
bus->chip_id = 0x4710;
|
|
--- a/drivers/ssb/sdio.c
|
|
+++ b/drivers/ssb/sdio.c
|
|
@@ -6,7 +6,7 @@
|
|
*
|
|
* Based on drivers/ssb/pcmcia.c
|
|
* Copyright 2006 Johannes Berg <johannes@sipsolutions.net>
|
|
- * Copyright 2007-2008 Michael Buesch <mb@bu3sch.de>
|
|
+ * Copyright 2007-2008 Michael Buesch <m@bues.ch>
|
|
*
|
|
* Licensed under the GNU/GPL. See COPYING for details.
|
|
*
|
|
--- a/drivers/ssb/sprom.c
|
|
+++ b/drivers/ssb/sprom.c
|
|
@@ -2,7 +2,7 @@
|
|
* Sonics Silicon Backplane
|
|
* Common SPROM support routines
|
|
*
|
|
- * Copyright (C) 2005-2008 Michael Buesch <mb@bu3sch.de>
|
|
+ * Copyright (C) 2005-2008 Michael Buesch <m@bues.ch>
|
|
* Copyright (C) 2005 Martin Langer <martin-langer@gmx.de>
|
|
* Copyright (C) 2005 Stefano Brivio <st3@riseup.net>
|
|
* Copyright (C) 2005 Danny van Dyk <kugelfang@gentoo.org>
|
|
--- a/include/linux/ssb/ssb.h
|
|
+++ b/include/linux/ssb/ssb.h
|
|
@@ -25,8 +25,10 @@ struct ssb_sprom {
|
|
u8 et1phyaddr; /* MII address for enet1 */
|
|
u8 et0mdcport; /* MDIO for enet0 */
|
|
u8 et1mdcport; /* MDIO for enet1 */
|
|
- u8 board_rev; /* Board revision number from SPROM. */
|
|
+ u16 board_rev; /* Board revision number from SPROM. */
|
|
u8 country_code; /* Country Code */
|
|
+ u16 leddc_on_time; /* LED Powersave Duty Cycle On Count */
|
|
+ u16 leddc_off_time; /* LED Powersave Duty Cycle Off Count */
|
|
u8 ant_available_a; /* 2GHz antenna available bits (up to 4) */
|
|
u8 ant_available_bg; /* 5GHz antenna available bits (up to 4) */
|
|
u16 pa0b0;
|
|
@@ -92,6 +94,15 @@ struct ssb_sprom {
|
|
} ghz5; /* 5GHz band */
|
|
} antenna_gain;
|
|
|
|
+ struct {
|
|
+ struct {
|
|
+ u8 tssipos, extpa_gain, pdet_range, tr_iso, antswlut;
|
|
+ } ghz2;
|
|
+ struct {
|
|
+ u8 tssipos, extpa_gain, pdet_range, tr_iso, antswlut;
|
|
+ } ghz5;
|
|
+ } fem;
|
|
+
|
|
/* TODO - add any parameters needed from rev 2, 3, 4, 5 or 8 SPROMs */
|
|
};
|
|
|
|
@@ -99,7 +110,7 @@ struct ssb_sprom {
|
|
struct ssb_boardinfo {
|
|
u16 vendor;
|
|
u16 type;
|
|
- u16 rev;
|
|
+ u8 rev;
|
|
};
|
|
|
|
|
|
@@ -229,10 +240,9 @@ struct ssb_driver {
|
|
#define drv_to_ssb_drv(_drv) container_of(_drv, struct ssb_driver, drv)
|
|
|
|
extern int __ssb_driver_register(struct ssb_driver *drv, struct module *owner);
|
|
-static inline int ssb_driver_register(struct ssb_driver *drv)
|
|
-{
|
|
- return __ssb_driver_register(drv, THIS_MODULE);
|
|
-}
|
|
+#define ssb_driver_register(drv) \
|
|
+ __ssb_driver_register(drv, THIS_MODULE)
|
|
+
|
|
extern void ssb_driver_unregister(struct ssb_driver *drv);
|
|
|
|
|
|
--- a/include/linux/ssb/ssb_driver_chipcommon.h
|
|
+++ b/include/linux/ssb/ssb_driver_chipcommon.h
|
|
@@ -8,7 +8,7 @@
|
|
* gpio interface, extbus, and support for serial and parallel flashes.
|
|
*
|
|
* Copyright 2005, Broadcom Corporation
|
|
- * Copyright 2006, Michael Buesch <mb@bu3sch.de>
|
|
+ * Copyright 2006, Michael Buesch <m@bues.ch>
|
|
*
|
|
* Licensed under the GPL version 2. See COPYING for details.
|
|
*/
|
|
--- a/include/linux/ssb/ssb_regs.h
|
|
+++ b/include/linux/ssb/ssb_regs.h
|
|
@@ -432,6 +432,23 @@
|
|
#define SSB_SPROM8_RXPO2G 0x00FF /* 2GHz RX power offset */
|
|
#define SSB_SPROM8_RXPO5G 0xFF00 /* 5GHz RX power offset */
|
|
#define SSB_SPROM8_RXPO5G_SHIFT 8
|
|
+#define SSB_SPROM8_FEM2G 0x00AE
|
|
+#define SSB_SPROM8_FEM5G 0x00B0
|
|
+#define SSB_SROM8_FEM_TSSIPOS 0x0001
|
|
+#define SSB_SROM8_FEM_TSSIPOS_SHIFT 0
|
|
+#define SSB_SROM8_FEM_EXTPA_GAIN 0x0006
|
|
+#define SSB_SROM8_FEM_EXTPA_GAIN_SHIFT 1
|
|
+#define SSB_SROM8_FEM_PDET_RANGE 0x00F8
|
|
+#define SSB_SROM8_FEM_PDET_RANGE_SHIFT 3
|
|
+#define SSB_SROM8_FEM_TR_ISO 0x0700
|
|
+#define SSB_SROM8_FEM_TR_ISO_SHIFT 8
|
|
+#define SSB_SROM8_FEM_ANTSWLUT 0xF800
|
|
+#define SSB_SROM8_FEM_ANTSWLUT_SHIFT 11
|
|
+#define SSB_SPROM8_THERMAL 0x00B2
|
|
+#define SSB_SPROM8_MPWR_RAWTS 0x00B4
|
|
+#define SSB_SPROM8_TS_SLP_OPT_CORRX 0x00B6
|
|
+#define SSB_SPROM8_FOC_HWIQ_IQSWP 0x00B8
|
|
+#define SSB_SPROM8_PHYCAL_TEMPDELTA 0x00BA
|
|
#define SSB_SPROM8_MAXP_BG 0x00C0 /* Max Power 2GHz in path 1 */
|
|
#define SSB_SPROM8_MAXP_BG_MASK 0x00FF /* Mask for Max Power 2GHz */
|
|
#define SSB_SPROM8_ITSSI_BG 0xFF00 /* Mask for path 1 itssi_bg */
|
|
@@ -462,6 +479,46 @@
|
|
#define SSB_SPROM8_OFDM5GLPO 0x014A /* 5.2GHz OFDM power offset */
|
|
#define SSB_SPROM8_OFDM5GHPO 0x014E /* 5.8GHz OFDM power offset */
|
|
|
|
+/* Values for boardflags_lo read from SPROM */
|
|
+#define SSB_BFL_BTCOEXIST 0x0001 /* implements Bluetooth coexistance */
|
|
+#define SSB_BFL_PACTRL 0x0002 /* GPIO 9 controlling the PA */
|
|
+#define SSB_BFL_AIRLINEMODE 0x0004 /* implements GPIO 13 radio disable indication */
|
|
+#define SSB_BFL_RSSI 0x0008 /* software calculates nrssi slope. */
|
|
+#define SSB_BFL_ENETSPI 0x0010 /* has ephy roboswitch spi */
|
|
+#define SSB_BFL_XTAL_NOSLOW 0x0020 /* no slow clock available */
|
|
+#define SSB_BFL_CCKHIPWR 0x0040 /* can do high power CCK transmission */
|
|
+#define SSB_BFL_ENETADM 0x0080 /* has ADMtek switch */
|
|
+#define SSB_BFL_ENETVLAN 0x0100 /* can do vlan */
|
|
+#define SSB_BFL_AFTERBURNER 0x0200 /* supports Afterburner mode */
|
|
+#define SSB_BFL_NOPCI 0x0400 /* board leaves PCI floating */
|
|
+#define SSB_BFL_FEM 0x0800 /* supports the Front End Module */
|
|
+#define SSB_BFL_EXTLNA 0x1000 /* has an external LNA */
|
|
+#define SSB_BFL_HGPA 0x2000 /* had high gain PA */
|
|
+#define SSB_BFL_BTCMOD 0x4000 /* BFL_BTCOEXIST is given in alternate GPIOs */
|
|
+#define SSB_BFL_ALTIQ 0x8000 /* alternate I/Q settings */
|
|
+
|
|
+/* Values for boardflags_hi read from SPROM */
|
|
+#define SSB_BFH_NOPA 0x0001 /* has no PA */
|
|
+#define SSB_BFH_RSSIINV 0x0002 /* RSSI uses positive slope (not TSSI) */
|
|
+#define SSB_BFH_PAREF 0x0004 /* uses the PARef LDO */
|
|
+#define SSB_BFH_3TSWITCH 0x0008 /* uses a triple throw switch shared with bluetooth */
|
|
+#define SSB_BFH_PHASESHIFT 0x0010 /* can support phase shifter */
|
|
+#define SSB_BFH_BUCKBOOST 0x0020 /* has buck/booster */
|
|
+#define SSB_BFH_FEM_BT 0x0040 /* has FEM and switch to share antenna with bluetooth */
|
|
+
|
|
+/* Values for boardflags2_lo read from SPROM */
|
|
+#define SSB_BFL2_RXBB_INT_REG_DIS 0x0001 /* external RX BB regulator present */
|
|
+#define SSB_BFL2_APLL_WAR 0x0002 /* alternative A-band PLL settings implemented */
|
|
+#define SSB_BFL2_TXPWRCTRL_EN 0x0004 /* permits enabling TX Power Control */
|
|
+#define SSB_BFL2_2X4_DIV 0x0008 /* 2x4 diversity switch */
|
|
+#define SSB_BFL2_5G_PWRGAIN 0x0010 /* supports 5G band power gain */
|
|
+#define SSB_BFL2_PCIEWAR_OVR 0x0020 /* overrides ASPM and Clkreq settings */
|
|
+#define SSB_BFL2_CAESERS_BRD 0x0040 /* is Caesers board (unused) */
|
|
+#define SSB_BFL2_BTC3WIRE 0x0080 /* used 3-wire bluetooth coexist */
|
|
+#define SSB_BFL2_SKWRKFEM_BRD 0x0100 /* 4321mcm93 uses Skyworks FEM */
|
|
+#define SSB_BFL2_SPUR_WAR 0x0200 /* has a workaround for clock-harmonic spurs */
|
|
+#define SSB_BFL2_GPLL_WAR 0x0400 /* altenative G-band PLL settings implemented */
|
|
+
|
|
/* Values for SSB_SPROM1_BINF_CCODE */
|
|
enum {
|
|
SSB_SPROM1CCODE_WORLD = 0,
|