mirror of
git://projects.qi-hardware.com/openwrt-xburst.git
synced 2024-11-15 09:50:16 +02:00
cbe6c66638
git-svn-id: svn://svn.openwrt.org/openwrt/trunk@23470 3c298f89-4303-0410-b956-a3cf2f4a3e73
249 lines
7.8 KiB
Diff
249 lines
7.8 KiB
Diff
--- a/drivers/net/wireless/ath/ath9k/ar9002_mac.c
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+++ b/drivers/net/wireless/ath/ath9k/ar9002_mac.c
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@@ -208,77 +208,68 @@ static int ar9002_hw_proc_txdesc(struct
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struct ath_tx_status *ts)
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{
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struct ar5416_desc *ads = AR5416DESC(ds);
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+ u32 status;
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- if ((ads->ds_txstatus9 & AR_TxDone) == 0)
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+ status = ACCESS_ONCE(ads->ds_txstatus9);
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+ if ((status & AR_TxDone) == 0)
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return -EINPROGRESS;
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- ts->ts_seqnum = MS(ads->ds_txstatus9, AR_SeqNum);
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ts->ts_tstamp = ads->AR_SendTimestamp;
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ts->ts_status = 0;
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ts->ts_flags = 0;
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- if (ads->ds_txstatus1 & AR_FrmXmitOK)
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+ if (status & AR_TxOpExceeded)
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+ ts->ts_status |= ATH9K_TXERR_XTXOP;
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+ ts->tid = MS(status, AR_TxTid);
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+ ts->ts_rateindex = MS(status, AR_FinalTxIdx);
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+ ts->ts_seqnum = MS(status, AR_SeqNum);
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+
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+ status = ACCESS_ONCE(ads->ds_txstatus0);
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+ ts->ts_rssi_ctl0 = MS(status, AR_TxRSSIAnt00);
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+ ts->ts_rssi_ctl1 = MS(status, AR_TxRSSIAnt01);
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+ ts->ts_rssi_ctl2 = MS(status, AR_TxRSSIAnt02);
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+ if (status & AR_TxBaStatus) {
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+ ts->ts_flags |= ATH9K_TX_BA;
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+ ts->ba_low = ads->AR_BaBitmapLow;
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+ ts->ba_high = ads->AR_BaBitmapHigh;
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+ }
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+
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+ status = ACCESS_ONCE(ads->ds_txstatus1);
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+ if (status & AR_FrmXmitOK)
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ts->ts_status |= ATH9K_TX_ACKED;
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- if (ads->ds_txstatus1 & AR_ExcessiveRetries)
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+ if (status & AR_ExcessiveRetries)
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ts->ts_status |= ATH9K_TXERR_XRETRY;
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- if (ads->ds_txstatus1 & AR_Filtered)
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+ if (status & AR_Filtered)
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ts->ts_status |= ATH9K_TXERR_FILT;
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- if (ads->ds_txstatus1 & AR_FIFOUnderrun) {
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+ if (status & AR_FIFOUnderrun) {
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ts->ts_status |= ATH9K_TXERR_FIFO;
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ath9k_hw_updatetxtriglevel(ah, true);
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}
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- if (ads->ds_txstatus9 & AR_TxOpExceeded)
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- ts->ts_status |= ATH9K_TXERR_XTXOP;
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- if (ads->ds_txstatus1 & AR_TxTimerExpired)
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+ if (status & AR_TxTimerExpired)
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ts->ts_status |= ATH9K_TXERR_TIMER_EXPIRED;
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-
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- if (ads->ds_txstatus1 & AR_DescCfgErr)
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+ if (status & AR_DescCfgErr)
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ts->ts_flags |= ATH9K_TX_DESC_CFG_ERR;
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- if (ads->ds_txstatus1 & AR_TxDataUnderrun) {
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+ if (status & AR_TxDataUnderrun) {
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ts->ts_flags |= ATH9K_TX_DATA_UNDERRUN;
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ath9k_hw_updatetxtriglevel(ah, true);
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}
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- if (ads->ds_txstatus1 & AR_TxDelimUnderrun) {
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+ if (status & AR_TxDelimUnderrun) {
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ts->ts_flags |= ATH9K_TX_DELIM_UNDERRUN;
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ath9k_hw_updatetxtriglevel(ah, true);
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}
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- if (ads->ds_txstatus0 & AR_TxBaStatus) {
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- ts->ts_flags |= ATH9K_TX_BA;
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- ts->ba_low = ads->AR_BaBitmapLow;
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- ts->ba_high = ads->AR_BaBitmapHigh;
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- }
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-
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- ts->ts_rateindex = MS(ads->ds_txstatus9, AR_FinalTxIdx);
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- switch (ts->ts_rateindex) {
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- case 0:
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- ts->ts_ratecode = MS(ads->ds_ctl3, AR_XmitRate0);
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- break;
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- case 1:
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- ts->ts_ratecode = MS(ads->ds_ctl3, AR_XmitRate1);
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- break;
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- case 2:
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- ts->ts_ratecode = MS(ads->ds_ctl3, AR_XmitRate2);
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- break;
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- case 3:
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- ts->ts_ratecode = MS(ads->ds_ctl3, AR_XmitRate3);
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- break;
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- }
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+ ts->ts_shortretry = MS(status, AR_RTSFailCnt);
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+ ts->ts_longretry = MS(status, AR_DataFailCnt);
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+ ts->ts_virtcol = MS(status, AR_VirtRetryCnt);
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+
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+ status = ACCESS_ONCE(ads->ds_txstatus5);
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+ ts->ts_rssi = MS(status, AR_TxRSSICombined);
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+ ts->ts_rssi_ext0 = MS(status, AR_TxRSSIAnt10);
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+ ts->ts_rssi_ext1 = MS(status, AR_TxRSSIAnt11);
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+ ts->ts_rssi_ext2 = MS(status, AR_TxRSSIAnt12);
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- ts->ts_rssi = MS(ads->ds_txstatus5, AR_TxRSSICombined);
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- ts->ts_rssi_ctl0 = MS(ads->ds_txstatus0, AR_TxRSSIAnt00);
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- ts->ts_rssi_ctl1 = MS(ads->ds_txstatus0, AR_TxRSSIAnt01);
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- ts->ts_rssi_ctl2 = MS(ads->ds_txstatus0, AR_TxRSSIAnt02);
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- ts->ts_rssi_ext0 = MS(ads->ds_txstatus5, AR_TxRSSIAnt10);
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- ts->ts_rssi_ext1 = MS(ads->ds_txstatus5, AR_TxRSSIAnt11);
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- ts->ts_rssi_ext2 = MS(ads->ds_txstatus5, AR_TxRSSIAnt12);
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ts->evm0 = ads->AR_TxEVM0;
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ts->evm1 = ads->AR_TxEVM1;
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ts->evm2 = ads->AR_TxEVM2;
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- ts->ts_shortretry = MS(ads->ds_txstatus1, AR_RTSFailCnt);
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- ts->ts_longretry = MS(ads->ds_txstatus1, AR_DataFailCnt);
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- ts->ts_virtcol = MS(ads->ds_txstatus1, AR_VirtRetryCnt);
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- ts->tid = MS(ads->ds_txstatus9, AR_TxTid);
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- ts->ts_antenna = 0;
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return 0;
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}
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--- a/drivers/net/wireless/ath/ath9k/mac.h
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+++ b/drivers/net/wireless/ath/ath9k/mac.h
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@@ -104,13 +104,11 @@ struct ath_tx_status {
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u32 ts_tstamp;
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u16 ts_seqnum;
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u8 ts_status;
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- u8 ts_ratecode;
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u8 ts_rateindex;
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int8_t ts_rssi;
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u8 ts_shortretry;
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u8 ts_longretry;
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u8 ts_virtcol;
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- u8 ts_antenna;
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u8 ts_flags;
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int8_t ts_rssi_ctl0;
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int8_t ts_rssi_ctl1;
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@@ -121,7 +119,6 @@ struct ath_tx_status {
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u8 qid;
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u16 desc_id;
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u8 tid;
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- u8 pad[2];
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u32 ba_low;
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u32 ba_high;
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u32 evm0;
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--- a/drivers/net/wireless/ath/ath9k/ar9003_mac.c
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+++ b/drivers/net/wireless/ath/ath9k/ar9003_mac.c
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@@ -237,10 +237,12 @@ static int ar9003_hw_proc_txdesc(struct
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struct ath_tx_status *ts)
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{
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struct ar9003_txs *ads;
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+ u32 status;
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ads = &ah->ts_ring[ah->ts_tail];
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- if ((ads->status8 & AR_TxDone) == 0)
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+ status = ACCESS_ONCE(ads->status8);
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+ if ((status & AR_TxDone) == 0)
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return -EINPROGRESS;
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ah->ts_tail = (ah->ts_tail + 1) % ah->ts_size;
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@@ -253,57 +255,58 @@ static int ar9003_hw_proc_txdesc(struct
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return -EIO;
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}
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+ if (status & AR_TxOpExceeded)
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+ ts->ts_status |= ATH9K_TXERR_XTXOP;
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+ ts->ts_rateindex = MS(status, AR_FinalTxIdx);
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+ ts->ts_seqnum = MS(status, AR_SeqNum);
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+ ts->tid = MS(status, AR_TxTid);
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+
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ts->qid = MS(ads->ds_info, AR_TxQcuNum);
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ts->desc_id = MS(ads->status1, AR_TxDescId);
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- ts->ts_seqnum = MS(ads->status8, AR_SeqNum);
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ts->ts_tstamp = ads->status4;
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ts->ts_status = 0;
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ts->ts_flags = 0;
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- if (ads->status3 & AR_ExcessiveRetries)
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+ status = ACCESS_ONCE(ads->status2);
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+ ts->ts_rssi_ctl0 = MS(status, AR_TxRSSIAnt00);
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+ ts->ts_rssi_ctl1 = MS(status, AR_TxRSSIAnt01);
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+ ts->ts_rssi_ctl2 = MS(status, AR_TxRSSIAnt02);
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+ if (status & AR_TxBaStatus) {
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+ ts->ts_flags |= ATH9K_TX_BA;
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+ ts->ba_low = ads->status5;
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+ ts->ba_high = ads->status6;
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+ }
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+
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+ status = ACCESS_ONCE(ads->status3);
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+ if (status & AR_ExcessiveRetries)
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ts->ts_status |= ATH9K_TXERR_XRETRY;
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- if (ads->status3 & AR_Filtered)
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+ if (status & AR_Filtered)
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ts->ts_status |= ATH9K_TXERR_FILT;
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- if (ads->status3 & AR_FIFOUnderrun) {
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+ if (status & AR_FIFOUnderrun) {
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ts->ts_status |= ATH9K_TXERR_FIFO;
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ath9k_hw_updatetxtriglevel(ah, true);
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}
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- if (ads->status8 & AR_TxOpExceeded)
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- ts->ts_status |= ATH9K_TXERR_XTXOP;
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- if (ads->status3 & AR_TxTimerExpired)
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+ if (status & AR_TxTimerExpired)
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ts->ts_status |= ATH9K_TXERR_TIMER_EXPIRED;
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-
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- if (ads->status3 & AR_DescCfgErr)
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+ if (status & AR_DescCfgErr)
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ts->ts_flags |= ATH9K_TX_DESC_CFG_ERR;
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- if (ads->status3 & AR_TxDataUnderrun) {
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+ if (status & AR_TxDataUnderrun) {
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ts->ts_flags |= ATH9K_TX_DATA_UNDERRUN;
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ath9k_hw_updatetxtriglevel(ah, true);
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}
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- if (ads->status3 & AR_TxDelimUnderrun) {
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+ if (status & AR_TxDelimUnderrun) {
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ts->ts_flags |= ATH9K_TX_DELIM_UNDERRUN;
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ath9k_hw_updatetxtriglevel(ah, true);
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}
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- if (ads->status2 & AR_TxBaStatus) {
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- ts->ts_flags |= ATH9K_TX_BA;
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- ts->ba_low = ads->status5;
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- ts->ba_high = ads->status6;
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- }
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-
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- ts->ts_rateindex = MS(ads->status8, AR_FinalTxIdx);
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-
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- ts->ts_rssi = MS(ads->status7, AR_TxRSSICombined);
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- ts->ts_rssi_ctl0 = MS(ads->status2, AR_TxRSSIAnt00);
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- ts->ts_rssi_ctl1 = MS(ads->status2, AR_TxRSSIAnt01);
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- ts->ts_rssi_ctl2 = MS(ads->status2, AR_TxRSSIAnt02);
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- ts->ts_rssi_ext0 = MS(ads->status7, AR_TxRSSIAnt10);
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- ts->ts_rssi_ext1 = MS(ads->status7, AR_TxRSSIAnt11);
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- ts->ts_rssi_ext2 = MS(ads->status7, AR_TxRSSIAnt12);
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- ts->ts_shortretry = MS(ads->status3, AR_RTSFailCnt);
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- ts->ts_longretry = MS(ads->status3, AR_DataFailCnt);
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- ts->ts_virtcol = MS(ads->status3, AR_VirtRetryCnt);
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- ts->ts_antenna = 0;
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-
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- ts->tid = MS(ads->status8, AR_TxTid);
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+ ts->ts_shortretry = MS(status, AR_RTSFailCnt);
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+ ts->ts_longretry = MS(status, AR_DataFailCnt);
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+ ts->ts_virtcol = MS(status, AR_VirtRetryCnt);
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+
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+ status = ACCESS_ONCE(ads->status7);
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+ ts->ts_rssi = MS(status, AR_TxRSSICombined);
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+ ts->ts_rssi_ext0 = MS(status, AR_TxRSSIAnt10);
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+ ts->ts_rssi_ext1 = MS(status, AR_TxRSSIAnt11);
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+ ts->ts_rssi_ext2 = MS(status, AR_TxRSSIAnt12);
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memset(ads, 0, sizeof(*ads));
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