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de071d14f7
Somehow detecting the RAM size in common/setup.c doesn't work here, it always detects 64M and then crashes on devices with less RAM. Probably using MEMC_REG_SDRAM_CFG1 to know the RAM size is how it could be, for now I use the mem=32M kernel parameter to get stuff working. Signed-off-by: Daniel Golle <dgolle@allnet.de> git-svn-id: svn://svn.openwrt.org/openwrt/trunk@33381 3c298f89-4303-0410-b956-a3cf2f4a3e73
414 lines
9.9 KiB
C
414 lines
9.9 KiB
C
/*
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* Ralink RT305x SoC platform device registration
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*
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* Copyright (C) 2009-2010 Gabor Juhos <juhosg@openwrt.org>
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*
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* This program is free software; you can redistribute it and/or modify it
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* under the terms of the GNU General Public License version 2 as published
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* by the Free Software Foundation.
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*/
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#include <linux/kernel.h>
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#include <linux/platform_device.h>
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#include <linux/err.h>
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#include <linux/clk.h>
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#include <linux/mtd/mtd.h>
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#include <linux/mtd/physmap.h>
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#include <linux/spi/spi.h>
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#include <linux/rt2x00_platform.h>
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#include <linux/delay.h>
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#include <linux/dma-mapping.h>
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#include <asm/addrspace.h>
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#include <asm/mach-ralink/rt305x.h>
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#include <asm/mach-ralink/rt305x_regs.h>
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#include "devices.h"
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#include <ramips_eth_platform.h>
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#include <rt305x_esw_platform.h>
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#include <rt3883_ehci_platform.h>
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#include <rt3883_ohci_platform.h>
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static struct resource rt305x_flash0_resources[] = {
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{
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.flags = IORESOURCE_MEM,
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.start = KSEG1ADDR(RT305X_FLASH0_BASE),
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.end = KSEG1ADDR(RT305X_FLASH0_BASE) +
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RT305X_FLASH0_SIZE - 1,
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},
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};
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struct physmap_flash_data rt305x_flash0_data;
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static struct platform_device rt305x_flash0_device = {
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.name = "physmap-flash",
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.resource = rt305x_flash0_resources,
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.num_resources = ARRAY_SIZE(rt305x_flash0_resources),
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.dev = {
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.platform_data = &rt305x_flash0_data,
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},
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};
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static struct resource rt305x_flash1_resources[] = {
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{
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.flags = IORESOURCE_MEM,
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.start = KSEG1ADDR(RT305X_FLASH1_BASE),
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.end = KSEG1ADDR(RT305X_FLASH1_BASE) +
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RT305X_FLASH1_SIZE - 1,
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},
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};
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struct physmap_flash_data rt305x_flash1_data;
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static struct platform_device rt305x_flash1_device = {
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.name = "physmap-flash",
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.resource = rt305x_flash1_resources,
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.num_resources = ARRAY_SIZE(rt305x_flash1_resources),
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.dev = {
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.platform_data = &rt305x_flash1_data,
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},
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};
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static int rt305x_flash_instance __initdata;
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void __init rt305x_register_flash(unsigned int id)
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{
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struct platform_device *pdev;
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struct physmap_flash_data *pdata;
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u32 t;
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int reg;
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switch (id) {
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case 0:
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pdev = &rt305x_flash0_device;
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reg = MEMC_REG_FLASH_CFG0;
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break;
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case 1:
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pdev = &rt305x_flash1_device;
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reg = MEMC_REG_FLASH_CFG1;
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break;
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default:
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return;
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}
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t = rt305x_memc_rr(reg);
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t = (t >> FLASH_CFG_WIDTH_SHIFT) & FLASH_CFG_WIDTH_MASK;
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pdata = pdev->dev.platform_data;
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switch (t) {
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case FLASH_CFG_WIDTH_8BIT:
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pdata->width = 1;
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break;
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case FLASH_CFG_WIDTH_16BIT:
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pdata->width = 2;
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break;
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case FLASH_CFG_WIDTH_32BIT:
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pdata->width = 4;
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break;
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default:
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printk(KERN_ERR "RT305x: flash bank%u witdh is invalid\n", id);
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return;
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}
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pdev->id = rt305x_flash_instance;
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platform_device_register(pdev);
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rt305x_flash_instance++;
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}
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static void rt305x_fe_reset(void)
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{
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rt305x_sysc_wr(RT305X_RESET_FE, SYSC_REG_RESET_CTRL);
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rt305x_sysc_wr(0, SYSC_REG_RESET_CTRL);
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}
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static struct resource rt305x_eth_resources[] = {
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{
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.start = RT305X_FE_BASE,
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.end = RT305X_FE_BASE + PAGE_SIZE - 1,
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.flags = IORESOURCE_MEM,
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}, {
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.start = RT305X_CPU_IRQ_FE,
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.end = RT305X_CPU_IRQ_FE,
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.flags = IORESOURCE_IRQ,
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},
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};
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static struct ramips_eth_platform_data ramips_eth_data = {
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.mac = { 0x00, 0x11, 0x22, 0x33, 0x44, 0x55 },
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.reset_fe = rt305x_fe_reset,
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.min_pkt_len = 64,
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};
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static struct platform_device rt305x_eth_device = {
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.name = "ramips_eth",
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.resource = rt305x_eth_resources,
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.num_resources = ARRAY_SIZE(rt305x_eth_resources),
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.dev = {
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.platform_data = &ramips_eth_data,
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}
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};
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static struct resource rt305x_esw_resources[] = {
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{
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.start = RT305X_SWITCH_BASE,
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.end = RT305X_SWITCH_BASE + PAGE_SIZE - 1,
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.flags = IORESOURCE_MEM,
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},
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};
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struct rt305x_esw_platform_data rt305x_esw_data = {
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/* All ports are LAN ports. */
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.vlan_config = RT305X_ESW_VLAN_CONFIG_NONE,
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.reg_initval_fct2 = 0x00d6500c,
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/*
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* ext phy base addr 31, enable port 5 polling, rx/tx clock skew 1,
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* turbo mii off, rgmi 3.3v off
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* port5: disabled
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* port6: enabled, gige, full-duplex, rx/tx-flow-control
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*/
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.reg_initval_fpa2 = 0x3f502b28,
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};
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static struct platform_device rt305x_esw_device = {
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.name = "rt305x-esw",
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.resource = rt305x_esw_resources,
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.num_resources = ARRAY_SIZE(rt305x_esw_resources),
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.dev = {
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.platform_data = &rt305x_esw_data,
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}
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};
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void __init rt305x_register_ethernet(void)
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{
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struct clk *clk;
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clk = clk_get(NULL, "sys");
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if (IS_ERR(clk))
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panic("unable to get SYS clock, err=%ld", PTR_ERR(clk));
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ramips_eth_data.sys_freq = clk_get_rate(clk);
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platform_device_register(&rt305x_esw_device);
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platform_device_register(&rt305x_eth_device);
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}
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static struct resource rt305x_wifi_resources[] = {
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{
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.start = RT305X_WMAC_BASE,
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.end = RT305X_WMAC_BASE + 0x3FFFF,
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.flags = IORESOURCE_MEM,
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}, {
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.start = RT305X_CPU_IRQ_WNIC,
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.end = RT305X_CPU_IRQ_WNIC,
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.flags = IORESOURCE_IRQ,
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},
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};
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static struct rt2x00_platform_data rt305x_wifi_data;
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static struct platform_device rt305x_wifi_device = {
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.name = "rt2800_wmac",
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.resource = rt305x_wifi_resources,
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.num_resources = ARRAY_SIZE(rt305x_wifi_resources),
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.dev = {
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.platform_data = &rt305x_wifi_data,
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}
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};
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void __init rt305x_register_wifi(void)
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{
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rt305x_wifi_data.eeprom_file_name = "RT305X.eeprom";
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platform_device_register(&rt305x_wifi_device);
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}
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static struct resource rt305x_wdt_resources[] = {
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{
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.start = RT305X_TIMER_BASE,
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.end = RT305X_TIMER_BASE + RT305X_TIMER_SIZE - 1,
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.flags = IORESOURCE_MEM,
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},
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};
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static struct platform_device rt305x_wdt_device = {
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.name = "ramips-wdt",
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.id = -1,
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.resource = rt305x_wdt_resources,
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.num_resources = ARRAY_SIZE(rt305x_wdt_resources),
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};
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void __init rt305x_register_wdt(void)
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{
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u32 t;
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/* enable WDT reset output on pin SRAM_CS_N */
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t = rt305x_sysc_rr(SYSC_REG_SYSTEM_CONFIG);
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t |= RT305X_SYSCFG_SRAM_CS0_MODE_WDT <<
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RT305X_SYSCFG_SRAM_CS0_MODE_SHIFT;
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rt305x_sysc_wr(t, SYSC_REG_SYSTEM_CONFIG);
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platform_device_register(&rt305x_wdt_device);
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}
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static struct resource rt305x_spi_resources[] = {
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{
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.flags = IORESOURCE_MEM,
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.start = RT305X_SPI_BASE,
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.end = RT305X_SPI_BASE + RT305X_SPI_SIZE - 1,
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},
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};
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static struct platform_device rt305x_spi_device = {
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.name = "ramips-spi",
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.id = 0,
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.resource = rt305x_spi_resources,
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.num_resources = ARRAY_SIZE(rt305x_spi_resources),
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};
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void __init rt305x_register_spi(struct spi_board_info *info, int n)
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{
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spi_register_board_info(info, n);
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platform_device_register(&rt305x_spi_device);
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}
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static struct resource rt305x_dwc_otg_resources[] = {
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{
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.start = RT305X_OTG_BASE,
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.end = RT305X_OTG_BASE + 0x3FFFF,
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.flags = IORESOURCE_MEM,
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}, {
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.start = RT305X_INTC_IRQ_OTG,
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.end = RT305X_INTC_IRQ_OTG,
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.flags = IORESOURCE_IRQ,
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},
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};
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static struct platform_device rt305x_dwc_otg_device = {
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.name = "dwc_otg",
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.resource = rt305x_dwc_otg_resources,
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.num_resources = ARRAY_SIZE(rt305x_dwc_otg_resources),
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.dev = {
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.platform_data = NULL,
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}
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};
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static atomic_t rt3352_usb_use_count = ATOMIC_INIT(0);
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static void rt3352_usb_host_start(void)
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{
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u32 t;
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if (atomic_inc_return(&rt3352_usb_use_count) != 1)
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return;
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t = rt305x_sysc_rr(RT3352_SYSC_REG_USB_PS);
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/* enable clock for port0's and port1's phys */
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t = rt305x_sysc_rr(RT3352_SYSC_REG_CLKCFG1);
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t = t | RT3352_CLKCFG1_UPHY0_CLK_EN | RT3352_CLKCFG1_UPHY1_CLK_EN;
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rt305x_sysc_wr(t, RT3352_SYSC_REG_CLKCFG1);
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mdelay(500);
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/* pull USBHOST and USBDEV out from reset */
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t = rt305x_sysc_rr(RT3352_SYSC_REG_RSTCTRL);
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t &= ~(RT3352_RSTCTRL_UHST | RT3352_RSTCTRL_UDEV);
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rt305x_sysc_wr(t, RT3352_SYSC_REG_RSTCTRL);
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mdelay(500);
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/* enable host mode */
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t = rt305x_sysc_rr(RT3352_SYSC_REG_SYSCFG1);
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t |= RT3352_SYSCFG1_USB0_HOST_MODE;
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rt305x_sysc_wr(t, RT3352_SYSC_REG_SYSCFG1);
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t = rt305x_sysc_rr(RT3352_SYSC_REG_USB_PS);
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}
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static void rt3352_usb_host_stop(void)
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{
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u32 t;
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if (atomic_dec_return(&rt3352_usb_use_count) != 0)
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return;
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/* put USBHOST and USBDEV into reset */
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t = rt305x_sysc_rr(RT3352_SYSC_REG_RSTCTRL);
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t |= RT3352_RSTCTRL_UHST | RT3352_RSTCTRL_UDEV;
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rt305x_sysc_wr(t, RT3352_SYSC_REG_RSTCTRL);
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udelay(10000);
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/* disable clock for port0's and port1's phys*/
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t = rt305x_sysc_rr(RT3352_SYSC_REG_CLKCFG1);
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t &= ~(RT3352_CLKCFG1_UPHY0_CLK_EN | RT3352_CLKCFG1_UPHY1_CLK_EN);
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rt305x_sysc_wr(t, RT3352_SYSC_REG_CLKCFG1);
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udelay(10000);
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}
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static struct rt3883_ehci_platform_data rt3352_ehci_data = {
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.start_hw = rt3352_usb_host_start,
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.stop_hw = rt3352_usb_host_stop,
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};
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static struct resource rt3352_ehci_resources[] = {
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{
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.start = RT3352_EHCI_BASE,
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.end = RT3352_EHCI_BASE + RT3352_EHCI_SIZE - 1,
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.flags = IORESOURCE_MEM,
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}, {
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.start = RT305X_INTC_IRQ_OTG,
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.end = RT305X_INTC_IRQ_OTG,
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.flags = IORESOURCE_IRQ,
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},
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};
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static u64 rt3352_ehci_dmamask = DMA_BIT_MASK(32);
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static struct platform_device rt3352_ehci_device = {
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.name = "rt3883-ehci",
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.id = -1,
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.resource = rt3352_ehci_resources,
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.num_resources = ARRAY_SIZE(rt3352_ehci_resources),
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.dev = {
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.dma_mask = &rt3352_ehci_dmamask,
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.coherent_dma_mask = DMA_BIT_MASK(32),
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.platform_data = &rt3352_ehci_data,
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},
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};
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static struct resource rt3352_ohci_resources[] = {
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{
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.start = RT3352_OHCI_BASE,
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.end = RT3352_OHCI_BASE + RT3352_OHCI_SIZE - 1,
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.flags = IORESOURCE_MEM,
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}, {
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.start = RT305X_INTC_IRQ_OTG,
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.end = RT305X_INTC_IRQ_OTG,
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.flags = IORESOURCE_IRQ,
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},
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};
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static struct rt3883_ohci_platform_data rt3352_ohci_data = {
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.start_hw = rt3352_usb_host_start,
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.stop_hw = rt3352_usb_host_stop,
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};
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static u64 rt3352_ohci_dmamask = DMA_BIT_MASK(32);
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static struct platform_device rt3352_ohci_device = {
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.name = "rt3883-ohci",
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.id = -1,
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.resource = rt3352_ohci_resources,
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.num_resources = ARRAY_SIZE(rt3352_ohci_resources),
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.dev = {
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.dma_mask = &rt3352_ohci_dmamask,
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.coherent_dma_mask = DMA_BIT_MASK(32),
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.platform_data = &rt3352_ohci_data,
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},
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};
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void __init rt305x_register_usb(void)
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{
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if (soc_is_rt305x() || soc_is_rt3350()) {
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platform_device_register(&rt305x_dwc_otg_device);
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} else if (soc_is_rt3352() || soc_is_rt5350()) {
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platform_device_register(&rt3352_ehci_device);
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platform_device_register(&rt3352_ohci_device);
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} else {
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BUG();
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}
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}
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