mirror of
git://projects.qi-hardware.com/openwrt-xburst.git
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9394e4a065
git-svn-id: svn://svn.openwrt.org/openwrt/trunk@28993 3c298f89-4303-0410-b956-a3cf2f4a3e73
205 lines
6.1 KiB
C
205 lines
6.1 KiB
C
/*
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* ar8216.h: AR8216 switch driver
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*
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* Copyright (C) 2009 Felix Fietkau <nbd@openwrt.org>
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*
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* This program is free software; you can redistribute it and/or
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* modify it under the terms of the GNU General Public License
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* as published by the Free Software Foundation; either version 2
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* of the License, or (at your option) any later version.
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*
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* This program is distributed in the hope that it will be useful,
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* but WITHOUT ANY WARRANTY; without even the implied warranty of
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* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
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* GNU General Public License for more details.
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*/
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#ifndef __AR8216_H
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#define __AR8216_H
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#define BITS(_s, _n) (((1UL << (_n)) - 1) << _s)
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#define AR8216_PORT_CPU 0
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#define AR8216_NUM_PORTS 6
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#define AR8216_NUM_VLANS 16
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#define AR8316_NUM_VLANS 4096
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/* Atheros specific MII registers */
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#define MII_ATH_DBG_ADDR 0x1d
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#define MII_ATH_DBG_DATA 0x1e
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#define AR8216_REG_CTRL 0x0000
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#define AR8216_CTRL_REVISION BITS(0, 8)
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#define AR8216_CTRL_REVISION_S 0
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#define AR8216_CTRL_VERSION BITS(8, 8)
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#define AR8216_CTRL_VERSION_S 8
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#define AR8216_CTRL_RESET BIT(31)
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#define AR8216_REG_FLOOD_MASK 0x002C
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#define AR8216_FM_UNI_DEST_PORTS BITS(0, 6)
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#define AR8216_FM_MULTI_DEST_PORTS BITS(16, 6)
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#define AR8216_REG_GLOBAL_CTRL 0x0030
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#define AR8216_GCTRL_MTU BITS(0, 11)
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#define AR8236_GCTRL_MTU BITS(0, 14)
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#define AR8316_GCTRL_MTU BITS(0, 14)
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#define AR8216_REG_VTU 0x0040
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#define AR8216_VTU_OP BITS(0, 3)
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#define AR8216_VTU_OP_NOOP 0x0
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#define AR8216_VTU_OP_FLUSH 0x1
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#define AR8216_VTU_OP_LOAD 0x2
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#define AR8216_VTU_OP_PURGE 0x3
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#define AR8216_VTU_OP_REMOVE_PORT 0x4
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#define AR8216_VTU_ACTIVE BIT(3)
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#define AR8216_VTU_FULL BIT(4)
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#define AR8216_VTU_PORT BITS(8, 4)
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#define AR8216_VTU_PORT_S 8
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#define AR8216_VTU_VID BITS(16, 12)
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#define AR8216_VTU_VID_S 16
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#define AR8216_VTU_PRIO BITS(28, 3)
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#define AR8216_VTU_PRIO_S 28
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#define AR8216_VTU_PRIO_EN BIT(31)
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#define AR8216_REG_VTU_DATA 0x0044
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#define AR8216_VTUDATA_MEMBER BITS(0, 10)
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#define AR8236_VTUDATA_MEMBER BITS(0, 7)
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#define AR8216_VTUDATA_VALID BIT(11)
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#define AR8216_REG_ATU 0x0050
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#define AR8216_ATU_OP BITS(0, 3)
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#define AR8216_ATU_OP_NOOP 0x0
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#define AR8216_ATU_OP_FLUSH 0x1
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#define AR8216_ATU_OP_LOAD 0x2
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#define AR8216_ATU_OP_PURGE 0x3
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#define AR8216_ATU_OP_FLUSH_LOCKED 0x4
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#define AR8216_ATU_OP_FLUSH_UNICAST 0x5
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#define AR8216_ATU_OP_GET_NEXT 0x6
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#define AR8216_ATU_ACTIVE BIT(3)
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#define AR8216_ATU_PORT_NUM BITS(8, 4)
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#define AR8216_ATU_FULL_VIO BIT(12)
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#define AR8216_ATU_ADDR4 BITS(16, 8)
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#define AR8216_ATU_ADDR5 BITS(24, 8)
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#define AR8216_REG_ATU_DATA 0x0054
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#define AR8216_ATU_ADDR3 BITS(0, 8)
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#define AR8216_ATU_ADDR2 BITS(8, 8)
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#define AR8216_ATU_ADDR1 BITS(16, 8)
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#define AR8216_ATU_ADDR0 BITS(24, 8)
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#define AR8216_REG_ATU_CTRL 0x005C
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#define AR8216_ATU_CTRL_AGE_EN BIT(17)
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#define AR8216_ATU_CTRL_AGE_TIME BITS(0, 16)
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#define AR8216_ATU_CTRL_AGE_TIME_S 0
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#define AR8216_PORT_OFFSET(_i) (0x0100 * (_i + 1))
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#define AR8216_REG_PORT_STATUS(_i) (AR8216_PORT_OFFSET(_i) + 0x0000)
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#define AR8216_PORT_STATUS_SPEED BITS(0,2)
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#define AR8216_PORT_STATUS_SPEED_S 0
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#define AR8216_PORT_STATUS_TXMAC BIT(2)
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#define AR8216_PORT_STATUS_RXMAC BIT(3)
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#define AR8216_PORT_STATUS_TXFLOW BIT(4)
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#define AR8216_PORT_STATUS_RXFLOW BIT(5)
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#define AR8216_PORT_STATUS_DUPLEX BIT(6)
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#define AR8216_PORT_STATUS_LINK_UP BIT(8)
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#define AR8216_PORT_STATUS_LINK_AUTO BIT(9)
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#define AR8216_PORT_STATUS_LINK_PAUSE BIT(10)
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#define AR8216_REG_PORT_CTRL(_i) (AR8216_PORT_OFFSET(_i) + 0x0004)
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/* port forwarding state */
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#define AR8216_PORT_CTRL_STATE BITS(0, 3)
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#define AR8216_PORT_CTRL_STATE_S 0
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#define AR8216_PORT_CTRL_LEARN_LOCK BIT(7)
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/* egress 802.1q mode */
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#define AR8216_PORT_CTRL_VLAN_MODE BITS(8, 2)
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#define AR8216_PORT_CTRL_VLAN_MODE_S 8
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#define AR8216_PORT_CTRL_IGMP_SNOOP BIT(10)
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#define AR8216_PORT_CTRL_HEADER BIT(11)
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#define AR8216_PORT_CTRL_MAC_LOOP BIT(12)
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#define AR8216_PORT_CTRL_SINGLE_VLAN BIT(13)
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#define AR8216_PORT_CTRL_LEARN BIT(14)
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#define AR8216_PORT_CTRL_MIRROR_TX BIT(16)
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#define AR8216_PORT_CTRL_MIRROR_RX BIT(17)
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#define AR8216_REG_PORT_VLAN(_i) (AR8216_PORT_OFFSET(_i) + 0x0008)
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#define AR8216_PORT_VLAN_DEFAULT_ID BITS(0, 12)
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#define AR8216_PORT_VLAN_DEFAULT_ID_S 0
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#define AR8216_PORT_VLAN_DEST_PORTS BITS(16, 9)
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#define AR8216_PORT_VLAN_DEST_PORTS_S 16
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/* bit0 added to the priority field of egress frames */
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#define AR8216_PORT_VLAN_TX_PRIO BIT(27)
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/* port default priority */
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#define AR8216_PORT_VLAN_PRIORITY BITS(28, 2)
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#define AR8216_PORT_VLAN_PRIORITY_S 28
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/* ingress 802.1q mode */
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#define AR8216_PORT_VLAN_MODE BITS(30, 2)
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#define AR8216_PORT_VLAN_MODE_S 30
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#define AR8216_REG_PORT_RATE(_i) (AR8216_PORT_OFFSET(_i) + 0x000c)
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#define AR8216_REG_PORT_PRIO(_i) (AR8216_PORT_OFFSET(_i) + 0x0010)
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#define AR8236_REG_PORT_VLAN(_i) (AR8216_PORT_OFFSET((_i)) + 0x0008)
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#define AR8236_PORT_VLAN_DEFAULT_ID BITS(16, 12)
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#define AR8236_PORT_VLAN_DEFAULT_ID_S 16
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#define AR8236_PORT_VLAN_PRIORITY BITS(29, 3)
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#define AR8236_PORT_VLAN_PRIORITY_S 28
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#define AR8236_REG_PORT_VLAN2(_i) (AR8216_PORT_OFFSET((_i)) + 0x000c)
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#define AR8236_PORT_VLAN2_MEMBER BITS(16, 7)
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#define AR8236_PORT_VLAN2_MEMBER_S 16
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#define AR8236_PORT_VLAN2_TX_PRIO BIT(23)
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#define AR8236_PORT_VLAN2_VLAN_MODE BITS(30, 2)
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#define AR8236_PORT_VLAN2_VLAN_MODE_S 30
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/* port speed */
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enum {
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AR8216_PORT_SPEED_10M = 0,
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AR8216_PORT_SPEED_100M = 1,
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AR8216_PORT_SPEED_1000M = 2,
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AR8216_PORT_SPEED_ERR = 3,
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};
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/* ingress 802.1q mode */
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enum {
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AR8216_IN_PORT_ONLY = 0,
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AR8216_IN_PORT_FALLBACK = 1,
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AR8216_IN_VLAN_ONLY = 2,
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AR8216_IN_SECURE = 3
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};
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/* egress 802.1q mode */
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enum {
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AR8216_OUT_KEEP = 0,
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AR8216_OUT_STRIP_VLAN = 1,
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AR8216_OUT_ADD_VLAN = 2
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};
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/* port forwarding state */
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enum {
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AR8216_PORT_STATE_DISABLED = 0,
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AR8216_PORT_STATE_BLOCK = 1,
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AR8216_PORT_STATE_LISTEN = 2,
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AR8216_PORT_STATE_LEARN = 3,
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AR8216_PORT_STATE_FORWARD = 4
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};
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/* device */
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enum {
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UNKNOWN = 0,
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AR8216 = 8216,
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AR8236 = 8236,
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AR8316 = 8316,
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};
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#endif
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