mirror of
git://projects.qi-hardware.com/openwrt-xburst.git
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f1b159c402
For cns3xxx SCU_CONFIGURATION always shows multipe cores but SCU_CPU_STATUS shows which ones are active. Signed-off-by: Tim Harvey <tharvey@gateworks.com> git-svn-id: svn://svn.openwrt.org/openwrt/trunk@33566 3c298f89-4303-0410-b956-a3cf2f4a3e73
110 lines
2.9 KiB
Diff
110 lines
2.9 KiB
Diff
--- a/arch/arm/mach-cns3xxx/platsmp.c
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+++ b/arch/arm/mach-cns3xxx/platsmp.c
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@@ -1,18 +1,17 @@
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-/* linux/arch/arm/mach-cns3xxx/platsmp.c
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+/*
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+ * linux/arch/arm/mach-cns3xxx/platsmp.c
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*
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- * Copyright 2011 Gateworks Corporation
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+ * Copyright (C) 2002 ARM Ltd.
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+ * Copyright 2012 Gateworks Corporation
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* Chris Lang <clang@gateworks.com>
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+ * Tim Harvey <tharvey@gateworks.com>
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*
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- * Cloned from linux/arch/arm/mach-vexpress/platsmp.c
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- *
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- * Copyright (C) 2002 ARM Ltd.
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* All Rights Reserved
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*
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* This program is free software; you can redistribute it and/or modify
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* it under the terms of the GNU General Public License version 2 as
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* published by the Free Software Foundation.
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-*/
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-
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+ */
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#include <linux/init.h>
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#include <linux/errno.h>
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#include <linux/delay.h>
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@@ -30,11 +29,13 @@
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extern void cns3xxx_secondary_startup(void);
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+#define SCU_CPU_STATUS 0x08
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+static void __iomem *scu_base;
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+
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/*
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* control for which core is the next to come out of the secondary
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* boot "holding pen"
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*/
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-
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volatile int __cpuinitdata pen_release = -1;
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/*
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@@ -50,11 +51,6 @@ static void write_pen_release(int val)
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outer_clean_range(__pa(&pen_release), __pa(&pen_release + 1));
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}
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-static void __iomem *scu_base_addr(void)
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-{
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- return (void __iomem *)(CNS3XXX_TC11MP_SCU_BASE_VIRT);
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-}
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-
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static DEFINE_SPINLOCK(boot_lock);
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void __cpuinit platform_secondary_init(unsigned int cpu)
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@@ -128,25 +124,24 @@ int __cpuinit boot_secondary(unsigned in
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* Initialise the CPU possible map early - this describes the CPUs
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* which may be present or become present in the system.
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*/
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-
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void __init smp_init_cpus(void)
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{
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- void __iomem *scu_base = scu_base_addr();
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unsigned int i, ncores;
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+ unsigned int status;
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- ncores = scu_base ? scu_get_core_count(scu_base) : 1;
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+ scu_base = (void __iomem *) CNS3XXX_TC11MP_SCU_BASE_VIRT;
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- /* sanity check */
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- if (ncores > NR_CPUS) {
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- printk(KERN_WARNING
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- "cns3xxx: no. of cores (%d) greater than configured "
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- "maximum of %d - clipping\n",
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- ncores, NR_CPUS);
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- ncores = NR_CPUS;
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+ /* for CNS3xxx SCU_CPU_STATUS must be examined instead of SCU_CONFIGURATION
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+ * used in scu_get_core_count
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+ */
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+ status = __raw_readl(scu_base + SCU_CPU_STATUS);
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+ for (i = 0; i < NR_CPUS+1; i++) {
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+ if (((status >> (i*2)) & 0x3) == 0)
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+ set_cpu_possible(i, true);
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+ else
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+ break;
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}
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-
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- for (i = 0; i < ncores; i++)
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- set_cpu_possible(i, true);
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+ ncores = i;
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set_smp_cross_call(gic_raise_softirq);
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}
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@@ -159,10 +154,14 @@ void __init platform_smp_prepare_cpus(un
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* Initialise the present map, which describes the set of CPUs
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* actually populated at the present time.
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*/
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- for (i = 0; i < max_cpus; i++)
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+ for (i = 0; i < max_cpus; i++) {
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set_cpu_present(i, true);
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+ }
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- scu_enable(scu_base_addr());
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+ /*
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+ * enable SCU
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+ */
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+ scu_enable(scu_base);
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/*
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* Write the address of secondary startup into the
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