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git://projects.qi-hardware.com/openwrt-xburst.git
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b6dbd83901
(build error has been fixed - juhosg) Signed-off-by: Arnaud Lacombe <lacombar@gmail.com> git-svn-id: svn://svn.openwrt.org/openwrt/trunk@23975 3c298f89-4303-0410-b956-a3cf2f4a3e73
244 lines
5.4 KiB
C
244 lines
5.4 KiB
C
/*
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* Atheros AR71xx built-in ethernet mac driver
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*
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* Copyright (C) 2008-2010 Gabor Juhos <juhosg@openwrt.org>
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* Copyright (C) 2008 Imre Kaloz <kaloz@openwrt.org>
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*
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* Based on Atheros' AG7100 driver
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*
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* This program is free software; you can redistribute it and/or modify it
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* under the terms of the GNU General Public License version 2 as published
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* by the Free Software Foundation.
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*/
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#include "ag71xx.h"
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#define AG71XX_MDIO_RETRY 1000
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#define AG71XX_MDIO_DELAY 5
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static inline void ag71xx_mdio_wr(struct ag71xx_mdio *am, unsigned reg,
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u32 value)
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{
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void __iomem *r;
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r = am->mdio_base + reg;
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__raw_writel(value, r);
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/* flush write */
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(void) __raw_readl(r);
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}
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static inline u32 ag71xx_mdio_rr(struct ag71xx_mdio *am, unsigned reg)
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{
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return __raw_readl(am->mdio_base + reg);
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}
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static void ag71xx_mdio_dump_regs(struct ag71xx_mdio *am)
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{
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DBG("%s: mii_cfg=%08x, mii_cmd=%08x, mii_addr=%08x\n",
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am->mii_bus->name,
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ag71xx_mdio_rr(am, AG71XX_REG_MII_CFG),
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ag71xx_mdio_rr(am, AG71XX_REG_MII_CMD),
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ag71xx_mdio_rr(am, AG71XX_REG_MII_ADDR));
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DBG("%s: mii_ctrl=%08x, mii_status=%08x, mii_ind=%08x\n",
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am->mii_bus->name,
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ag71xx_mdio_rr(am, AG71XX_REG_MII_CTRL),
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ag71xx_mdio_rr(am, AG71XX_REG_MII_STATUS),
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ag71xx_mdio_rr(am, AG71XX_REG_MII_IND));
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}
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static int ag71xx_mdio_mii_read(struct ag71xx_mdio *am, int addr, int reg)
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{
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int ret;
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int i;
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ag71xx_mdio_wr(am, AG71XX_REG_MII_CMD, MII_CMD_WRITE);
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ag71xx_mdio_wr(am, AG71XX_REG_MII_ADDR,
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((addr & 0xff) << MII_ADDR_SHIFT) | (reg & 0xff));
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ag71xx_mdio_wr(am, AG71XX_REG_MII_CMD, MII_CMD_READ);
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i = AG71XX_MDIO_RETRY;
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while (ag71xx_mdio_rr(am, AG71XX_REG_MII_IND) & MII_IND_BUSY) {
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if (i-- == 0) {
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printk(KERN_ERR "%s: mii_read timed out\n",
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am->mii_bus->name);
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ret = 0xffff;
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goto out;
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}
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udelay(AG71XX_MDIO_DELAY);
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}
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ret = ag71xx_mdio_rr(am, AG71XX_REG_MII_STATUS) & 0xffff;
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ag71xx_mdio_wr(am, AG71XX_REG_MII_CMD, MII_CMD_WRITE);
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DBG("mii_read: addr=%04x, reg=%04x, value=%04x\n", addr, reg, ret);
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out:
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return ret;
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}
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static void ag71xx_mdio_mii_write(struct ag71xx_mdio *am,
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int addr, int reg, u16 val)
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{
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int i;
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DBG("mii_write: addr=%04x, reg=%04x, value=%04x\n", addr, reg, val);
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ag71xx_mdio_wr(am, AG71XX_REG_MII_ADDR,
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((addr & 0xff) << MII_ADDR_SHIFT) | (reg & 0xff));
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ag71xx_mdio_wr(am, AG71XX_REG_MII_CTRL, val);
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i = AG71XX_MDIO_RETRY;
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while (ag71xx_mdio_rr(am, AG71XX_REG_MII_IND) & MII_IND_BUSY) {
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if (i-- == 0) {
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printk(KERN_ERR "%s: mii_write timed out\n",
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am->mii_bus->name);
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break;
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}
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udelay(AG71XX_MDIO_DELAY);
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}
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}
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static int ag71xx_mdio_reset(struct mii_bus *bus)
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{
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struct ag71xx_mdio *am = bus->priv;
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u32 t;
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if (am->pdata->is_ar7240)
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t = MII_CFG_CLK_DIV_6;
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else
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t = MII_CFG_CLK_DIV_28;
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ag71xx_mdio_wr(am, AG71XX_REG_MII_CFG, t | MII_CFG_RESET);
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udelay(100);
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ag71xx_mdio_wr(am, AG71XX_REG_MII_CFG, t);
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udelay(100);
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return 0;
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}
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static int ag71xx_mdio_read(struct mii_bus *bus, int addr, int reg)
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{
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struct ag71xx_mdio *am = bus->priv;
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return ag71xx_mdio_mii_read(am, addr, reg);
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}
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static int ag71xx_mdio_write(struct mii_bus *bus, int addr, int reg, u16 val)
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{
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struct ag71xx_mdio *am = bus->priv;
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ag71xx_mdio_mii_write(am, addr, reg, val);
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return 0;
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}
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static int __devinit ag71xx_mdio_probe(struct platform_device *pdev)
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{
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struct ag71xx_mdio_platform_data *pdata;
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struct ag71xx_mdio *am;
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struct resource *res;
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int i;
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int err;
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pdata = pdev->dev.platform_data;
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if (!pdata) {
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dev_err(&pdev->dev, "no platform data specified\n");
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return -EINVAL;
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}
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am = kzalloc(sizeof(*am), GFP_KERNEL);
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if (!am) {
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err = -ENOMEM;
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goto err_out;
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}
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am->pdata = pdata;
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res = platform_get_resource(pdev, IORESOURCE_MEM, 0);
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if (!res) {
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dev_err(&pdev->dev, "no iomem resource found\n");
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err = -ENXIO;
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goto err_out;
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}
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am->mdio_base = ioremap_nocache(res->start, res->end - res->start + 1);
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if (!am->mdio_base) {
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dev_err(&pdev->dev, "unable to ioremap registers\n");
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err = -ENOMEM;
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goto err_free_mdio;
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}
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am->mii_bus = mdiobus_alloc();
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if (am->mii_bus == NULL) {
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err = -ENOMEM;
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goto err_iounmap;
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}
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am->mii_bus->name = "ag71xx_mdio";
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am->mii_bus->read = ag71xx_mdio_read;
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am->mii_bus->write = ag71xx_mdio_write;
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am->mii_bus->reset = ag71xx_mdio_reset;
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am->mii_bus->irq = am->mii_irq;
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am->mii_bus->priv = am;
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am->mii_bus->parent = &pdev->dev;
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snprintf(am->mii_bus->id, MII_BUS_ID_SIZE, "%s", dev_name(&pdev->dev));
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am->mii_bus->phy_mask = pdata->phy_mask;
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for (i = 0; i < PHY_MAX_ADDR; i++)
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am->mii_irq[i] = PHY_POLL;
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ag71xx_mdio_wr(am, AG71XX_REG_MAC_CFG1, 0);
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err = mdiobus_register(am->mii_bus);
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if (err)
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goto err_free_bus;
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ag71xx_mdio_dump_regs(am);
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platform_set_drvdata(pdev, am);
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return 0;
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err_free_bus:
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mdiobus_free(am->mii_bus);
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err_iounmap:
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iounmap(am->mdio_base);
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err_free_mdio:
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kfree(am);
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err_out:
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return err;
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}
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static int __devexit ag71xx_mdio_remove(struct platform_device *pdev)
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{
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struct ag71xx_mdio *am = platform_get_drvdata(pdev);
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if (am) {
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mdiobus_unregister(am->mii_bus);
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mdiobus_free(am->mii_bus);
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iounmap(am->mdio_base);
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kfree(am);
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platform_set_drvdata(pdev, NULL);
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}
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return 0;
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}
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static struct platform_driver ag71xx_mdio_driver = {
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.probe = ag71xx_mdio_probe,
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.remove = __exit_p(ag71xx_mdio_remove),
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.driver = {
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.name = "ag71xx-mdio",
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}
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};
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int __init ag71xx_mdio_driver_init(void)
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{
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return platform_driver_register(&ag71xx_mdio_driver);
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}
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void ag71xx_mdio_driver_exit(void)
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{
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platform_driver_unregister(&ag71xx_mdio_driver);
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}
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