mirror of
git://projects.qi-hardware.com/openwrt-xburst.git
synced 2024-12-11 16:44:04 +02:00
dc3d3f1c49
it's basically also provided by ingenic and nativly based on 2.6.27, adjusted to fit into the OpenWrt-environment
110 lines
2.7 KiB
C
110 lines
2.7 KiB
C
/*
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* Copyright (C) 2005-2007 by Texas Instruments
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* Some code has been taken from tusb6010.c
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* Copyrights for that are attributable to:
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* Copyright (C) 2006 Nokia Corporation
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* Jarkko Nikula <jarkko.nikula@nokia.com>
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* Tony Lindgren <tony@atomide.com>
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*
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* This file is part of the Inventra Controller Driver for Linux.
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*
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* The Inventra Controller Driver for Linux is free software; you
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* can redistribute it and/or modify it under the terms of the GNU
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* General Public License version 2 as published by the Free Software
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* Foundation.
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*
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* The Inventra Controller Driver for Linux is distributed in
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* the hope that it will be useful, but WITHOUT ANY WARRANTY;
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* without even the implied warranty of MERCHANTABILITY or
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* FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public
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* License for more details.
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*
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* You should have received a copy of the GNU General Public License
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* along with The Inventra Controller Driver for Linux ; if not,
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* write to the Free Software Foundation, Inc., 59 Temple Place,
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* Suite 330, Boston, MA 02111-1307 USA
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*
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*/
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#include <linux/module.h>
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#include <linux/kernel.h>
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#include <linux/sched.h>
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#include <linux/slab.h>
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#include <linux/init.h>
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#include <linux/list.h>
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#include <linux/clk.h>
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#include <linux/io.h>
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#include "musb_core.h"
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#define MUSB_TIMEOUT_A_WAIT_BCON 1100
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/* Hooks we hasn't used yet. */
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void musb_platform_enable(struct musb *musb)
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{
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return;
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}
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void musb_platform_disable(struct musb *musb)
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{
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return;
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}
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void musb_platform_set_mode(struct musb *musb, u8 musb_mode)
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{
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return;
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}
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/* Code copied form omap2430.c */
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static void jz4760_set_vbus(struct musb *musb, int is_on)
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{
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u8 devctl;
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/* HDRC controls CPEN, but beware current surges during device
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* connect. They can trigger transient overcurrent conditions
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* that must be ignored.
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*/
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devctl = musb_readb(musb->mregs, MUSB_DEVCTL);
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if (is_on) {
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musb->is_active = 1;
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musb->xceiv.default_a = 1;
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musb->xceiv.state = OTG_STATE_A_WAIT_VRISE;
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devctl |= MUSB_DEVCTL_SESSION;
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MUSB_HST_MODE(musb);
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} else {
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musb->is_active = 0;
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/* NOTE: we're skipping A_WAIT_VFALL -> A_IDLE and
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* jumping right to B_IDLE...
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*/
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musb->xceiv.default_a = 0;
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musb->xceiv.state = OTG_STATE_B_IDLE;
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devctl &= ~MUSB_DEVCTL_SESSION;
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MUSB_DEV_MODE(musb);
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}
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musb_writeb(musb->mregs, MUSB_DEVCTL, devctl);
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DBG(1, "VBUS %s, devctl %02x "
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/* otg %3x conf %08x prcm %08x */ "\n",
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otg_state_string(musb),
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musb_readb(musb->mregs, MUSB_DEVCTL));
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}
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int __init musb_platform_init(struct musb *musb)
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{
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if (is_host_enabled(musb))
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musb->board_set_vbus = jz4760_set_vbus;
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musb->a_wait_bcon = MUSB_TIMEOUT_A_WAIT_BCON;
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return 0;
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}
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int musb_platform_exit(struct musb *musb)
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{
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return 0;
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}
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