mirror of
git://projects.qi-hardware.com/openwrt-xburst.git
synced 2024-11-30 04:21:33 +02:00
2cea1e6b9a
openwrt. this gives us the ability to better support different hardware models, without changing any external tar-balls. only et.o and wl.o is missing and is fetched from my webserver. git-svn-id: svn://svn.openwrt.org/openwrt/trunk@379 3c298f89-4303-0410-b956-a3cf2f4a3e73
252 lines
8.0 KiB
C
252 lines
8.0 KiB
C
/*
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* Broadcom device-specific manifest constants.
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*
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* Copyright 2004, Broadcom Corporation
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* All Rights Reserved.
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*
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* THIS SOFTWARE IS OFFERED "AS IS", AND BROADCOM GRANTS NO WARRANTIES OF ANY
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* KIND, EXPRESS OR IMPLIED, BY STATUTE, COMMUNICATION OR OTHERWISE. BROADCOM
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* SPECIFICALLY DISCLAIMS ANY IMPLIED WARRANTIES OF MERCHANTABILITY, FITNESS
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* FOR A SPECIFIC PURPOSE OR NONINFRINGEMENT CONCERNING THIS SOFTWARE.
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* $Id$
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*/
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#ifndef _BCMDEVS_H
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#define _BCMDEVS_H
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/* Known PCI vendor Id's */
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#define VENDOR_EPIGRAM 0xfeda
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#define VENDOR_BROADCOM 0x14e4
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#define VENDOR_3COM 0x10b7
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#define VENDOR_NETGEAR 0x1385
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#define VENDOR_DIAMOND 0x1092
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#define VENDOR_DELL 0x1028
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#define VENDOR_HP 0x0e11
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#define VENDOR_APPLE 0x106b
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/* PCI Device Id's */
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#define BCM4210_DEVICE_ID 0x1072 /* never used */
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#define BCM4211_DEVICE_ID 0x4211
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#define BCM4230_DEVICE_ID 0x1086 /* never used */
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#define BCM4231_DEVICE_ID 0x4231
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#define BCM4410_DEVICE_ID 0x4410 /* bcm44xx family pci iline */
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#define BCM4430_DEVICE_ID 0x4430 /* bcm44xx family cardbus iline */
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#define BCM4412_DEVICE_ID 0x4412 /* bcm44xx family pci enet */
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#define BCM4432_DEVICE_ID 0x4432 /* bcm44xx family cardbus enet */
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#define BCM3352_DEVICE_ID 0x3352 /* bcm3352 device id */
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#define BCM3360_DEVICE_ID 0x3360 /* bcm3360 device id */
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#define EPI41210_DEVICE_ID 0xa0fa /* bcm4210 */
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#define EPI41230_DEVICE_ID 0xa10e /* bcm4230 */
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#define BCM47XX_ILINE_ID 0x4711 /* 47xx iline20 */
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#define BCM47XX_V90_ID 0x4712 /* 47xx v90 codec */
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#define BCM47XX_ENET_ID 0x4713 /* 47xx enet */
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#define BCM47XX_EXT_ID 0x4714 /* 47xx external i/f */
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#define BCM47XX_USB_ID 0x4715 /* 47xx usb */
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#define BCM47XX_USBH_ID 0x4716 /* 47xx usb host */
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#define BCM47XX_USBD_ID 0x4717 /* 47xx usb device */
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#define BCM47XX_IPSEC_ID 0x4718 /* 47xx ipsec */
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#define BCM4710_DEVICE_ID 0x4710 /* 4710 primary function 0 */
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#define BCM4610_DEVICE_ID 0x4610 /* 4610 primary function 0 */
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#define BCM4610_ILINE_ID 0x4611 /* 4610 iline100 */
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#define BCM4610_V90_ID 0x4612 /* 4610 v90 codec */
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#define BCM4610_ENET_ID 0x4613 /* 4610 enet */
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#define BCM4610_EXT_ID 0x4614 /* 4610 external i/f */
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#define BCM4610_USB_ID 0x4615 /* 4610 usb */
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#define BCM4402_DEVICE_ID 0x4402 /* 4402 primary function 0 */
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#define BCM4402_ENET_ID 0x4402 /* 4402 enet */
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#define BCM4402_V90_ID 0x4403 /* 4402 v90 codec */
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#define BCM4301_DEVICE_ID 0x4301 /* 4301 primary function 0 */
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#define BCM4301_D11B_ID 0x4301 /* 4301 802.11b */
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#define BCM4307_DEVICE_ID 0x4307 /* 4307 primary function 0 */
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#define BCM4307_V90_ID 0x4305 /* 4307 v90 codec */
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#define BCM4307_ENET_ID 0x4306 /* 4307 enet */
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#define BCM4307_D11B_ID 0x4307 /* 4307 802.11b */
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#define BCM4306_DEVICE_ID 0x4306 /* 4306 chipcommon chipid */
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#define BCM4306_D11G_ID 0x4320 /* 4306 802.11g */
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#define BCM4306_D11G_ID2 0x4325
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#define BCM4306_D11A_ID 0x4321 /* 4306 802.11a */
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#define BCM4306_UART_ID 0x4322 /* 4306 uart */
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#define BCM4306_V90_ID 0x4323 /* 4306 v90 codec */
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#define BCM4306_D11DUAL_ID 0x4324 /* 4306 dual A+B */
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#define BCM4309_PKG_ID 1 /* 4309 package id */
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#define BCM4303_D11B_ID 0x4303 /* 4303 802.11b */
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#define BCM4303_PKG_ID 2 /* 4303 package id */
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#define BCM4310_DEVICE_ID 0x4310 /* 4310 chipcommon chipid */
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#define BCM4310_D11B_ID 0x4311 /* 4310 802.11b */
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#define BCM4310_UART_ID 0x4312 /* 4310 uart */
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#define BCM4310_ENET_ID 0x4313 /* 4310 enet */
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#define BCM4310_USB_ID 0x4315 /* 4310 usb */
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#define BCM4704_DEVICE_ID 0x4704 /* 4704 chipcommon chipid */
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#define BCM4704_ENET_ID 0x4706 /* 4704 enet (Use 47XX_ENET_ID instead!) */
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#define BCM4317_DEVICE_ID 0x4317 /* 4317 chip common chipid */
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#define BCM4712_DEVICE_ID 0x4712 /* 4712 chipcommon chipid */
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#define BCM4712_MIPS_ID 0x4720 /* 4712 base devid */
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#define BCM4712SMALL_PKG_ID 1 /* 200pin 4712 package id */
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#define SDIOH_FPGA_ID 0x4380 /* sdio host fpga */
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#define BCM5365_DEVICE_ID 0x5365 /* 5365 chipcommon chipid */
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/* PCMCIA vendor Id's */
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#define VENDOR_BROADCOM_PCMCIA 0x02d0
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/* SDIO vendor Id's */
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#define VENDOR_BROADCOM_SDIO 0x00BF
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/* boardflags */
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#define BFL_BTCOEXIST 0x0001 /* This board implements Bluetooth coexistance */
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#define BFL_PACTRL 0x0002 /* This board has gpio 9 controlling the PA */
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#define BFL_AIRLINEMODE 0x0004 /* This board implements gpio13 radio disable indication */
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#define BFL_ENETSPI 0x0010 /* This board has ephy roboswitch spi */
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#define BFL_CCKHIPWR 0x0040 /* Can do high-power CCK transmission */
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#define BFL_ENETADM 0x0080 /* This board has ADMtek switch */
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#define BFL_ENETVLAN 0x0100 /* This board can do vlan */
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#define BFL_AFTERBURNER 0x0200 /* This board supports Afterburner mode */
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#define BFL_NOPCI 0x0400 /* This board leaves PCI floating */
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#define BFL_FEM 0x0800 /* This board supports the Front End Module */
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/* board specific GPIO assignment, gpio 0-3 are also customer-configurable led */
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#define BOARD_GPIO_HWRAD_B 0x010 /* bit 4 is HWRAD input on 4301 */
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#define BOARD_GPIO_BTC_IN 0x080 /* bit 7 is BT Coexistance Input */
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#define BOARD_GPIO_BTC_OUT 0x100 /* bit 8 is BT Coexistance Out */
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#define BOARD_GPIO_PACTRL 0x200 /* bit 9 controls the PA on new 4306 boards */
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#define PCI_CFG_GPIO_SCS 0x10 /* PCI config space bit 4 for 4306c0 slow clock source */
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#define PCI_CFG_GPIO_HWRAD 0x20 /* PCI config space GPIO 13 for hw radio disable */
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#define PCI_CFG_GPIO_XTAL 0x40 /* PCI config space GPIO 14 for Xtal powerup */
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#define PCI_CFG_GPIO_PLL 0x80 /* PCI config space GPIO 15 for PLL powerdown */
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/* Bus types */
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#define SB_BUS 0 /* Silicon Backplane */
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#define PCI_BUS 1 /* PCI target */
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#define PCMCIA_BUS 2 /* PCMCIA target */
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#define SDIO_BUS 3 /* SDIO target */
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/* power control defines */
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#define PLL_DELAY 150 /* 150us pll on delay */
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#define FREF_DELAY 200 /* 200us fref change delay */
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#define MIN_SLOW_CLK 32 /* 32us Slow clock period */
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/* Reference Board Types */
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#define BU4710_BOARD 0x0400
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#define VSIM4710_BOARD 0x0401
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#define QT4710_BOARD 0x0402
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#define BU4610_BOARD 0x0403
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#define VSIM4610_BOARD 0x0404
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#define BU4307_BOARD 0x0405
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#define BCM94301CB_BOARD 0x0406
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#define BCM94301PC_BOARD 0x0406 /* Pcmcia 5v card */
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#define BCM94301MP_BOARD 0x0407
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#define BCM94307MP_BOARD 0x0408
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#define BCMAP4307_BOARD 0x0409
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#define BU4309_BOARD 0x040a
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#define BCM94309CB_BOARD 0x040b
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#define BCM94309MP_BOARD 0x040c
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#define BCM4309AP_BOARD 0x040d
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#define BCM94302MP_BOARD 0x040e
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#define VSIM4310_BOARD 0x040f
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#define BU4711_BOARD 0x0410
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#define BCM94310U_BOARD 0x0411
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#define BCM94310AP_BOARD 0x0412
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#define BCM94310MP_BOARD 0x0414
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#define BU4306_BOARD 0x0416
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#define BCM94306CB_BOARD 0x0417
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#define BCM94306MP_BOARD 0x0418
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#define BCM94710D_BOARD 0x041a
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#define BCM94710R1_BOARD 0x041b
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#define BCM94710R4_BOARD 0x041c
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#define BCM94710AP_BOARD 0x041d
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#define BU2050_BOARD 0x041f
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#define BCM94309G_BOARD 0x0421
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#define BCM94301PC3_BOARD 0x0422 /* Pcmcia 3.3v card */
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#define BU4704_BOARD 0x0423
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#define BU4702_BOARD 0x0424
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#define BCM94306PC_BOARD 0x0425 /* pcmcia 3.3v 4306 card */
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#define BU4317_BOARD 0x0426
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#define BCM94702MN_BOARD 0x0428
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/* BCM4702 1U CompactPCI Board */
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#define BCM94702CPCI_BOARD 0x0429
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/* BCM4702 with BCM95380 VLAN Router */
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#define BCM95380RR_BOARD 0x042a
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/* cb4306 with SiGe PA */
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#define BCM94306CBSG_BOARD 0x042b
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/* mp4301 with 2050 radio */
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#define BCM94301MPL_BOARD 0x042c
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/* cb4306 with SiGe PA */
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#define PCSG94306_BOARD 0x042d
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/* bu4704 with sdram */
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#define BU4704SD_BOARD 0x042e
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/* Dual 11a/11g Router */
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#define BCM94704AGR_BOARD 0x042f
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/* 11a-only minipci */
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#define BCM94308MP_BOARD 0x0430
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/* BCM94317 boards */
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#define BCM94317CB_BOARD 0x0440
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#define BCM94317MP_BOARD 0x0441
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#define BCM94317PCMCIA_BOARD 0x0442
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#define BCM94317SDIO_BOARD 0x0443
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#define BU4712_BOARD 0x0444
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/* BCM4712 boards */
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#define BCM94712AGR_BOARD 0x0445
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#define BCM94712AP_BOARD 0x0446
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/* BCM4702 boards */
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#define CT4702AP_BOARD 0x0447
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/* BRCM 4306 w/ Front End Modules */
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#define BCM94306MPM 0x0450
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#define BCM94306MPL 0x0453
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#endif /* _BCMDEVS_H */
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