1
0
mirror of git://projects.qi-hardware.com/openwrt-xburst.git synced 2024-11-24 06:20:16 +02:00
openwrt-xburst/target/linux/brcm63xx/patches-3.3/428-MIPS-BCM63XX-add-flash-detection-for-BCM6362.patch
jogo 28b3f06aa6 bcm63xx: fix USB base registers and IRQs for BCM6328
git-svn-id: svn://svn.openwrt.org/openwrt/trunk@33005 3c298f89-4303-0410-b956-a3cf2f4a3e73
2012-08-05 23:18:22 +00:00

51 lines
1.9 KiB
Diff

From d9666553a10ea85ea64e3e8784a42167a1709ed5 Mon Sep 17 00:00:00 2001
From: Jonas Gorski <jonas.gorski@gmail.com>
Date: Mon, 21 Nov 2011 00:48:52 +0100
Subject: [PATCH 55/84] MIPS: BCM63XX: add flash detection for BCM6362
Signed-off-by: Jonas Gorski <jonas.gorski@gmail.com>
---
arch/mips/bcm63xx/dev-flash.c | 13 ++++++++++++-
arch/mips/include/asm/mach-bcm63xx/bcm63xx_regs.h | 1 +
2 files changed, 13 insertions(+), 1 deletions(-)
--- a/arch/mips/bcm63xx/dev-flash.c
+++ b/arch/mips/bcm63xx/dev-flash.c
@@ -100,6 +100,17 @@ static int __init bcm63xx_detect_flash_t
return BCM63XX_FLASH_TYPE_PARALLEL;
else
return BCM63XX_FLASH_TYPE_SERIAL;
+ case BCM6362_CPU_ID:
+ val = bcm_misc_readl(MISC_STRAPBUS_6362_REG);
+ if (val & STRAPBUS_6362_HSSPI_CLK_FAST)
+ bcm63xx_spi_flash_info[0].max_speed_hz = 50000000;
+ else
+ bcm63xx_spi_flash_info[0].max_speed_hz = 20000000;
+
+ if (val & STRAPBUS_6362_BOOT_SEL_SERIAL)
+ return BCM63XX_FLASH_TYPE_SERIAL;
+ else
+ return BCM63XX_FLASH_TYPE_NAND;
case BCM6368_CPU_ID:
val = bcm_gpio_readl(GPIO_STRAPBUS_REG);
if (val & STRAPBUS_6368_SPI_CLK_FAST)
@@ -136,7 +147,7 @@ int __init bcm63xx_flash_register(void)
return platform_device_register(&mtd_dev);
case BCM63XX_FLASH_TYPE_SERIAL:
- if (BCMCPU_IS_6328())
+ if (BCMCPU_IS_6328() || BCMCPU_IS_6362())
bcm63xx_flash_data.max_transfer_len = HSSPI_BUFFER_LEN;
return spi_register_board_info(bcm63xx_spi_flash_info,
--- a/arch/mips/include/asm/mach-bcm63xx/bcm63xx_regs.h
+++ b/arch/mips/include/asm/mach-bcm63xx/bcm63xx_regs.h
@@ -1304,6 +1304,7 @@
#define MISC_STRAPBUS_6362_REG 0x14
#define STRAPBUS_6362_FCVO_SHIFT 1
+#define STRAPBUS_6362_HSSPI_CLK_FAST (1 << 13)
#define STRAPBUS_6362_FCVO_MASK (0x1f << STRAPBUS_6362_FCVO_SHIFT)
#define STRAPBUS_6362_BOOT_SEL_SERIAL (1 << 15)
#define STRAPBUS_6362_BOOT_SEL_NAND (0 << 15)