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git://projects.qi-hardware.com/openwrt-xburst.git
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015aed1317
git-svn-id: svn://svn.openwrt.org/openwrt/trunk@7916 3c298f89-4303-0410-b956-a3cf2f4a3e73
94 lines
2.7 KiB
C
94 lines
2.7 KiB
C
/*
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* $Id$
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*
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* Copyright (C) 2007 OpenWrt.org
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* Copyright (C) 2007 Gabor Juhos <juhosg@freemail.hu>
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*
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* This program is free software; you can redistribute it and/or
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* modify it under the terms of the GNU General Public License
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* as published by the Free Software Foundation; either version 2
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* of the License, or (at your option) any later version.
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*
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* This program is distributed in the hope that it will be useful,
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* but WITHOUT ANY WARRANTY; without even the implied warranty of
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* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
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* GNU General Public License for more details.
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*
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* You should have received a copy of the GNU General Public License
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* along with this program; if not, write to the
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* Free Software Foundation, Inc., 51 Franklin Street, Fifth Floor,
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* Boston, MA 02110-1301, USA.
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*
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*/
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#include <linux/types.h>
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#include <linux/kernel.h>
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#include <linux/init.h>
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#include <asm/bootinfo.h>
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#include <asm/addrspace.h>
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#include <asm/mach-adm5120/adm5120_info.h>
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#include <asm/mach-adm5120/adm5120_defs.h>
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#include <asm/mach-adm5120/adm5120_switch.h>
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unsigned int adm5120_product_code;
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unsigned int adm5120_revision;
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unsigned int adm5120_package;
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unsigned int adm5120_nand_boot;
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unsigned long adm5120_speed;
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#define SWITCH_READ(r) *(u32 *)(KSEG1ADDR(ADM5120_SWITCH_BASE)+(r))
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#define SWITCH_WRITE(r,v) *(u32 *)(KSEG1ADDR(ADM5120_SWITCH_BASE)+(r))=(v)
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/*
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* CPU settings detection
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*/
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#define CODE_GET_PC(c) ((c) & CODE_PC_MASK)
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#define CODE_GET_REV(c) (((c) >> CODE_REV_SHIFT) & CODE_REV_MASK)
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#define CODE_GET_PK(c) (((c) >> CODE_PK_SHIFT) & CODE_PK_MASK)
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#define CODE_GET_CLKS(c) (((c) >> CODE_CLKS_SHIFT) & CODE_CLKS_MASK)
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#define CODE_GET_NAB(c) (((c) & CODE_NAB) != 0)
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void adm5120_ndelay(u32 ns)
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{
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u32 t;
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SWITCH_WRITE(SWITCH_REG_TIMER, TIMER_PERIOD_DEFAULT);
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SWITCH_WRITE(SWITCH_REG_TIMER_INT, (TIMER_INT_TOS | TIMER_INT_TOM));
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t = (ns+640) / 640;
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t &= TIMER_PERIOD_MASK;
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SWITCH_WRITE(SWITCH_REG_TIMER, t | TIMER_TE);
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/* wait until the timer expires */
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do {
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t = SWITCH_READ(SWITCH_REG_TIMER_INT);
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} while ((t & TIMER_INT_TOS) == 0);
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/* leave the timer disabled */
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SWITCH_WRITE(SWITCH_REG_TIMER, TIMER_PERIOD_DEFAULT);
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SWITCH_WRITE(SWITCH_REG_TIMER_INT, (TIMER_INT_TOS | TIMER_INT_TOM));
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}
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void __init adm5120_soc_init(void)
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{
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u32 code;
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u32 clks;
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code = SWITCH_READ(SWITCH_REG_CODE);
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adm5120_product_code = CODE_GET_PC(code);
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adm5120_revision = CODE_GET_REV(code);
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adm5120_package = (CODE_GET_PK(code) == CODE_PK_BGA) ?
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ADM5120_PACKAGE_BGA : ADM5120_PACKAGE_PQFP;
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adm5120_nand_boot = CODE_GET_NAB(code);
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clks = CODE_GET_CLKS(code);
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adm5120_speed = ADM5120_SPEED_175;
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if (clks & 1)
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adm5120_speed += 25000000;
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if (clks & 2)
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adm5120_speed += 50000000;
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}
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