mirror of
git://projects.qi-hardware.com/openwrt-xburst.git
synced 2024-12-23 15:19:54 +02:00
1d70fe9050
This is based on the patch by Peter Wagner. git-svn-id: svn://svn.openwrt.org/openwrt/trunk@34252 3c298f89-4303-0410-b956-a3cf2f4a3e73
494 lines
13 KiB
Diff
494 lines
13 KiB
Diff
--- a/arch/mips/Kconfig
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+++ b/arch/mips/Kconfig
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@@ -101,6 +101,7 @@ config ATH79
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config BCM47XX
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bool "Broadcom BCM47XX based boards"
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+ select ARCH_REQUIRE_GPIOLIB
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select BOOT_RAW
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select CEVT_R4K
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select CSRC_R4K
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@@ -110,7 +111,6 @@ config BCM47XX
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select NO_EXCEPT_FILL
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select SYS_SUPPORTS_32BIT_KERNEL
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select SYS_SUPPORTS_LITTLE_ENDIAN
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- select GENERIC_GPIO
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select CFE
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help
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Support for BCM47XX based boards
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--- a/arch/mips/bcm47xx/gpio.c
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+++ b/arch/mips/bcm47xx/gpio.c
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@@ -4,83 +4,154 @@
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* for more details.
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*
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* Copyright (C) 2007 Aurelien Jarno <aurelien@aurel32.net>
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+ * Copyright (C) 2012 Hauke Mehrtens <hauke@hauke-m.de>
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+ *
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+ * Parts of this file are based on Atheros AR71XX/AR724X/AR913X GPIO
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*/
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#include <linux/export.h>
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+#include <linux/gpio.h>
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#include <linux/ssb/ssb.h>
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-#include <linux/ssb/ssb_driver_chipcommon.h>
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-#include <linux/ssb/ssb_driver_extif.h>
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-#include <asm/mach-bcm47xx/bcm47xx.h>
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-#include <asm/mach-bcm47xx/gpio.h>
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+#include <linux/ssb/ssb_embedded.h>
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+#include <linux/bcma/bcma.h>
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+
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+#include <bcm47xx.h>
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-#if (BCM47XX_CHIPCO_GPIO_LINES > BCM47XX_EXTIF_GPIO_LINES)
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-static DECLARE_BITMAP(gpio_in_use, BCM47XX_CHIPCO_GPIO_LINES);
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-#else
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-static DECLARE_BITMAP(gpio_in_use, BCM47XX_EXTIF_GPIO_LINES);
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-#endif
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-int gpio_request(unsigned gpio, const char *tag)
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+static unsigned long bcm47xx_gpio_count;
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+
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+/* low level BCM47xx gpio api */
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+u32 bcm47xx_gpio_in(u32 mask)
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{
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switch (bcm47xx_bus_type) {
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#ifdef CONFIG_BCM47XX_SSB
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case BCM47XX_BUS_TYPE_SSB:
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- if (ssb_chipco_available(&bcm47xx_bus.ssb.chipco) &&
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- ((unsigned)gpio >= BCM47XX_CHIPCO_GPIO_LINES))
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- return -EINVAL;
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-
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- if (ssb_extif_available(&bcm47xx_bus.ssb.extif) &&
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- ((unsigned)gpio >= BCM47XX_EXTIF_GPIO_LINES))
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- return -EINVAL;
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-
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- if (test_and_set_bit(gpio, gpio_in_use))
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- return -EBUSY;
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-
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- return 0;
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+ return ssb_gpio_in(&bcm47xx_bus.ssb, mask);
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#endif
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#ifdef CONFIG_BCM47XX_BCMA
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case BCM47XX_BUS_TYPE_BCMA:
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- if (gpio >= BCM47XX_CHIPCO_GPIO_LINES)
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- return -EINVAL;
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-
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- if (test_and_set_bit(gpio, gpio_in_use))
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- return -EBUSY;
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+ return bcma_chipco_gpio_in(&bcm47xx_bus.bcma.bus.drv_cc, mask);
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+#endif
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+ }
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+ return -EINVAL;
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+}
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+EXPORT_SYMBOL(bcm47xx_gpio_in);
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- return 0;
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+u32 bcm47xx_gpio_out(u32 mask, u32 value)
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+{
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+ switch (bcm47xx_bus_type) {
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+#ifdef CONFIG_BCM47XX_SSB
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+ case BCM47XX_BUS_TYPE_SSB:
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+ return ssb_gpio_out(&bcm47xx_bus.ssb, mask, value);
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+#endif
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+#ifdef CONFIG_BCM47XX_BCMA
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+ case BCM47XX_BUS_TYPE_BCMA:
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+ return bcma_chipco_gpio_out(&bcm47xx_bus.bcma.bus.drv_cc, mask,
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+ value);
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#endif
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}
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return -EINVAL;
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}
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-EXPORT_SYMBOL(gpio_request);
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+EXPORT_SYMBOL(bcm47xx_gpio_out);
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-void gpio_free(unsigned gpio)
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+u32 bcm47xx_gpio_outen(u32 mask, u32 value)
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{
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switch (bcm47xx_bus_type) {
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#ifdef CONFIG_BCM47XX_SSB
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case BCM47XX_BUS_TYPE_SSB:
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- if (ssb_chipco_available(&bcm47xx_bus.ssb.chipco) &&
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- ((unsigned)gpio >= BCM47XX_CHIPCO_GPIO_LINES))
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- return;
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+ return ssb_gpio_outen(&bcm47xx_bus.ssb, mask, value);
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+#endif
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+#ifdef CONFIG_BCM47XX_BCMA
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+ case BCM47XX_BUS_TYPE_BCMA:
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+ return bcma_chipco_gpio_outen(&bcm47xx_bus.bcma.bus.drv_cc,
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+ mask, value);
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+#endif
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+ }
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+ return -EINVAL;
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+}
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+EXPORT_SYMBOL(bcm47xx_gpio_outen);
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- if (ssb_extif_available(&bcm47xx_bus.ssb.extif) &&
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- ((unsigned)gpio >= BCM47XX_EXTIF_GPIO_LINES))
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- return;
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+u32 bcm47xx_gpio_control(u32 mask, u32 value)
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+{
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+ switch (bcm47xx_bus_type) {
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+#ifdef CONFIG_BCM47XX_SSB
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+ case BCM47XX_BUS_TYPE_SSB:
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+ return ssb_gpio_control(&bcm47xx_bus.ssb, mask, value);
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+#endif
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+#ifdef CONFIG_BCM47XX_BCMA
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+ case BCM47XX_BUS_TYPE_BCMA:
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+ return bcma_chipco_gpio_control(&bcm47xx_bus.bcma.bus.drv_cc,
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+ mask, value);
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+#endif
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+ }
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+ return -EINVAL;
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+}
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+EXPORT_SYMBOL(bcm47xx_gpio_control);
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- clear_bit(gpio, gpio_in_use);
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- return;
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+u32 bcm47xx_gpio_intmask(u32 mask, u32 value)
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+{
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+ switch (bcm47xx_bus_type) {
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+#ifdef CONFIG_BCM47XX_SSB
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+ case BCM47XX_BUS_TYPE_SSB:
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+ return ssb_gpio_intmask(&bcm47xx_bus.ssb, mask, value);
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#endif
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#ifdef CONFIG_BCM47XX_BCMA
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case BCM47XX_BUS_TYPE_BCMA:
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- if (gpio >= BCM47XX_CHIPCO_GPIO_LINES)
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- return;
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+ return bcma_chipco_gpio_intmask(&bcm47xx_bus.bcma.bus.drv_cc,
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+ mask, value);
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+#endif
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+ }
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+ return -EINVAL;
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+}
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+EXPORT_SYMBOL(bcm47xx_gpio_intmask);
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- clear_bit(gpio, gpio_in_use);
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- return;
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+u32 bcm47xx_gpio_polarity(u32 mask, u32 value)
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+{
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+ switch (bcm47xx_bus_type) {
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+#ifdef CONFIG_BCM47XX_SSB
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+ case BCM47XX_BUS_TYPE_SSB:
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+ return ssb_gpio_polarity(&bcm47xx_bus.ssb, mask, value);
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+#endif
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+#ifdef CONFIG_BCM47XX_BCMA
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+ case BCM47XX_BUS_TYPE_BCMA:
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+ return bcma_chipco_gpio_polarity(&bcm47xx_bus.bcma.bus.drv_cc,
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+ mask, value);
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#endif
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}
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+ return -EINVAL;
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+}
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+EXPORT_SYMBOL(bcm47xx_gpio_polarity);
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+
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+
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+static int bcm47xx_gpio_get_value(struct gpio_chip *chip, unsigned gpio)
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+{
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+ return bcm47xx_gpio_in(1 << gpio);
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+}
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+
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+static void bcm47xx_gpio_set_value(struct gpio_chip *chip,
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+ unsigned gpio, int value)
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+{
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+ bcm47xx_gpio_out(1 << gpio, value ? 1 << gpio : 0);
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+}
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+
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+static int bcm47xx_gpio_direction_input(struct gpio_chip *chip,
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+ unsigned gpio)
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+{
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+ bcm47xx_gpio_outen(1 << gpio, 0);
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+ return 0;
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+}
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+
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+static int bcm47xx_gpio_direction_output(struct gpio_chip *chip,
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+ unsigned gpio, int value)
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+{
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+ /* first set the gpio out value */
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+ bcm47xx_gpio_out(1 << gpio, value ? 1 << gpio : 0);
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+ /* then set the gpio mode */
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+ bcm47xx_gpio_outen(1 << gpio, 1 << gpio);
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+ return 0;
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}
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-EXPORT_SYMBOL(gpio_free);
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-int gpio_to_irq(unsigned gpio)
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+static int bcm47xx_gpio_to_irq(struct gpio_chip *chip, unsigned gpio)
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{
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switch (bcm47xx_bus_type) {
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#ifdef CONFIG_BCM47XX_SSB
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@@ -99,4 +170,55 @@ int gpio_to_irq(unsigned gpio)
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}
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return -EINVAL;
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}
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-EXPORT_SYMBOL_GPL(gpio_to_irq);
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+
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+static struct gpio_chip bcm47xx_gpio_chip = {
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+ .label = "bcm47xx",
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+ .get = bcm47xx_gpio_get_value,
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+ .set = bcm47xx_gpio_set_value,
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+ .direction_input = bcm47xx_gpio_direction_input,
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+ .direction_output = bcm47xx_gpio_direction_output,
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+ .to_irq = bcm47xx_gpio_to_irq,
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+ .base = 0,
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+};
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+
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+void __init bcm47xx_gpio_init(void)
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+{
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+ int err;
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+
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+ switch (bcm47xx_bus_type) {
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+#ifdef CONFIG_BCM47XX_SSB
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+ case BCM47XX_BUS_TYPE_SSB:
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+ bcm47xx_gpio_count = ssb_gpio_count(&bcm47xx_bus.ssb);
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+ break;
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+#endif
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+#ifdef CONFIG_BCM47XX_BCMA
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+ case BCM47XX_BUS_TYPE_BCMA:
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+ bcm47xx_gpio_count = bcma_chipco_gpio_count();
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+ break;
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+#endif
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+ }
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+
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+ bcm47xx_gpio_chip.ngpio = bcm47xx_gpio_count;
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+
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+ err = gpiochip_add(&bcm47xx_gpio_chip);
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+ if (err)
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+ panic("cannot add BCM47xx GPIO chip, error=%d", err);
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+}
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+
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+int gpio_get_value(unsigned gpio)
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+{
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+ if (gpio < bcm47xx_gpio_count)
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+ return bcm47xx_gpio_in(1 << gpio);
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+
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+ return __gpio_get_value(gpio);
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+}
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+EXPORT_SYMBOL(gpio_get_value);
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+
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+void gpio_set_value(unsigned gpio, int value)
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+{
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+ if (gpio < bcm47xx_gpio_count)
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+ bcm47xx_gpio_out(1 << gpio, value ? 1 << gpio : 0);
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+ else
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+ __gpio_set_value(gpio, value);
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+}
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+EXPORT_SYMBOL(gpio_set_value);
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--- a/arch/mips/bcm47xx/setup.c
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+++ b/arch/mips/bcm47xx/setup.c
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@@ -252,6 +252,8 @@ void __init plat_mem_setup(void)
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_machine_restart = bcm47xx_machine_restart;
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_machine_halt = bcm47xx_machine_halt;
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pm_power_off = bcm47xx_machine_halt;
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+
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+ bcm47xx_gpio_init();
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}
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static int __init bcm47xx_register_bus_complete(void)
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--- a/arch/mips/bcm47xx/wgt634u.c
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+++ b/arch/mips/bcm47xx/wgt634u.c
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@@ -133,6 +133,7 @@ static int __init wgt634u_init(void)
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* been allocated ranges 00:09:5b:xx:xx:xx and 00:0f:b5:xx:xx:xx.
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*/
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u8 *et0mac;
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+ int err;
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if (bcm47xx_bus_type != BCM47XX_BUS_TYPE_SSB)
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return -ENODEV;
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@@ -146,6 +147,12 @@ static int __init wgt634u_init(void)
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printk(KERN_INFO "WGT634U machine detected.\n");
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+ err = gpio_request(WGT634U_GPIO_RESET, "reset-buton");
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+ if (err) {
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+ printk(KERN_INFO "Can not register gpio for reset button\n");
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+ return 0;
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+ }
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+
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if (!request_irq(gpio_to_irq(WGT634U_GPIO_RESET),
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gpio_interrupt, IRQF_SHARED,
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"WGT634U GPIO", &bcm47xx_bus.ssb.chipco)) {
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--- a/arch/mips/include/asm/mach-bcm47xx/bcm47xx.h
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+++ b/arch/mips/include/asm/mach-bcm47xx/bcm47xx.h
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@@ -56,4 +56,6 @@ void bcm47xx_fill_bcma_boardinfo(struct
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const char *prefix);
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#endif
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+void bcm47xx_gpio_init(void);
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+
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#endif /* __ASM_BCM47XX_H */
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--- a/arch/mips/include/asm/mach-bcm47xx/gpio.h
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+++ b/arch/mips/include/asm/mach-bcm47xx/gpio.h
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@@ -4,152 +4,42 @@
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* for more details.
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*
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* Copyright (C) 2007 Aurelien Jarno <aurelien@aurel32.net>
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+ * Copyright (C) 2012 Hauke Mehrtens <hauke@hauke-m.de>
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*/
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#ifndef __BCM47XX_GPIO_H
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#define __BCM47XX_GPIO_H
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-#include <linux/ssb/ssb_embedded.h>
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-#include <linux/bcma/bcma.h>
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-#include <asm/mach-bcm47xx/bcm47xx.h>
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-
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-#define BCM47XX_EXTIF_GPIO_LINES 5
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-#define BCM47XX_CHIPCO_GPIO_LINES 16
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-
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-extern int gpio_request(unsigned gpio, const char *label);
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-extern void gpio_free(unsigned gpio);
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-extern int gpio_to_irq(unsigned gpio);
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-
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-static inline int gpio_get_value(unsigned gpio)
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-{
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- switch (bcm47xx_bus_type) {
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-#ifdef CONFIG_BCM47XX_SSB
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- case BCM47XX_BUS_TYPE_SSB:
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- return ssb_gpio_in(&bcm47xx_bus.ssb, 1 << gpio);
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-#endif
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-#ifdef CONFIG_BCM47XX_BCMA
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- case BCM47XX_BUS_TYPE_BCMA:
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- return bcma_chipco_gpio_in(&bcm47xx_bus.bcma.bus.drv_cc,
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- 1 << gpio);
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-#endif
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- }
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- return -EINVAL;
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-}
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-
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-#define gpio_get_value_cansleep gpio_get_value
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-
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-static inline void gpio_set_value(unsigned gpio, int value)
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-{
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- switch (bcm47xx_bus_type) {
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-#ifdef CONFIG_BCM47XX_SSB
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- case BCM47XX_BUS_TYPE_SSB:
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- ssb_gpio_out(&bcm47xx_bus.ssb, 1 << gpio,
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- value ? 1 << gpio : 0);
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- return;
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-#endif
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-#ifdef CONFIG_BCM47XX_BCMA
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- case BCM47XX_BUS_TYPE_BCMA:
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- bcma_chipco_gpio_out(&bcm47xx_bus.bcma.bus.drv_cc, 1 << gpio,
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- value ? 1 << gpio : 0);
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- return;
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-#endif
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- }
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-}
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-
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-#define gpio_set_value_cansleep gpio_set_value
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-
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-static inline int gpio_cansleep(unsigned gpio)
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-{
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- return 0;
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-}
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-
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-static inline int gpio_is_valid(unsigned gpio)
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-{
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- return gpio < (BCM47XX_EXTIF_GPIO_LINES + BCM47XX_CHIPCO_GPIO_LINES);
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-}
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+#define ARCH_NR_GPIOS 64
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+#include <asm-generic/gpio.h>
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+/* low level BCM47xx gpio api */
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+u32 bcm47xx_gpio_in(u32 mask);
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+u32 bcm47xx_gpio_out(u32 mask, u32 value);
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+u32 bcm47xx_gpio_outen(u32 mask, u32 value);
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+u32 bcm47xx_gpio_control(u32 mask, u32 value);
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+u32 bcm47xx_gpio_intmask(u32 mask, u32 value);
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+u32 bcm47xx_gpio_polarity(u32 mask, u32 value);
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-static inline int gpio_direction_input(unsigned gpio)
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-{
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- switch (bcm47xx_bus_type) {
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-#ifdef CONFIG_BCM47XX_SSB
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- case BCM47XX_BUS_TYPE_SSB:
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- ssb_gpio_outen(&bcm47xx_bus.ssb, 1 << gpio, 0);
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- return 0;
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-#endif
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-#ifdef CONFIG_BCM47XX_BCMA
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- case BCM47XX_BUS_TYPE_BCMA:
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- bcma_chipco_gpio_outen(&bcm47xx_bus.bcma.bus.drv_cc, 1 << gpio,
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- 0);
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- return 0;
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-#endif
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- }
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- return -EINVAL;
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-}
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+int gpio_get_value(unsigned gpio);
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+void gpio_set_value(unsigned gpio, int value);
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-static inline int gpio_direction_output(unsigned gpio, int value)
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+static inline void gpio_intmask(unsigned gpio, int value)
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{
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- switch (bcm47xx_bus_type) {
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-#ifdef CONFIG_BCM47XX_SSB
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- case BCM47XX_BUS_TYPE_SSB:
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- /* first set the gpio out value */
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- ssb_gpio_out(&bcm47xx_bus.ssb, 1 << gpio,
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- value ? 1 << gpio : 0);
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- /* then set the gpio mode */
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- ssb_gpio_outen(&bcm47xx_bus.ssb, 1 << gpio, 1 << gpio);
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- return 0;
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-#endif
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-#ifdef CONFIG_BCM47XX_BCMA
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- case BCM47XX_BUS_TYPE_BCMA:
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- /* first set the gpio out value */
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- bcma_chipco_gpio_out(&bcm47xx_bus.bcma.bus.drv_cc, 1 << gpio,
|
|
- value ? 1 << gpio : 0);
|
|
- /* then set the gpio mode */
|
|
- bcma_chipco_gpio_outen(&bcm47xx_bus.bcma.bus.drv_cc, 1 << gpio,
|
|
- 1 << gpio);
|
|
- return 0;
|
|
-#endif
|
|
- }
|
|
- return -EINVAL;
|
|
+ bcm47xx_gpio_intmask(1 << gpio, value ? 1 << gpio : 0);
|
|
}
|
|
|
|
-static inline int gpio_intmask(unsigned gpio, int value)
|
|
+static inline void gpio_polarity(unsigned gpio, int value)
|
|
{
|
|
- switch (bcm47xx_bus_type) {
|
|
-#ifdef CONFIG_BCM47XX_SSB
|
|
- case BCM47XX_BUS_TYPE_SSB:
|
|
- ssb_gpio_intmask(&bcm47xx_bus.ssb, 1 << gpio,
|
|
- value ? 1 << gpio : 0);
|
|
- return 0;
|
|
-#endif
|
|
-#ifdef CONFIG_BCM47XX_BCMA
|
|
- case BCM47XX_BUS_TYPE_BCMA:
|
|
- bcma_chipco_gpio_intmask(&bcm47xx_bus.bcma.bus.drv_cc,
|
|
- 1 << gpio, value ? 1 << gpio : 0);
|
|
- return 0;
|
|
-#endif
|
|
- }
|
|
- return -EINVAL;
|
|
+ bcm47xx_gpio_polarity(1 << gpio, value ? 1 << gpio : 0);
|
|
}
|
|
|
|
-static inline int gpio_polarity(unsigned gpio, int value)
|
|
+static inline int irq_to_gpio(int gpio)
|
|
{
|
|
- switch (bcm47xx_bus_type) {
|
|
-#ifdef CONFIG_BCM47XX_SSB
|
|
- case BCM47XX_BUS_TYPE_SSB:
|
|
- ssb_gpio_polarity(&bcm47xx_bus.ssb, 1 << gpio,
|
|
- value ? 1 << gpio : 0);
|
|
- return 0;
|
|
-#endif
|
|
-#ifdef CONFIG_BCM47XX_BCMA
|
|
- case BCM47XX_BUS_TYPE_BCMA:
|
|
- bcma_chipco_gpio_polarity(&bcm47xx_bus.bcma.bus.drv_cc,
|
|
- 1 << gpio, value ? 1 << gpio : 0);
|
|
- return 0;
|
|
-#endif
|
|
- }
|
|
return -EINVAL;
|
|
}
|
|
|
|
+#define gpio_cansleep __gpio_cansleep
|
|
+#define gpio_to_irq __gpio_to_irq
|
|
|
|
#endif /* __BCM47XX_GPIO_H */
|