mirror of
git://projects.qi-hardware.com/openwrt-xburst.git
synced 2024-12-23 14:18:38 +02:00
92520e6010
[juhosg: refresh patches with quilt, skip the patch for 3.3] Signed-off-by: David Woodhouse <David.Woodhouse@intel.com> Signed-off-by: Gabor Juhos <juhosg@openwrt.org> git-svn-id: svn://svn.openwrt.org/openwrt/trunk@34806 3c298f89-4303-0410-b956-a3cf2f4a3e73
418 lines
13 KiB
Diff
418 lines
13 KiB
Diff
commit 152a2a8b5e1d4cbe91a7c66f1028db15164a3766
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Author: David Woodhouse <David.Woodhouse@intel.com>
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Date: Wed Dec 19 11:01:21 2012 +0000
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solos-pci: ensure all TX packets are aligned to 4 bytes
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The FPGA can't handled unaligned DMA (yet). So copy into an aligned buffer,
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if skb->data isn't suitably aligned.
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Signed-off-by: David Woodhouse <David.Woodhouse@intel.com>
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Signed-off-by: David S. Miller <davem@davemloft.net>
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commit 13af816469db3449c072afbae6c4c1bd9ccecccb
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Author: Nathan Williams <nathan@traverse.com.au>
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Date: Wed Dec 19 11:01:20 2012 +0000
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solos-pci: add firmware upgrade support for new models
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Signed-off-by: Nathan Williams <nathan@traverse.com.au>
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Signed-off-by: David Woodhouse <David.Woodhouse@intel.com>
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Signed-off-by: David S. Miller <davem@davemloft.net>
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commit 7fbdadb5e951e4f0c0fc991ff5f50295568786e6
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Author: Nathan Williams <nathan@traverse.com.au>
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Date: Wed Dec 19 11:01:19 2012 +0000
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solos-pci: remove superfluous debug output
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Signed-off-by: Nathan Williams <nathan@traverse.com.au>
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Signed-off-by: David Woodhouse <David.Woodhouse@intel.com>
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Signed-off-by: David S. Miller <davem@davemloft.net>
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commit f9baad02e7411d9f38d5ebe1a1cdcde4ceec100d
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Author: Nathan Williams <nathan@traverse.com.au>
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Date: Wed Dec 19 11:01:18 2012 +0000
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solos-pci: add GPIO support for newer versions on Geos board
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dwmw2: Tidy up a little, simpler matching on which GPIO is being accessed,
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only register on newer boards, register under PCI device instead of
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duplicating them under each ATM device.
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Signed-off-by: Nathan Williams <nathan@traverse.com.au>
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Signed-off-by: David Woodhouse <David.Woodhouse@intel.com>
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Signed-off-by: David S. Miller <davem@davemloft.net>
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commit cae49ede00ec3d0cda290b03fee55b72b49efc11
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Author: David Woodhouse <dwmw2@infradead.org>
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Date: Tue Dec 11 14:57:14 2012 +0000
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solos-pci: fix double-free of TX skb in DMA mode
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We weren't clearing card->tx_skb[port] when processing the TX done interrupt.
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If there wasn't another skb ready to transmit immediately, this led to a
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double-free because we'd free it *again* next time we did have a packet to
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send.
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Signed-off-by: David Woodhouse <David.Woodhouse@intel.com>
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Cc: stable@kernel.org
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Signed-off-by: David S. Miller <davem@davemloft.net>
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==
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There is a typo here so we do a double lock instead of an unlock.
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Signed-off-by: Dan Carpenter <dan.carpenter@oracle.com>
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---
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Only needed in linux-next. Introduced in f9baad02e7411d9 [14/17]
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solos-pci: add GPIO support for newer versions on Geos board
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--- a/drivers/atm/solos-pci.c
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+++ b/drivers/atm/solos-pci.c
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@@ -42,7 +42,8 @@
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#include <linux/swab.h>
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#include <linux/slab.h>
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-#define VERSION "0.07"
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+#define VERSION "1.04"
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+#define DRIVER_VERSION 0x01
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#define PTAG "solos-pci"
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#define CONFIG_RAM_SIZE 128
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@@ -56,16 +57,21 @@
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#define FLASH_BUSY 0x60
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#define FPGA_MODE 0x5C
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#define FLASH_MODE 0x58
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+#define GPIO_STATUS 0x54
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+#define DRIVER_VER 0x50
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#define TX_DMA_ADDR(port) (0x40 + (4 * (port)))
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#define RX_DMA_ADDR(port) (0x30 + (4 * (port)))
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#define DATA_RAM_SIZE 32768
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#define BUF_SIZE 2048
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#define OLD_BUF_SIZE 4096 /* For FPGA versions <= 2*/
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-#define FPGA_PAGE 528 /* FPGA flash page size*/
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-#define SOLOS_PAGE 512 /* Solos flash page size*/
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-#define FPGA_BLOCK (FPGA_PAGE * 8) /* FPGA flash block size*/
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-#define SOLOS_BLOCK (SOLOS_PAGE * 8) /* Solos flash block size*/
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+/* Old boards use ATMEL AD45DB161D flash */
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+#define ATMEL_FPGA_PAGE 528 /* FPGA flash page size*/
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+#define ATMEL_SOLOS_PAGE 512 /* Solos flash page size*/
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+#define ATMEL_FPGA_BLOCK (ATMEL_FPGA_PAGE * 8) /* FPGA block size*/
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+#define ATMEL_SOLOS_BLOCK (ATMEL_SOLOS_PAGE * 8) /* Solos block size*/
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+/* Current boards use M25P/M25PE SPI flash */
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+#define SPI_FLASH_BLOCK (256 * 64)
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#define RX_BUF(card, nr) ((card->buffers) + (nr)*(card->buffer_size)*2)
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#define TX_BUF(card, nr) ((card->buffers) + (nr)*(card->buffer_size)*2 + (card->buffer_size))
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@@ -123,11 +129,14 @@ struct solos_card {
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struct sk_buff_head cli_queue[4];
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struct sk_buff *tx_skb[4];
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struct sk_buff *rx_skb[4];
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+ unsigned char *dma_bounce;
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wait_queue_head_t param_wq;
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wait_queue_head_t fw_wq;
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int using_dma;
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+ int dma_alignment;
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int fpga_version;
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int buffer_size;
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+ int atmel_flash;
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};
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@@ -452,7 +461,6 @@ static ssize_t console_show(struct devic
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len = skb->len;
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memcpy(buf, skb->data, len);
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- dev_dbg(&card->dev->dev, "len: %d\n", len);
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kfree_skb(skb);
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return len;
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@@ -499,6 +507,78 @@ static ssize_t console_store(struct devi
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return err?:count;
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}
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+struct geos_gpio_attr {
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+ struct device_attribute attr;
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+ int offset;
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+};
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+
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+#define SOLOS_GPIO_ATTR(_name, _mode, _show, _store, _offset) \
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+ struct geos_gpio_attr gpio_attr_##_name = { \
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+ .attr = __ATTR(_name, _mode, _show, _store), \
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+ .offset = _offset }
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+
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+static ssize_t geos_gpio_store(struct device *dev, struct device_attribute *attr,
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+ const char *buf, size_t count)
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+{
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+ struct pci_dev *pdev = container_of(dev, struct pci_dev, dev);
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+ struct geos_gpio_attr *gattr = container_of(attr, struct geos_gpio_attr, attr);
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+ struct solos_card *card = pci_get_drvdata(pdev);
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+ uint32_t data32;
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+
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+ if (count != 1 && (count != 2 || buf[1] != '\n'))
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+ return -EINVAL;
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+
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+ spin_lock_irq(&card->param_queue_lock);
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+ data32 = ioread32(card->config_regs + GPIO_STATUS);
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+ if (buf[0] == '1') {
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+ data32 |= 1 << gattr->offset;
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+ iowrite32(data32, card->config_regs + GPIO_STATUS);
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+ } else if (buf[0] == '0') {
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+ data32 &= ~(1 << gattr->offset);
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+ iowrite32(data32, card->config_regs + GPIO_STATUS);
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+ } else {
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+ count = -EINVAL;
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+ }
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+ spin_unlock_irq(&card->param_queue_lock);
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+ return count;
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+}
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+
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+static ssize_t geos_gpio_show(struct device *dev, struct device_attribute *attr,
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+ char *buf)
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+{
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+ struct pci_dev *pdev = container_of(dev, struct pci_dev, dev);
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+ struct geos_gpio_attr *gattr = container_of(attr, struct geos_gpio_attr, attr);
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+ struct solos_card *card = pci_get_drvdata(pdev);
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+ uint32_t data32;
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+
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+ data32 = ioread32(card->config_regs + GPIO_STATUS);
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+ data32 = (data32 >> gattr->offset) & 1;
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+
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+ return sprintf(buf, "%d\n", data32);
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+}
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+
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+static ssize_t hardware_show(struct device *dev, struct device_attribute *attr,
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+ char *buf)
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+{
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+ struct pci_dev *pdev = container_of(dev, struct pci_dev, dev);
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+ struct geos_gpio_attr *gattr = container_of(attr, struct geos_gpio_attr, attr);
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+ struct solos_card *card = pci_get_drvdata(pdev);
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+ uint32_t data32;
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+
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+ data32 = ioread32(card->config_regs + GPIO_STATUS);
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+ switch (gattr->offset) {
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+ case 0:
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+ /* HardwareVersion */
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+ data32 = data32 & 0x1F;
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+ break;
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+ case 1:
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+ /* HardwareVariant */
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+ data32 = (data32 >> 5) & 0x0F;
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+ break;
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+ }
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+ return sprintf(buf, "%d\n", data32);
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+}
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+
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static DEVICE_ATTR(console, 0644, console_show, console_store);
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@@ -507,6 +587,14 @@ static DEVICE_ATTR(console, 0644, consol
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#include "solos-attrlist.c"
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+static SOLOS_GPIO_ATTR(GPIO1, 0644, geos_gpio_show, geos_gpio_store, 9);
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+static SOLOS_GPIO_ATTR(GPIO2, 0644, geos_gpio_show, geos_gpio_store, 10);
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+static SOLOS_GPIO_ATTR(GPIO3, 0644, geos_gpio_show, geos_gpio_store, 11);
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+static SOLOS_GPIO_ATTR(GPIO4, 0644, geos_gpio_show, geos_gpio_store, 12);
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+static SOLOS_GPIO_ATTR(GPIO5, 0644, geos_gpio_show, geos_gpio_store, 13);
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+static SOLOS_GPIO_ATTR(PushButton, 0444, geos_gpio_show, NULL, 14);
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+static SOLOS_GPIO_ATTR(HardwareVersion, 0444, hardware_show, NULL, 0);
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+static SOLOS_GPIO_ATTR(HardwareVariant, 0444, hardware_show, NULL, 1);
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#undef SOLOS_ATTR_RO
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#undef SOLOS_ATTR_RW
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@@ -523,6 +611,23 @@ static struct attribute_group solos_attr
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.name = "parameters",
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};
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+static struct attribute *gpio_attrs[] = {
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+ &gpio_attr_GPIO1.attr.attr,
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+ &gpio_attr_GPIO2.attr.attr,
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+ &gpio_attr_GPIO3.attr.attr,
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+ &gpio_attr_GPIO4.attr.attr,
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+ &gpio_attr_GPIO5.attr.attr,
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+ &gpio_attr_PushButton.attr.attr,
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+ &gpio_attr_HardwareVersion.attr.attr,
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+ &gpio_attr_HardwareVariant.attr.attr,
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+ NULL
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+};
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+
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+static struct attribute_group gpio_attr_group = {
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+ .attrs = gpio_attrs,
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+ .name = "gpio",
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+};
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+
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static int flash_upgrade(struct solos_card *card, int chip)
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{
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const struct firmware *fw;
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@@ -534,16 +639,25 @@ static int flash_upgrade(struct solos_ca
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switch (chip) {
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case 0:
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fw_name = "solos-FPGA.bin";
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- blocksize = FPGA_BLOCK;
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+ if (card->atmel_flash)
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+ blocksize = ATMEL_FPGA_BLOCK;
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+ else
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+ blocksize = SPI_FLASH_BLOCK;
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break;
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case 1:
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fw_name = "solos-Firmware.bin";
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- blocksize = SOLOS_BLOCK;
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+ if (card->atmel_flash)
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+ blocksize = ATMEL_SOLOS_BLOCK;
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+ else
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+ blocksize = SPI_FLASH_BLOCK;
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break;
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case 2:
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if (card->fpga_version > LEGACY_BUFFERS){
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fw_name = "solos-db-FPGA.bin";
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- blocksize = FPGA_BLOCK;
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+ if (card->atmel_flash)
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+ blocksize = ATMEL_FPGA_BLOCK;
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+ else
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+ blocksize = SPI_FLASH_BLOCK;
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} else {
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dev_info(&card->dev->dev, "FPGA version doesn't support"
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" daughter board upgrades\n");
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@@ -553,7 +667,10 @@ static int flash_upgrade(struct solos_ca
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case 3:
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if (card->fpga_version > LEGACY_BUFFERS){
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fw_name = "solos-Firmware.bin";
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- blocksize = SOLOS_BLOCK;
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+ if (card->atmel_flash)
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+ blocksize = ATMEL_SOLOS_BLOCK;
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+ else
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+ blocksize = SPI_FLASH_BLOCK;
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} else {
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dev_info(&card->dev->dev, "FPGA version doesn't support"
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" daughter board upgrades\n");
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@@ -569,6 +686,9 @@ static int flash_upgrade(struct solos_ca
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dev_info(&card->dev->dev, "Flash upgrade starting\n");
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+ /* New FPGAs require driver version before permitting flash upgrades */
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+ iowrite32(DRIVER_VERSION, card->config_regs + DRIVER_VER);
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+
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numblocks = fw->size / blocksize;
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dev_info(&card->dev->dev, "Firmware size: %zd\n", fw->size);
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dev_info(&card->dev->dev, "Number of blocks: %d\n", numblocks);
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@@ -598,9 +718,13 @@ static int flash_upgrade(struct solos_ca
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/* dev_info(&card->dev->dev, "Set FPGA Flash mode to Block Write\n"); */
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iowrite32(((chip * 2) + 1), card->config_regs + FLASH_MODE);
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- /* Copy block to buffer, swapping each 16 bits */
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+ /* Copy block to buffer, swapping each 16 bits for Atmel flash */
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for(i = 0; i < blocksize; i += 4) {
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- uint32_t word = swahb32p((uint32_t *)(fw->data + offset + i));
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+ uint32_t word;
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+ if (card->atmel_flash)
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+ word = swahb32p((uint32_t *)(fw->data + offset + i));
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+ else
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+ word = *(uint32_t *)(fw->data + offset + i);
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if(card->fpga_version > LEGACY_BUFFERS)
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iowrite32(word, FLASH_BUF + i);
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else
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@@ -945,10 +1069,11 @@ static uint32_t fpga_tx(struct solos_car
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for (port = 0; tx_pending; tx_pending >>= 1, port++) {
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if (tx_pending & 1) {
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struct sk_buff *oldskb = card->tx_skb[port];
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- if (oldskb)
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+ if (oldskb) {
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pci_unmap_single(card->dev, SKB_CB(oldskb)->dma_addr,
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oldskb->len, PCI_DMA_TODEVICE);
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-
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+ card->tx_skb[port] = NULL;
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+ }
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spin_lock(&card->tx_queue_lock);
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skb = skb_dequeue(&card->tx_queue[port]);
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if (!skb)
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@@ -960,7 +1085,12 @@ static uint32_t fpga_tx(struct solos_car
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tx_started |= 1 << port;
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oldskb = skb; /* We're done with this skb already */
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} else if (skb && card->using_dma) {
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- SKB_CB(skb)->dma_addr = pci_map_single(card->dev, skb->data,
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+ unsigned char *data = skb->data;
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+ if ((unsigned long)data & card->dma_alignment) {
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+ data = card->dma_bounce + (BUF_SIZE * port);
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+ memcpy(data, skb->data, skb->len);
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+ }
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+ SKB_CB(skb)->dma_addr = pci_map_single(card->dev, data,
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skb->len, PCI_DMA_TODEVICE);
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card->tx_skb[port] = skb;
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iowrite32(SKB_CB(skb)->dma_addr,
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@@ -1134,18 +1264,33 @@ static int fpga_probe(struct pci_dev *de
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db_fpga_upgrade = db_firmware_upgrade = 0;
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}
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+ /* Stopped using Atmel flash after 0.03-38 */
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+ if (fpga_ver < 39)
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+ card->atmel_flash = 1;
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+ else
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+ card->atmel_flash = 0;
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+
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+ data32 = ioread32(card->config_regs + PORTS);
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+ card->nr_ports = (data32 & 0x000000FF);
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+
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if (card->fpga_version >= DMA_SUPPORTED) {
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pci_set_master(dev);
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card->using_dma = 1;
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+ if (1) { /* All known FPGA versions so far */
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+ card->dma_alignment = 3;
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+ card->dma_bounce = kmalloc(card->nr_ports * BUF_SIZE, GFP_KERNEL);
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+ if (!card->dma_bounce) {
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+ dev_warn(&card->dev->dev, "Failed to allocate DMA bounce buffers\n");
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+ /* Fallback to MMIO doesn't work */
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+ goto out_unmap_both;
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+ }
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+ }
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} else {
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card->using_dma = 0;
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/* Set RX empty flag for all ports */
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iowrite32(0xF0, card->config_regs + FLAGS_ADDR);
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}
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- data32 = ioread32(card->config_regs + PORTS);
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- card->nr_ports = (data32 & 0x000000FF);
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-
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pci_set_drvdata(dev, card);
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tasklet_init(&card->tlet, solos_bh, (unsigned long)card);
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@@ -1180,6 +1325,10 @@ static int fpga_probe(struct pci_dev *de
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if (err)
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goto out_free_irq;
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+ if (card->fpga_version >= DMA_SUPPORTED &&
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+ sysfs_create_group(&card->dev->dev.kobj, &gpio_attr_group))
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+ dev_err(&card->dev->dev, "Could not register parameter group for GPIOs\n");
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+
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return 0;
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out_free_irq:
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@@ -1188,6 +1337,7 @@ static int fpga_probe(struct pci_dev *de
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tasklet_kill(&card->tlet);
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out_unmap_both:
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+ kfree(card->dma_bounce);
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pci_set_drvdata(dev, NULL);
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pci_iounmap(dev, card->buffers);
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out_unmap_config:
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@@ -1290,11 +1440,16 @@ static void fpga_remove(struct pci_dev *
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iowrite32(1, card->config_regs + FPGA_MODE);
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(void)ioread32(card->config_regs + FPGA_MODE);
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+ if (card->fpga_version >= DMA_SUPPORTED)
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+ sysfs_remove_group(&card->dev->dev.kobj, &gpio_attr_group);
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+
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atm_remove(card);
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free_irq(dev->irq, card);
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tasklet_kill(&card->tlet);
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+ kfree(card->dma_bounce);
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+
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/* Release device from reset */
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iowrite32(0, card->config_regs + FPGA_MODE);
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(void)ioread32(card->config_regs + FPGA_MODE);
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