mirror of
git://projects.qi-hardware.com/openwrt-xburst.git
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17d001231c
git-svn-id: svn://svn.openwrt.org/openwrt/trunk@27381 3c298f89-4303-0410-b956-a3cf2f4a3e73
114 lines
2.7 KiB
C
114 lines
2.7 KiB
C
/*
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* Ralink SoC specific GPIO support
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*
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* Copyright (C) 2009-2011 Gabor Juhos <juhosg@openwrt.org>
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*
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* This program is free software; you can redistribute it and/or modify it
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* under the terms of the GNU General Public License version 2 as published
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* by the Free Software Foundation.
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*/
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#include <linux/init.h>
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#include <linux/io.h>
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#include <asm/mach-ralink/ramips_gpio.h>
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static inline struct ramips_gpio_chip *to_ramips_gpio(struct gpio_chip *chip)
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{
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struct ramips_gpio_chip *rg;
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rg = container_of(chip, struct ramips_gpio_chip, chip);
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return rg;
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}
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static inline void ramips_gpio_wr(struct ramips_gpio_chip *rg, u8 reg, u32 val)
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{
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__raw_writel(val, rg->regs_base + rg->regs[reg]);
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}
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static inline u32 ramips_gpio_rr(struct ramips_gpio_chip *rg, u8 reg)
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{
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return __raw_readl(rg->regs_base + rg->regs[reg]);
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}
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static int ramips_gpio_direction_input(struct gpio_chip *chip, unsigned offset)
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{
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struct ramips_gpio_chip *rg = to_ramips_gpio(chip);
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unsigned long flags;
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u32 t;
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spin_lock_irqsave(&rg->lock, flags);
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t = ramips_gpio_rr(rg, RAMIPS_GPIO_REG_DIR);
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t &= ~(1 << offset);
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ramips_gpio_wr(rg, RAMIPS_GPIO_REG_DIR, t);
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spin_unlock_irqrestore(&rg->lock, flags);
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return 0;
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}
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static int ramips_gpio_direction_output(struct gpio_chip *chip,
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unsigned offset, int value)
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{
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struct ramips_gpio_chip *rg = to_ramips_gpio(chip);
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unsigned long flags;
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u32 reg;
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u32 t;
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reg = (value) ? RAMIPS_GPIO_REG_SET : RAMIPS_GPIO_REG_RESET;
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spin_lock_irqsave(&rg->lock, flags);
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ramips_gpio_wr(rg, reg, 1 << offset);
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t = ramips_gpio_rr(rg, RAMIPS_GPIO_REG_DIR);
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t |= 1 << offset;
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ramips_gpio_wr(rg, RAMIPS_GPIO_REG_DIR, t);
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spin_unlock_irqrestore(&rg->lock, flags);
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return 0;
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}
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static void ramips_gpio_set(struct gpio_chip *chip, unsigned offset, int value)
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{
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struct ramips_gpio_chip *rg = to_ramips_gpio(chip);
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u32 reg;
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reg = (value) ? RAMIPS_GPIO_REG_SET : RAMIPS_GPIO_REG_RESET;
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ramips_gpio_wr(rg, reg, 1 << offset);
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}
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static int ramips_gpio_get(struct gpio_chip *chip, unsigned offset)
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{
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struct ramips_gpio_chip *rg = to_ramips_gpio(chip);
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u32 t;
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t = ramips_gpio_rr(rg, RAMIPS_GPIO_REG_DATA);
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return !!(t & (1 << offset));
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}
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static __init void ramips_gpio_chip_add(struct ramips_gpio_chip *rg)
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{
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spin_lock_init(&rg->lock);
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rg->regs_base = ioremap(rg->map_base, rg->map_size);
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rg->chip.direction_input = ramips_gpio_direction_input;
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rg->chip.direction_output = ramips_gpio_direction_output;
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rg->chip.get = ramips_gpio_get;
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rg->chip.set = ramips_gpio_set;
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/* set polarity to low for all lines */
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ramips_gpio_wr(rg, RAMIPS_GPIO_REG_POL, 0);
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gpiochip_add(&rg->chip);
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}
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__init int ramips_gpio_init(struct ramips_gpio_data *data)
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{
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int i;
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for (i = 0; i < data->num_chips; i++)
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ramips_gpio_chip_add(&data->chips[i]);
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return 0;
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}
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