mirror of
git://projects.qi-hardware.com/openwrt-xburst.git
synced 2024-11-25 12:53:07 +02:00
ba2e2fa7be
git-svn-id: svn://svn.openwrt.org/openwrt/trunk@14454 3c298f89-4303-0410-b956-a3cf2f4a3e73
319 lines
7.7 KiB
Diff
319 lines
7.7 KiB
Diff
--- a/arch/arm/Kconfig
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+++ b/arch/arm/Kconfig
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@@ -505,6 +505,8 @@ config PCI_HOST_VIA82C505
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depends on PCI && ARCH_SHARK
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default y
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+source "drivers/gpio/Kconfig"
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+
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source "drivers/pci/Kconfig"
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source "drivers/pcmcia/Kconfig"
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--- a/drivers/Makefile
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+++ b/drivers/Makefile
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@@ -81,3 +81,4 @@ obj-$(CONFIG_GENERIC_TIME) += clocksourc
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obj-$(CONFIG_DMA_ENGINE) += dma/
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obj-$(CONFIG_HID) += hid/
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obj-$(CONFIG_PPC_PS3) += ps3/
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+obj-$(CONFIG_PROC_GPIO) += gpio/
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--- /dev/null
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+++ b/drivers/gpio/Kconfig
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@@ -0,0 +1,13 @@
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+config PROC_GPIO
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+ tristate "GPIO /proc interface"
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+ depends on PXA25x || PXA27x
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+ help
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+ This enables an interface under /proc/gpio which allows reading or setting
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+ of any GPIO, and also changing the GPIO alt function mode of any line.
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+
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+config PROC_GPIO_DEBUG
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+ boolean "Enable /proc/gpio debug logging"
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+ depends on PROC_GPIO
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+ help
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+ This enables printk logging of activity done through /proc/gpio
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+
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--- /dev/null
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+++ b/drivers/gpio/Makefile
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@@ -0,0 +1,2 @@
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+# Expose GPIOs under /proc
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+obj-$(CONFIG_PROC_GPIO) += proc_gpio.o
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--- /dev/null
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+++ b/drivers/gpio/proc_gpio.c
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@@ -0,0 +1,276 @@
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+/*
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+ *
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+ * PXA25x GPIOs exposed under /proc for reading and writing
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+ * They will show up under /proc/gpio/NN
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+ *
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+ * Based on patch 1773/1 in the arm kernel patch repository at arm.linux.co.uk
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+ *
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+ */
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+
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+#include <linux/module.h>
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+#include <linux/init.h>
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+#include <linux/proc_fs.h>
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+#include <linux/string.h>
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+#include <linux/ctype.h>
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+
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+#include <asm/hardware.h>
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+#include <asm/arch/pxa-regs.h>
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+#include <asm/uaccess.h>
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+
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+static struct proc_dir_entry *proc_gpio_parent;
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+static struct proc_dir_entry *proc_gpios[PXA_LAST_GPIO + 1];
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+
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+typedef struct
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+{
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+ int gpio;
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+ char name[32];
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+} gpio_summary_type;
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+
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+static gpio_summary_type gpio_summaries[PXA_LAST_GPIO + 1];
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+
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+static int proc_gpio_write(struct file *file, const char __user *buf,
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+ unsigned long count, void *data)
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+{
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+ char *cur, lbuf[count + 1];
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+ gpio_summary_type *summary = data;
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+ u32 altfn, direction, setclear, gafr;
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+
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+ if (!capable(CAP_SYS_ADMIN))
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+ return -EACCES;
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+
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+ memset(lbuf, 0, count + 1);
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+
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+ if (copy_from_user(lbuf, buf, count))
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+ return -EFAULT;
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+
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+ cur = lbuf;
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+
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+ // Initialize to current state
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+ altfn = ((GAFR(summary->gpio) >> ((summary->gpio & 0x0f) << 0x01)) & 0x03);
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+ direction = GPDR(summary->gpio) & GPIO_bit(summary->gpio);
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+ setclear = GPLR(summary->gpio) & GPIO_bit(summary->gpio);
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+ while(1)
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+ {
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+ // We accept options: {GPIO|AF1|AF2|AF3}, {set|clear}, {in|out}
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+ // Anything else is an error
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+ while(cur[0] && (isspace(cur[0]) || ispunct(cur[0]))) cur = &(cur[1]);
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+
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+ if('\0' == cur[0]) break;
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+
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+ // Ok, so now we're pointing at the start of something
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+ switch(cur[0])
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+ {
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+ case 'G':
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+ // Check that next is "PIO" -- '\0' will cause safe short-circuit if end of buf
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+ if(!(cur[1] == 'P' && cur[2] == 'I' && cur[3] == 'O')) goto parse_error;
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+ // Ok, so set this GPIO to GPIO (non-ALT) function
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+ altfn = 0;
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+ cur = &(cur[4]);
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+ break;
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+ case 'A':
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+ if(!(cur[1] == 'F' && cur[2] >= '1' && cur[2] <= '3')) goto parse_error;
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+ altfn = cur[2] - '0';
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+ cur = &(cur[3]);
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+ break;
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+ case 's':
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+ if(!(cur[1] == 'e' && cur[2] == 't')) goto parse_error;
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+ setclear = 1;
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+ cur = &(cur[3]);
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+ break;
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+ case 'c':
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+ if(!(cur[1] == 'l' && cur[2] == 'e' && cur[3] == 'a' && cur[4] == 'r')) goto parse_error;
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+ setclear = 0;
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+ cur = &(cur[5]);
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+ break;
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+ case 'i':
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+ if(!(cur[1] == 'n')) goto parse_error;
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+ direction = 0;
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+ cur = &(cur[2]);
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+ break;
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+ case 'o':
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+ if(!(cur[1] == 'u' && cur[2] == 't')) goto parse_error;
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+ direction = 1;
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+ cur = &(cur[3]);
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+ break;
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+ default: goto parse_error;
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+ }
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+ }
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+ // Ok, now set gpio mode and value
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+ if(direction)
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+ GPDR(summary->gpio) |= GPIO_bit(summary->gpio);
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+ else
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+ GPDR(summary->gpio) &= ~GPIO_bit(summary->gpio);
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+
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+ gafr = GAFR(summary->gpio) & ~(0x3 << (((summary->gpio) & 0xf)*2));
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+ GAFR(summary->gpio) = gafr | (altfn << (((summary->gpio) & 0xf)*2));
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+
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+ if(direction && !altfn)
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+ {
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+ if(setclear) GPSR(summary->gpio) = GPIO_bit(summary->gpio);
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+ else GPCR(summary->gpio) = GPIO_bit(summary->gpio);
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+ }
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+
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+#ifdef CONFIG_PROC_GPIO_DEBUG
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+ printk(KERN_INFO "Set (%s,%s,%s) via /proc/gpio/%s\n",altfn ? (altfn == 1 ? "AF1" : (altfn == 2 ? "AF2" : "AF3")) : "GPIO",
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+ direction ? "out" : "in",
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+ setclear ? "set" : "clear",
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+ summary->name);
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+#endif
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+
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+ return count;
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+
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+parse_error:
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+ printk(KERN_CRIT "Parse error: Expect \"[GPIO|AF1|AF2|AF3]|[set|clear]|[in|out] ...\"\n");
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+ return -EINVAL;
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+}
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+
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+static int proc_gpio_read(char *page, char **start, off_t off,
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+ int count, int *eof, void *data)
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+{
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+ char *p = page;
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+ gpio_summary_type *summary = data;
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+ int len, i, af;
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+ i = summary->gpio;
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+
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+ p += sprintf(p, "%d\t%s\t%s\t%s\n", i,
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+ (af = ((GAFR(i) >> ((i & 0x0f) << 0x01)) & 0x03)) ? (af == 1 ? "AF1" : (af == 2 ? "AF2" : "AF3")) : "GPIO",
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+ (GPDR(i) & GPIO_bit(i)) ? "out" : "in",
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+ (GPLR(i) & GPIO_bit(i)) ? "set" : "clear");
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+
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+ len = (p - page) - off;
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+
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+ if(len < 0)
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+ {
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+ len = 0;
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+ }
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+
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+ *eof = (len <= count) ? 1 : 0;
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+ *start = page + off;
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+
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+ return len;
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+}
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+
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+
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+#ifdef CONFIG_PXA25x
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+static const char const *GAFR_DESC[] = { "GAFR0_L", "GAFR0_U", "GAFR1_L", "GAFR1_U", "GAFR2_L", "GAFR2_U" };
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+#elif defined(CONFIG_PXA27x)
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+static const char const *GAFR_DESC[] = { "GAFR0_L", "GAFR0_U", "GAFR1_L", "GAFR1_U", "GAFR2_L", "GAFR2_U", "GAFR3_L", "GAFR3_U" };
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+#endif
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+
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+static int proc_gafr_read(char *page, char **start, off_t off,
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+ int count, int *eof, void *data)
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+{
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+ char *p = page;
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+ int i, len;
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+
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+ for(i=0; i<ARRAY_SIZE(GAFR_DESC); i++)
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+ {
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+ p += sprintf(p, "%s: %08x\n", GAFR_DESC[i], GAFR(i*16));
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+ }
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+
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+ len = (p - page) - off;
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+
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+ if(len < 0)
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+ {
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+ len = 0;
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+ }
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+
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+ *eof = (len <= count) ? 1 : 0;
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+ *start = page + off;
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+
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+ return len;
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+}
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+
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+static int proc_gpdr_read(char *page, char **start, off_t off,
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+ int count, int *eof, void *data)
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+{
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+ char *p = page;
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+ int i, len;
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+
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+ for(i=0; i<=2; i++)
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+ {
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+ p += sprintf(p, "GPDR%d: %08x\n", i, GPDR(i * 32));
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+ }
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+
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+ len = (p - page) - off;
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+
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+ if(len < 0)
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+ {
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+ len = 0;
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+ }
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+
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+ *eof = (len <= count) ? 1 : 0;
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+ *start = page + off;
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+
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+ return len;
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+}
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+
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+static int proc_gplr_read(char *page, char **start, off_t off,
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+ int count, int *eof, void *data)
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+{
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+ char *p = page;
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+ int i, len;
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+
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+ for(i=0; i<=2; i++)
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+ {
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+ p += sprintf(p, "GPLR%d: %08x\n", i, GPLR(i * 32));
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+ }
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+
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+ len = (p - page) - off;
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+
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+ if(len < 0)
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+ {
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+ len = 0;
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+ }
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+
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+ *eof = (len <= count) ? 1 : 0;
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+ *start = page + off;
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+
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+ return len;
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+}
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+
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+static int __init gpio_init(void)
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+{
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+ int i;
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+
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+ proc_gpio_parent = create_proc_entry("gpio", S_IFDIR | S_IRUGO | S_IXUGO, NULL);
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+ if(!proc_gpio_parent) return 0;
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+
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+ for(i=0; i < (PXA_LAST_GPIO+1); i++)
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+ {
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+ gpio_summaries[i].gpio = i;
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+ sprintf(gpio_summaries[i].name, "GPIO%d", i);
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+ proc_gpios[i] = create_proc_entry(gpio_summaries[i].name, 0644, proc_gpio_parent);
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+ if(proc_gpios[i])
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+ {
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+ proc_gpios[i]->data = &gpio_summaries[i];
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+ proc_gpios[i]->read_proc = proc_gpio_read;
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+ proc_gpios[i]->write_proc = proc_gpio_write;
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+ }
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+ }
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+
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+ create_proc_read_entry("GAFR", 0444, proc_gpio_parent, proc_gafr_read, NULL);
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+ create_proc_read_entry("GPDR", 0444, proc_gpio_parent, proc_gpdr_read, NULL);
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+ create_proc_read_entry("GPLR", 0444, proc_gpio_parent, proc_gplr_read, NULL);
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+
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+ return 0;
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+}
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+
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+static void gpio_exit(void)
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+{
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+ int i;
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+
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+ remove_proc_entry("GAFR", proc_gpio_parent);
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+ remove_proc_entry("GPDR", proc_gpio_parent);
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+ remove_proc_entry("GPLR", proc_gpio_parent);
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+
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+ for(i=0; i < (PXA_LAST_GPIO+1); i++)
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+ {
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+ if(proc_gpios[i]) remove_proc_entry(gpio_summaries[i].name, proc_gpio_parent);
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+ }
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+ if(proc_gpio_parent) remove_proc_entry("gpio", NULL);
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+}
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+
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+module_init(gpio_init);
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+module_exit(gpio_exit);
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+MODULE_LICENSE("GPL");
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