mirror of
git://projects.qi-hardware.com/openwrt-xburst.git
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1a29ef8e97
git-svn-id: svn://svn.openwrt.org/openwrt/trunk@19815 3c298f89-4303-0410-b956-a3cf2f4a3e73
157 lines
3.9 KiB
C
157 lines
3.9 KiB
C
/*
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* drivers/usb/musb/ubi32_usb.c
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* Ubicom32 usb controller driver.
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*
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* (C) Copyright 2009, Ubicom, Inc.
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* Copyright (C) 2005-2006 by Texas Instruments
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*
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* Derived from the Texas Instruments Inventra Controller Driver for Linux.
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*
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* This file is part of the Ubicom32 Linux Kernel Port.
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*
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* The Ubicom32 Linux Kernel Port is free software: you can redistribute
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* it and/or modify it under the terms of the GNU General Public License
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* as published by the Free Software Foundation, either version 2 of the
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* License, or (at your option) any later version.
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*
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* The Ubicom32 Linux Kernel Port is distributed in the hope that it
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* will be useful, but WITHOUT ANY WARRANTY; without even the implied
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* warranty of MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See
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* the GNU General Public License for more details.
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*
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* You should have received a copy of the GNU General Public License
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* along with the Ubicom32 Linux Kernel Port. If not,
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* see <http://www.gnu.org/licenses/>.
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*
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* Ubicom32 implementation derived from (with many thanks):
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* arch/m68knommu
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* arch/blackfin
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* arch/parisc
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*/
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#include <linux/module.h>
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#include <linux/kernel.h>
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#include <linux/sched.h>
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#include <linux/slab.h>
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#include <linux/init.h>
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#include <linux/list.h>
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#include <linux/clk.h>
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#include <linux/io.h>
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#include <asm/io.h>
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#include <asm/ip5000.h>
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#include "musb_core.h"
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void musb_platform_enable(struct musb *musb)
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{
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}
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void musb_platform_disable(struct musb *musb)
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{
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}
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int musb_platform_set_mode(struct musb *musb, u8 musb_mode) {
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return 0;
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}
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static void ip5k_usb_hcd_vbus_power(struct musb *musb, int is_on, int sleeping)
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{
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}
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static void ip5k_usb_hcd_set_vbus(struct musb *musb, int is_on)
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{
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u8 devctl;
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/* HDRC controls CPEN, but beware current surges during device
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* connect. They can trigger transient overcurrent conditions
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* that must be ignored.
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*/
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devctl = musb_readb(musb->mregs, MUSB_DEVCTL);
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if (is_on) {
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musb->is_active = 1;
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musb->xceiv.default_a = 1;
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musb->xceiv.state = OTG_STATE_A_WAIT_VRISE;
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devctl |= MUSB_DEVCTL_SESSION;
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MUSB_HST_MODE(musb);
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} else {
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musb->is_active = 0;
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/* NOTE: we're skipping A_WAIT_VFALL -> A_IDLE and
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* jumping right to B_IDLE...
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*/
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musb->xceiv.default_a = 0;
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musb->xceiv.state = OTG_STATE_B_IDLE;
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devctl &= ~MUSB_DEVCTL_SESSION;
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MUSB_DEV_MODE(musb);
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}
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musb_writeb(musb->mregs, MUSB_DEVCTL, devctl);
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DBG(1, "VBUS %s, devctl %02x "
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/* otg %3x conf %08x prcm %08x */ "\n",
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otg_state_string(musb),
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musb_readb(musb->mregs, MUSB_DEVCTL));
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}
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static int ip5k_usb_hcd_set_power(struct otg_transceiver *x, unsigned mA)
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{
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return 0;
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}
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static int musb_platform_resume(struct musb *musb);
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int __init musb_platform_init(struct musb *musb)
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{
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#ifdef CONFIG_UBICOM32_V4
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u32_t chip_id;
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asm volatile (
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"move.4 %0, CHIP_ID \n\t"
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: "=r" (chip_id)
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);
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if (chip_id == 0x30001) {
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*((u32_t *)(GENERAL_CFG_BASE + GEN_USB_PHY_TEST)) &= ~(1 << 30);
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udelay(1);
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*((u32_t *)(GENERAL_CFG_BASE + GEN_USB_PHY_TEST)) &= ~(1 << 31);
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} else {
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*((u32_t *)(GENERAL_CFG_BASE + GEN_USB_PHY_TEST)) &= ~(1 << 17);
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udelay(1);
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*((u32_t *)(GENERAL_CFG_BASE + GEN_USB_PHY_TEST)) &= ~(1 << 14);
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}
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#endif
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*((u32_t *)(GENERAL_CFG_BASE + GEN_USB_PHY_CFG)) |= ((1 << 14) | (1 <<15));
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/* The i-clk is AUTO gated. Hence there is no need
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* to disable it until the driver is shutdown */
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clk_enable(musb->clock);
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musb_platform_resume(musb);
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ip5k_usb_hcd_vbus_power(musb, musb->board_mode == MUSB_HOST, 1);
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if (is_host_enabled(musb))
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musb->board_set_vbus = ip5k_usb_hcd_set_vbus;
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if (is_peripheral_enabled(musb))
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musb->xceiv.set_power = ip5k_usb_hcd_set_power;
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return 0;
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}
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int musb_platform_suspend(struct musb *musb)
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{
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return 0;
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}
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int musb_platform_resume(struct musb *musb)
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{
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return 0;
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}
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int musb_platform_exit(struct musb *musb)
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{
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ip5k_usb_hcd_vbus_power(musb, 0 /*off*/, 1);
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musb_platform_suspend(musb);
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return 0;
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}
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