mirror of
git://projects.qi-hardware.com/openwrt-xburst.git
synced 2024-11-28 00:49:43 +02:00
3e84f7b9f1
Reading from the flash chip on the TL-WR2543ND seems buggy. If the SPI flash driver tries to read too much data in one SPI transfer, the flash chip returns bogus values. This can be caused by a buggy flash chip on my board, or it can be a bug in our SPI driver. Add a workaround to the m25p80 driver until I find out the root cause of the problem. The patch allows to specify the maximum numner of bytes which can be read safely withint one SPI transfer. git-svn-id: svn://svn.openwrt.org/openwrt/trunk@29679 3c298f89-4303-0410-b956-a3cf2f4a3e73
113 lines
2.8 KiB
Diff
113 lines
2.8 KiB
Diff
--- a/drivers/mtd/devices/m25p80.c
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+++ b/drivers/mtd/devices/m25p80.c
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@@ -94,6 +94,7 @@ struct m25p {
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u16 addr_width;
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u8 erase_opcode;
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u8 *command;
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+ size_t max_read_len;
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};
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static inline struct m25p *mtd_to_m25p(struct mtd_info *mtd)
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@@ -341,6 +342,7 @@ static int m25p80_read(struct mtd_info *
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struct m25p *flash = mtd_to_m25p(mtd);
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struct spi_transfer t[2];
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struct spi_message m;
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+ loff_t ofs;
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DEBUG(MTD_DEBUG_LEVEL2, "%s: %s %s 0x%08x, len %zd\n",
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dev_name(&flash->spi->dev), __func__, "from",
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@@ -364,8 +366,6 @@ static int m25p80_read(struct mtd_info *
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t[0].len = m25p_cmdsz(flash) + FAST_READ_DUMMY_BYTE;
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spi_message_add_tail(&t[0], &m);
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- t[1].rx_buf = buf;
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- t[1].len = len;
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spi_message_add_tail(&t[1], &m);
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/* Byte count starts at zero. */
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@@ -373,13 +373,6 @@ static int m25p80_read(struct mtd_info *
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mutex_lock(&flash->lock);
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- /* Wait till previous write/erase is done. */
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- if (wait_till_ready(flash)) {
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- /* REVISIT status return?? */
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- mutex_unlock(&flash->lock);
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- return 1;
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- }
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-
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/* FIXME switch to OPCODE_FAST_READ. It's required for higher
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* clocks; and at this writing, every chip this driver handles
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* supports that opcode.
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@@ -387,11 +380,44 @@ static int m25p80_read(struct mtd_info *
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/* Set up the write data buffer. */
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flash->command[0] = OPCODE_READ;
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- m25p_addr2cmd(flash, from, flash->command);
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- spi_sync(flash->spi, &m);
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+ ofs = 0;
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+ while (len) {
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+ size_t readlen;
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+ size_t done;
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+ int ret;
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+
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+ ret = wait_till_ready(flash);
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+ if (ret) {
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+ mutex_unlock(&flash->lock);
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+ return 1;
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+ }
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+
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+ if (flash->max_read_len > 0 &&
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+ flash->max_read_len < len)
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+ readlen = flash->max_read_len;
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+ else
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+ readlen = len;
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+
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+ t[1].rx_buf = buf + ofs;
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+ t[1].len = readlen;
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+
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+ m25p_addr2cmd(flash, from + ofs, flash->command);
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+
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+ spi_sync(flash->spi, &m);
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- *retlen = m.actual_length - m25p_cmdsz(flash) - FAST_READ_DUMMY_BYTE;
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+ done = m.actual_length - m25p_cmdsz(flash) -
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+ FAST_READ_DUMMY_BYTE;
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+ if (done != readlen) {
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+ mutex_unlock(&flash->lock);
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+ return 1;
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+ }
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+
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+ ofs += done;
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+ len -= done;
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+ }
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+
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+ *retlen = ofs;
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mutex_unlock(&flash->lock);
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@@ -901,6 +927,12 @@ static int __devinit m25p_probe(struct s
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flash->mtd.erase = m25p80_erase;
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flash->mtd.read = m25p80_read;
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+ if (data && data->max_read_len) {
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+ flash->max_read_len = data->max_read_len;
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+ dev_warn(&spi->dev, "max_read_len set to %d bytes\n",
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+ flash->max_read_len);
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+ }
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+
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/* sst flash chips use AAI word program */
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if (info->jedec_id >> 16 == 0xbf)
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flash->mtd.write = sst_write;
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--- a/include/linux/spi/flash.h
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+++ b/include/linux/spi/flash.h
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@@ -26,6 +26,7 @@ struct flash_platform_data {
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char *type;
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const char **part_probes;
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+ size_t max_read_len;
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/* we'll likely add more ... use JEDEC IDs, etc */
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};
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