mirror of
git://projects.qi-hardware.com/openwrt-xburst.git
synced 2024-11-09 16:40:37 +02:00
e0b80e41eb
Tested on the following boards: ALFA AP96 TL-MR3220 v1 TL-WR1043ND v1 TL-WR2543ND v1 TL-WR703N v1 TL-WR741ND v1 TL-WR741ND v4 WNDR3700 v1 WZR-HP-G300NH git-svn-id: svn://svn.openwrt.org/openwrt/trunk@29868 3c298f89-4303-0410-b956-a3cf2f4a3e73
94 lines
2.5 KiB
Diff
94 lines
2.5 KiB
Diff
From 4518ae06e5fc953abfd9c2b66c6155fc2b2696ce Mon Sep 17 00:00:00 2001
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From: Gabor Juhos <juhosg@openwrt.org>
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Date: Mon, 9 Jan 2012 15:00:46 +0100
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Subject: [PATCH 5/7] spi/ath79: introduce ath79_spi_{en,dis}able helpers
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---
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drivers/spi/spi-ath79.c | 41 +++++++++++++++++++++++++----------------
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1 files changed, 25 insertions(+), 16 deletions(-)
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--- a/drivers/spi/spi-ath79.c
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+++ b/drivers/spi/spi-ath79.c
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@@ -89,16 +89,8 @@ static void ath79_spi_chipselect(struct
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}
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-static int ath79_spi_setup_cs(struct spi_device *spi)
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+static void ath79_spi_enable(struct ath79_spi *sp)
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{
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- struct ath79_spi *sp = ath79_spidev_to_sp(spi);
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- struct ath79_spi_controller_data *cdata;
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- int status;
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-
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- cdata = spi->controller_data;
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- if (spi->chip_select && !cdata)
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- return -EINVAL;
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-
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/* enable GPIO mode */
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ath79_spi_wr(sp, AR71XX_SPI_REG_FS, AR71XX_SPI_FS_GPIO);
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@@ -108,6 +100,25 @@ static int ath79_spi_setup_cs(struct spi
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/* TODO: setup speed? */
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ath79_spi_wr(sp, AR71XX_SPI_REG_CTRL, 0x43);
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+}
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+
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+static void ath79_spi_disable(struct ath79_spi *sp)
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+{
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+ /* restore CTRL register */
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+ ath79_spi_wr(sp, AR71XX_SPI_REG_CTRL, sp->reg_ctrl);
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+ /* disable GPIO mode */
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+ ath79_spi_wr(sp, AR71XX_SPI_REG_FS, 0);
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+}
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+
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+static int ath79_spi_setup_cs(struct spi_device *spi)
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+{
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+ struct ath79_spi *sp = ath79_spidev_to_sp(spi);
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+ struct ath79_spi_controller_data *cdata;
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+ int status;
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+
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+ cdata = spi->controller_data;
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+ if (spi->chip_select && !cdata)
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+ return -EINVAL;
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status = 0;
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if (spi->chip_select) {
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@@ -134,11 +145,6 @@ static void ath79_spi_cleanup_cs(struct
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struct ath79_spi_controller_data *cdata = spi->controller_data;
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gpio_free(cdata->gpio);
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}
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-
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- /* restore CTRL register */
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- ath79_spi_wr(sp, AR71XX_SPI_REG_CTRL, sp->reg_ctrl);
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- /* disable GPIO mode */
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- ath79_spi_wr(sp, AR71XX_SPI_REG_FS, 0);
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}
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static int ath79_spi_setup(struct spi_device *spi)
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@@ -242,13 +248,15 @@ static __devinit int ath79_spi_probe(str
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goto err_put_master;
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}
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+ ath79_spi_enable(sp);
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ret = spi_bitbang_start(&sp->bitbang);
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if (ret)
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- goto err_unmap;
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+ goto err_disable;
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return 0;
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-err_unmap:
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+err_disable:
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+ ath79_spi_disable(sp);
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iounmap(sp->base);
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err_put_master:
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platform_set_drvdata(pdev, NULL);
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@@ -262,6 +270,7 @@ static __devexit int ath79_spi_remove(st
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struct ath79_spi *sp = platform_get_drvdata(pdev);
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spi_bitbang_stop(&sp->bitbang);
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+ ath79_spi_disable(sp);
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iounmap(sp->base);
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platform_set_drvdata(pdev, NULL);
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spi_master_put(sp->bitbang.master);
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