mirror of
git://projects.qi-hardware.com/openwrt-xburst.git
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c4105c81c0
git-svn-id: svn://svn.openwrt.org/openwrt/trunk@7284 3c298f89-4303-0410-b956-a3cf2f4a3e73
190 lines
4.9 KiB
C
190 lines
4.9 KiB
C
/**************************************************************************
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*
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* BRIEF MODULE DESCRIPTION
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* UART register definitions
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*
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* Copyright 2004 IDT Inc. (rischelp@idt.com)
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*
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* This program is free software; you can redistribute it and/or modify it
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* under the terms of the GNU General Public License as published by the
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* Free Software Foundation; either version 2 of the License, or (at your
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* option) any later version.
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*
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* THIS SOFTWARE IS PROVIDED ``AS IS'' AND ANY EXPRESS OR IMPLIED
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* WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF
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* MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN
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* NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT,
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* INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT
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* NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF
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* USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON
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* ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
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* (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF
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* THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
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*
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* You should have received a copy of the GNU General Public License along
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* with this program; if not, write to the Free Software Foundation, Inc.,
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* 675 Mass Ave, Cambridge, MA 02139, USA.
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*
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*
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**************************************************************************
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* May 2004 rkt, neb.
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*
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* Initial Release
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*
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*
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*
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**************************************************************************
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*/
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#ifndef __IDT_UART_H__
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#define __IDT_UART_H__
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enum
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{
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UART0_PhysicalAddress = 0x1c000000,
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UART_PhysicalAddress = UART0_PhysicalAddress, // Default
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UART0_VirtualAddress = 0xbc000000,
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UART_VirtualAddress = UART0_VirtualAddress, // Default
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} ;
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/*
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* Register definitions are in bytes so we can handle endian problems.
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*/
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typedef struct UART_s
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{
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union
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{
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u32 const uartrb ; // 0x00 - DLAB=0, read.
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u32 uartth ; // 0x00 - DLAB=0, write.
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u32 uartdll ; // 0x00 - DLAB=1, read/write.
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} ;
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union
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{
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u32 uartie ; // 0x04 - DLAB=0, read/write.
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u32 uartdlh ; // 0x04 - DLAB=1, read/write.
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} ;
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union
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{
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u32 const uartii ; // 0x08 - DLAB=0, read.
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u32 uartfc ; // 0x08 - DLAB=0, write.
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} ;
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u32 uartlc ; // 0x0c
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u32 uartmc ; // 0x10
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u32 uartls ; // 0x14
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u32 uartms ; // 0x18
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u32 uarts ; // 0x1c
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} volatile *UART_t ;
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// Reset registers.
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typedef u32 volatile *UARTRR_t ;
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enum
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{
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UARTIE_rda_b = 0,
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UARTIE_rda_m = 0x00000001,
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UARTIE_the_b = 1,
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UARTIE_the_m = 0x00000002,
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UARTIE_rls_b = 2,
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UARTIE_rls_m = 0x00000004,
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UARTIE_ems_b = 3,
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UARTIE_ems_m = 0x00000008,
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UARTII_pi_b = 0,
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UARTII_pi_m = 0x00000001,
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UARTII_iid_b = 1,
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UARTII_iid_m = 0x0000000e,
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UARTII_iid_ms_v = 0, // Modem stat-CTS,DSR,RI or DCD.
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UARTII_iid_thre_v = 1, // Trans. Holding Reg. empty.
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UARTII_iid_rda_v = 2, // Receive data available
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UARTII_iid_rls_v = 3, // Overrun, parity, etc, error.
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UARTII_iid_res4_v = 4, // reserved.
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UARTII_iid_res5_v = 5, // reserved.
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UARTII_iid_cto_v = 6, // Character timeout.
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UARTII_iid_res7_v = 7, // reserved.
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UARTFC_en_b = 0,
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UARTFC_en_m = 0x00000001,
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UARTFC_rr_b = 1,
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UARTFC_rr_m = 0x00000002,
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UARTFC_tr_b = 2,
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UARTFC_tr_m = 0x00000004,
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UARTFC_dms_b = 3,
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UARTFC_dms_m = 0x00000008,
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UARTFC_rt_b = 6,
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UARTFC_rt_m = 0x000000c0,
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UARTFC_rt_1Byte_v = 0,
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UARTFC_rt_4Byte_v = 1,
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UARTFC_rt_8Byte_v = 2,
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UARTFC_rt_14Byte_v = 3,
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UARTLC_wls_b = 0,
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UARTLC_wls_m = 0x00000003,
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UARTLC_wls_5Bits_v = 0,
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UARTLC_wls_6Bits_v = 1,
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UARTLC_wls_7Bits_v = 2,
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UARTLC_wls_8Bits_v = 3,
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UARTLC_stb_b = 2,
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UARTLC_stb_m = 0x00000004,
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UARTLC_pen_b = 3,
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UARTLC_pen_m = 0x00000008,
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UARTLC_eps_b = 4,
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UARTLC_eps_m = 0x00000010,
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UARTLC_sp_b = 5,
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UARTLC_sp_m = 0x00000020,
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UARTLC_sb_b = 6,
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UARTLC_sb_m = 0x00000040,
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UARTLC_dlab_b = 7,
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UARTLC_dlab_m = 0x00000080,
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UARTMC_dtr_b = 0,
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UARTMC_dtr_m = 0x00000001,
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UARTMC_rts_b = 1,
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UARTMC_rts_m = 0x00000002,
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UARTMC_o1_b = 2,
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UARTMC_o1_m = 0x00000004,
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UARTMC_o2_b = 3,
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UARTMC_o2_m = 0x00000008,
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UARTMC_lp_b = 4,
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UARTMC_lp_m = 0x00000010,
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UARTLS_dr_b = 0,
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UARTLS_dr_m = 0x00000001,
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UARTLS_oe_b = 1,
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UARTLS_oe_m = 0x00000002,
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UARTLS_pe_b = 2,
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UARTLS_pe_m = 0x00000004,
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UARTLS_fe_b = 3,
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UARTLS_fe_m = 0x00000008,
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UARTLS_bi_b = 4,
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UARTLS_bi_m = 0x00000010,
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UARTLS_thr_b = 5,
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UARTLS_thr_m = 0x00000020,
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UARTLS_te_b = 6,
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UARTLS_te_m = 0x00000040,
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UARTLS_rfe_b = 7,
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UARTLS_rfe_m = 0x00000080,
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UARTMS_dcts_b = 0,
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UARTMS_dcts_m = 0x00000001,
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UARTMS_ddsr_b = 1,
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UARTMS_ddsr_m = 0x00000002,
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UARTMS_teri_b = 2,
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UARTMS_teri_m = 0x00000004,
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UARTMS_ddcd_b = 3,
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UARTMS_ddcd_m = 0x00000008,
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UARTMS_cts_b = 4,
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UARTMS_cts_m = 0x00000010,
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UARTMS_dsr_b = 5,
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UARTMS_dsr_m = 0x00000020,
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UARTMS_ri_b = 6,
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UARTMS_ri_m = 0x00000040,
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UARTMS_dcd_b = 7,
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UARTMS_dcd_m = 0x00000080,
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} ;
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#endif // __IDT_UART_H__
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