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7b820da93e
Patch-by: Vince Huang <axishero@foxmail.com> git-svn-id: svn://svn.openwrt.org/openwrt/trunk@31608 3c298f89-4303-0410-b956-a3cf2f4a3e73
155 lines
3.9 KiB
C
155 lines
3.9 KiB
C
/*
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* TP-LINK TL-WR1041 v2 board support
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*
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* Copyright (C) 2010-2012 Gabor Juhos <juhosg@openwrt.org>
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* Copyright (C) 2011-2012 Anan Huang <axishero@foxmail.com>
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*
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* This program is free software; you can redistribute it and/or modify it
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* under the terms of the GNU General Public License version 2 as published
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* by the Free Software Foundation.
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*/
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#include <linux/pci.h>
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#include <linux/phy.h>
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#include <linux/platform_device.h>
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#include <linux/ath9k_platform.h>
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#include <linux/ar8216_platform.h>
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#include <asm/mach-ath79/ar71xx_regs.h>
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#include "common.h"
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#include "dev-ap9x-pci.h"
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#include "dev-eth.h"
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#include "dev-gpio-buttons.h"
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#include "dev-leds-gpio.h"
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#include "dev-m25p80.h"
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#include "dev-spi.h"
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#include "dev-wmac.h"
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#include "machtypes.h"
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#define TL_WR1041NV2_GPIO_BTN_RESET 14
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#define TL_WR1041NV2_GPIO_LED_WPS 13
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#define TL_WR1041NV2_GPIO_LED_WLAN 11
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#define TL_WR1041NV2_GPIO_LED_SYSTEM 12
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#define TL_WR1041NV2_KEYS_POLL_INTERVAL 20 /* msecs */
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#define TL_WR1041NV2_KEYS_DEBOUNCE_INTERVAL (3 * TL_WR1041NV2_KEYS_POLL_INTERVAL)
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#define TL_WR1041NV2_PCIE_CALDATA_OFFSET 0x5000
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static const char *tl_wr1041nv2_part_probes[] = {
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"tp-link",
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NULL,
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};
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static struct flash_platform_data tl_wr1041nv2_flash_data = {
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.part_probes = tl_wr1041nv2_part_probes,
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};
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static struct gpio_led tl_wr1041nv2_leds_gpio[] __initdata = {
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{
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.name = "tp-link:green:system",
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.gpio = TL_WR1041NV2_GPIO_LED_SYSTEM,
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.active_low = 1,
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}, {
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.name = "tp-link:green:wps",
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.gpio = TL_WR1041NV2_GPIO_LED_WPS,
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.active_low = 1,
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}, {
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.name = "tp-link:green:wlan",
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.gpio = TL_WR1041NV2_GPIO_LED_WLAN,
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.active_low = 1,
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}
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};
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static struct gpio_keys_button tl_wr1041nv2_gpio_keys[] __initdata = {
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{
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.desc = "reset",
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.type = EV_KEY,
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.code = KEY_RESTART,
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.debounce_interval = TL_WR1041NV2_KEYS_DEBOUNCE_INTERVAL,
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.gpio = TL_WR1041NV2_GPIO_BTN_RESET,
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.active_low = 1,
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}
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};
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static struct ar8327_pad_cfg db120_ar8327_pad0_cfg = {
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.mode = AR8327_PAD_MAC_RGMII,
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.txclk_delay_en = true,
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.rxclk_delay_en = true,
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.txclk_delay_sel = AR8327_CLK_DELAY_SEL1,
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.rxclk_delay_sel = AR8327_CLK_DELAY_SEL2,
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};
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static struct ar8327_platform_data db120_ar8327_data = {
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.pad0_cfg = &db120_ar8327_pad0_cfg,
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.cpuport_cfg = {
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.force_link = 1,
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.speed = AR8327_PORT_SPEED_1000,
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.duplex = 1,
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.txpause = 1,
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.rxpause = 1,
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}
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};
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static struct mdio_board_info db120_mdio0_info[] = {
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{
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.bus_id = "ag71xx-mdio.0",
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.phy_addr = 0,
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.platform_data = &db120_ar8327_data,
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},
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};
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static void __init db120_gmac_setup(void)
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{
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void __iomem *base;
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u32 t;
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base = ioremap(AR934X_GMAC_BASE, AR934X_GMAC_SIZE);
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t = __raw_readl(base + AR934X_GMAC_REG_ETH_CFG);
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t &= ~(AR934X_ETH_CFG_RGMII_GMAC0 | AR934X_ETH_CFG_MII_GMAC0 |
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AR934X_ETH_CFG_GMII_GMAC0 | AR934X_ETH_CFG_SW_ONLY_MODE);
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t |= AR934X_ETH_CFG_RGMII_GMAC0 | AR934X_ETH_CFG_SW_ONLY_MODE;
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__raw_writel(t, base + AR934X_GMAC_REG_ETH_CFG);
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iounmap(base);
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}
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static void __init tl_wr1041nv2_setup(void)
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{
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u8 *mac = (u8 *) KSEG1ADDR(0x1f01fc00);
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u8 *ee = (u8 *) KSEG1ADDR(0x1fff1000);
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ath79_register_m25p80(&tl_wr1041nv2_flash_data);
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ath79_register_leds_gpio(-1, ARRAY_SIZE(tl_wr1041nv2_leds_gpio),
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tl_wr1041nv2_leds_gpio);
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ath79_register_gpio_keys_polled(-1, TL_WR1041NV2_KEYS_POLL_INTERVAL,
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ARRAY_SIZE(tl_wr1041nv2_gpio_keys),
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tl_wr1041nv2_gpio_keys);
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ath79_register_wmac(ee, mac);
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db120_gmac_setup();
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ath79_register_mdio(1, 0x0);
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ath79_register_mdio(0, 0x0);
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ath79_init_mac(ath79_eth0_data.mac_addr, mac, 1);
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mdiobus_register_board_info(db120_mdio0_info,
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ARRAY_SIZE(db120_mdio0_info));
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/* GMAC0 is connected to an AR8327 switch */
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ath79_eth0_data.phy_if_mode = PHY_INTERFACE_MODE_RGMII;
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ath79_eth0_data.phy_mask = BIT(0);
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ath79_eth0_data.mii_bus_dev = &ath79_mdio0_device.dev;
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ath79_eth0_pll_data.pll_1000 = 0x06000000;
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ath79_register_eth(0);
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}
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MIPS_MACHINE(ATH79_MACH_TL_WR1041N_V2, "TL-WR1041N-v2",
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"TP-LINK TL-WR1041N v2", tl_wr1041nv2_setup);
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