mirror of
git://projects.qi-hardware.com/openwrt-xburst.git
synced 2024-11-28 18:30:37 +02:00
dc3d3f1c49
it's basically also provided by ingenic and nativly based on 2.6.27, adjusted to fit into the OpenWrt-environment
164 lines
3.8 KiB
C
Executable File
164 lines
3.8 KiB
C
Executable File
#ifndef __JZ4750_MMC_H__
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#define __JZ4750_MMC_H__
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#define MMC_CLOCK_SLOW 400000 /* 400 kHz for initial setup */
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#define MMC_CLOCK_FAST 20000000 /* 20 MHz for maximum for normal operation */
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#define SD_CLOCK_FAST 24000000 /* 24 MHz for SD Cards */
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#define SD_CLOCK_HIGH 24000000 /* 24 MHz for SD Cards */
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#define MMC_NO_ERROR 0
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#define NR_SG 1
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#ifdef CONFIG_MSC0_JZ4750
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#define MSC_ID 0
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#define MSC_HOTPLUG_IRQ MSC0_HOTPLUG_IRQ
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#define IRQ_MSC IRQ_MSC0
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#define DMA_ID_MSC_RX DMA_ID_MSC0_RX
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#define DMA_ID_MSC_TX DMA_ID_MSC0_TX
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#define MSC_HOTPLUG_PIN MSC0_HOTPLUG_PIN
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#define ACTIVE_LOW_MSC_CD ACTIVE_LOW_MSC0_CD
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#else
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#define MSC_ID 1
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#define MSC_HOTPLUG_IRQ MSC1_HOTPLUG_IRQ
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#define IRQ_MSC IRQ_MSC1
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#define DMA_ID_MSC_RX DMA_ID_MSC1_RX
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#define DMA_ID_MSC_TX DMA_ID_MSC1_TX
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#define MSC_HOTPLUG_PIN MSC1_HOTPLUG_PIN
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#define ACTIVE_LOW_MSC_CD ACTIVE_LOW_MSC1_CD
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#endif
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#define MSC_1BIT_BUS 0
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#define MSC_4BIT_BUS 1
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#define MSC_8BIT_BUS 2
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#define SZ_4K 0x00001000
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#ifdef CONFIG_MSC0_JZ4750
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#define __msc0_init_io() \
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do { \
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__gpio_as_output(GPIO_SD0_VCC_EN_N); \
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__gpio_as_input(GPIO_SD0_CD_N); \
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} while (0)
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#define __msc0_enable_power() \
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do { \
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__gpio_clear_pin(GPIO_SD0_VCC_EN_N); \
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} while (0)
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#define __msc0_disable_power() \
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do { \
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__gpio_set_pin(GPIO_SD0_VCC_EN_N); \
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} while (0)
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#if ACTIVE_LOW_MSC0_CD == 1 /* work when cd is low */
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#define __msc0_card_detected(s) \
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({ \
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int detected = 1; \
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if (__gpio_get_pin(GPIO_SD0_CD_N)) \
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detected = 0; \
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detected; \
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})
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#else
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#define __msc0_card_detected(s) \
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({ \
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int detected = 0; \
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if (__gpio_get_pin(GPIO_SD0_CD_N)) \
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detected = 1; \
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detected; \
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})
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#endif /*ACTIVE_LOW_MSC0_CD*/
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#endif
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#ifdef CONFIG_MSC1_JZ4750
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#define __msc1_init_io() \
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do { \
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__gpio_as_output(GPIO_SD1_VCC_EN_N); \
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/* __gpio_as_input(GPIO_SD1_CD_N);*/ \
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} while (0)
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#define __msc1_enable_power() \
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do { \
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__gpio_clear_pin(GPIO_SD1_VCC_EN_N); \
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} while (0)
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#define __msc1_disable_power() \
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do { \
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__gpio_set_pin(GPIO_SD1_VCC_EN_N); \
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} while (0)
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#if ACTIVE_LOW_MSC1_CD == 1 /* work when cd is low */
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#define __msc1_card_detected(s) \
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({ \
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int detected = 1; \
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if (__gpio_get_pin(GPIO_SD1_CD_N)) \
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detected = 0; \
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detected; \
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})
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#else
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#define __msc1_card_detected(s) \
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({ \
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int detected = 0; \
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if (__gpio_get_pin(GPIO_SD1_CD_N)) \
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detected = 1; \
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detected; \
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})
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#endif /*ACTIVE_LOW_MSC1_CD*/
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#endif
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struct jz_mmc_host {
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struct mmc_host *mmc;
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spinlock_t lock;
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struct {
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int len;
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int dir;
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} dma;
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struct {
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int index;
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int offset;
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int len;
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} pio;
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int irq;
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unsigned int clkrt;
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unsigned int cmdat;
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unsigned int imask;
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unsigned int power_mode;
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struct jz_mmc_platform_data *pdata;
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struct mmc_request *mrq;
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struct mmc_command *cmd;
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struct mmc_data *data;
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dma_addr_t sg_dma;
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struct jzsoc_dma_desc *sg_cpu;
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unsigned int dma_len;
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unsigned int dma_dir;
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};
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#define MMC_IRQ_MASK() \
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do { \
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REG_MSC_IMASK(MSC_ID) = 0xffff; \
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REG_MSC_IREG(MSC_ID) = 0xffff; \
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} while (0)
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typedef struct jzsoc_dma_desc {
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volatile u32 ddadr; /* Points to the next descriptor + flags */
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volatile u32 dsadr; /* DSADR value for the current transfer */
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volatile u32 dtadr; /* DTADR value for the current transfer */
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volatile u32 dcmd; /* DCMD value for the current transfer */
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} jzsoc_dma_desc;
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#include <linux/interrupt.h>
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struct device;
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struct mmc_host;
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struct jz_mmc_platform_data {
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unsigned int ocr_mask; /* available voltages */
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unsigned long detect_delay; /* delay in jiffies before detecting cards after interrupt */
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int (*init)(struct device *, irq_handler_t , void *);
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int (*get_ro)(struct device *);
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void (*setpower)(struct device *, unsigned int);
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void (*exit)(struct device *, void *);
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};
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#endif /* __JZ4750_MMC_H__ */
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