mirror of
git://projects.qi-hardware.com/openwrt-xburst.git
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git-svn-id: svn://svn.openwrt.org/openwrt/trunk@16547 3c298f89-4303-0410-b956-a3cf2f4a3e73
554 lines
17 KiB
Diff
554 lines
17 KiB
Diff
From 7b5b08d99d5362e9c36fd7d42d6c06c2a848266c Mon Sep 17 00:00:00 2001
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From: Kurt Mahan <kmahan@freescale.com>
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Date: Sun, 9 Dec 2007 02:21:19 -0700
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Subject: [PATCH] Update EDMA.
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LTIBName: m5445x-edma-update
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Signed-off-by: Kurt Mahan <kmahan@freescale.com>
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---
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drivers/spi/coldfire_edma.c | 261 +++++++++++++++++++++++---------------
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include/asm-m68k/coldfire_edma.h | 9 +-
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include/asm-m68k/mcf5445x_edma.h | 28 +++-
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3 files changed, 188 insertions(+), 110 deletions(-)
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--- a/drivers/spi/coldfire_edma.c
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+++ b/drivers/spi/coldfire_edma.c
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@@ -20,76 +20,91 @@
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#include <linux/cdev.h>
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#include <linux/seq_file.h>
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#include <linux/proc_fs.h>
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+#ifdef CONFIG_M54455
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#include <asm/mcf5445x_edma.h>
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#include <asm/mcf5445x_intc.h>
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+#endif /* CONFIG_M54455 */
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#include <asm/coldfire_edma.h>
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-
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-/* callback handler data for each TCD */
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+/*
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+ * Callback handler data for each TCD
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+ */
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struct edma_isr_record {
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- edma_irq_handler irq_handler; /* interrupt handler */
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- edma_error_handler error_handler; /* error interrupt handler */
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- void* dev; /* device used for the channel */
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- int allocated; /* busy flag */
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- spinlock_t *lock; /* spin lock (if needs to be locked in interrupt) */
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- const char* device_id; /* device id string, used in proc file system */
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+ edma_irq_handler irq_handler; /* interrupt handler */
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+ edma_error_handler error_handler; /* error interrupt handler */
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+ void *arg; /* argument to pass back */
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+ int allocated; /* busy flag */
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+ spinlock_t *lock; /* spin lock (optional) */
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+ const char *device_id; /* dev id string, used in procfs */
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};
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-/* device structure */
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+/*
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+ * Device structure
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+ */
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struct coldfire_edma_dev {
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- struct cdev cdev; /* character device */
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- struct edma_isr_record dma_interrupt_handlers[EDMA_CHANNELS]; /* channel handlers */
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+ struct cdev cdev; /* character device */
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+ struct edma_isr_record dma_interrupt_handlers[EDMA_CHANNELS];
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};
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/* allocated major device number */
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static int coldfire_dma_major;
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+
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/* device driver structure */
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-static struct coldfire_edma_dev* devp = NULL;
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+static struct coldfire_edma_dev *devp = NULL;
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/* device driver file operations */
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struct file_operations coldfire_edma_fops = {
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.owner = THIS_MODULE,
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};
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-/* eDMA channel interrupt handler */
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+/**
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+ * dmaisr - eDMA channel interrupt handler
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+ * @irq: interrupt number
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+ * @dev_id: argument
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+ */
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static int dmaisr(int irq, void *dev_id)
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{
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int channel = irq - EDMA_INT_CONTROLLER_BASE - EDMA_INT_CHANNEL_BASE;
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int result = IRQ_HANDLED;
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- if (devp!=NULL && devp->dma_interrupt_handlers[channel].lock) {
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- spin_lock(devp->dma_interrupt_handlers[channel].lock);
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- }
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+ if ((devp != NULL) &&
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+ (devp->dma_interrupt_handlers[channel].irq_handler)) {
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+ /* call user irq handler */
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+ if (devp->dma_interrupt_handlers[channel].lock)
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+ spin_lock(devp->dma_interrupt_handlers[channel].lock);
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+
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+ result = devp->dma_interrupt_handlers[channel].irq_handler(
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+ channel, devp->dma_interrupt_handlers[channel].arg);
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- if (devp!=NULL && devp->dma_interrupt_handlers[channel].irq_handler) {
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- result = devp->dma_interrupt_handlers[channel].irq_handler(channel,
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- devp->dma_interrupt_handlers[channel].dev);
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+ if (devp->dma_interrupt_handlers[channel].lock)
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+ spin_unlock(devp->dma_interrupt_handlers[channel].lock);
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} else {
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+ /* no irq handler so just ack it */
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confirm_edma_interrupt_handled(channel);
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- printk(EDMA_DRIVER_NAME ": No handler for DMA channel %d\n", channel);
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- }
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-
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- if (devp!=NULL && devp->dma_interrupt_handlers[channel].lock) {
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- spin_unlock(devp->dma_interrupt_handlers[channel].lock);
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+ printk(EDMA_DRIVER_NAME ": No handler for DMA channel %d\n",
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+ channel);
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}
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return result;
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}
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-/* eDMA error interrupt handler */
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+/**
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+ * dma_error_isr - eDMA error interrupt handler
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+ * @irq: interrupt number
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+ * @dev_id: argument
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+ */
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static int dma_error_isr(int irq, void* dev_id)
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{
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u16 err;
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int i;
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err = MCF_EDMA_ERR;
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- for (i=0;i<EDMA_CHANNELS;i++) {
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+ for (i=0; i<EDMA_CHANNELS; i++) {
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if (err & (1<<i)) {
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- if (devp!=NULL && devp->dma_interrupt_handlers[i].error_handler) {
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- devp->dma_interrupt_handlers[i].error_handler(i, devp->dma_interrupt_handlers[i].dev);
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- } else {
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+ if (devp!=NULL && devp->dma_interrupt_handlers[i].error_handler)
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+ devp->dma_interrupt_handlers[i].error_handler(i, devp->dma_interrupt_handlers[i].arg);
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+ else
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printk(KERN_WARNING EDMA_DRIVER_NAME ": DMA error on channel %d\n", i);
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- }
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}
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}
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@@ -97,11 +112,26 @@ static int dma_error_isr(int irq, void*
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return IRQ_HANDLED;
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}
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-/* sets channel parameters */
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+/**
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+ * set_edma_params - Set transfer control descriptor (TCD)
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+ * @channel: channel number
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+ * @source: source address
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+ * @dest: destination address
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+ * @attr: attributes
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+ * @soff: source offset
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+ * @nbytes: number of bytes to be transfered in minor loop
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+ * @slast: last source address adjustment
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+ * @citer: major loop count
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+ * @biter: beginning minor loop count
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+ * @doff: destination offset
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+ * @dlast_sga: last destination address adjustment
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+ * @major_int: generate interrupt after each major loop
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+ * @disable_req: disable DMA request after major loop
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+ */
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void set_edma_params(int channel, u32 source, u32 dest,
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- u32 attr, u32 soff, u32 nbytes, u32 slast,
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- u32 citer, u32 biter, u32 doff, u32 dlast_sga,
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- int major_int, int disable_req)
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+ u32 attr, u32 soff, u32 nbytes, u32 slast,
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+ u32 citer, u32 biter, u32 doff, u32 dlast_sga,
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+ int major_int, int disable_req)
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{
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if (channel<0 || channel>EDMA_CHANNELS)
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@@ -117,45 +147,56 @@ void set_edma_params(int channel, u32 so
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MCF_EDMA_TCD_BITER(channel)=MCF_EDMA_TCD_BITER_BITER(biter);
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MCF_EDMA_TCD_DOFF(channel) = MCF_EDMA_TCD_DOFF_DOFF(doff);
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MCF_EDMA_TCD_DLAST_SGA(channel) = MCF_EDMA_TCD_DLAST_SGA_DLAST_SGA(dlast_sga);
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+
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/* interrupt at the end of major loop */
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- if (major_int) {
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+ if (major_int)
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MCF_EDMA_TCD_CSR(channel) |= MCF_EDMA_TCD_CSR_INT_MAJOR;
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- } else {
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+ else
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MCF_EDMA_TCD_CSR(channel) &= ~MCF_EDMA_TCD_CSR_INT_MAJOR;
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- }
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+
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/* disable request at the end of major loop of transfer or not*/
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- if (disable_req) {
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+ if (disable_req)
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MCF_EDMA_TCD_CSR(channel) |= MCF_EDMA_TCD_CSR_D_REQ;
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- } else {
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+ else
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MCF_EDMA_TCD_CSR(channel) &= ~MCF_EDMA_TCD_CSR_D_REQ;
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- }
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-
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}
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EXPORT_SYMBOL(set_edma_params);
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-/* init eDMA controller */
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+/**
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+ * init_edma - Initialize the eDMA controller
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+ */
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void init_edma(void)
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{
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MCF_EDMA_CR = 0;
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}
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EXPORT_SYMBOL(init_edma);
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-/* request eDMA channel */
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+/**
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+ * request_edma_channel - Request an eDMA channel
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+ * @channel: channel number
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+ * @handler: dma handler
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+ * @error_handler: dma error handler
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+ * @arg: argument to pass back
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+ * @lock: optional spinlock to hold over interrupt
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+ * @device_id: device id
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+ *
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+ * Returns 0 if success or a negative value if failure
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+ */
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int request_edma_channel(int channel,
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- edma_irq_handler handler,
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- edma_error_handler error_handler,
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- void* dev,
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- spinlock_t *lock,
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- const char* device_id )
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+ edma_irq_handler handler,
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+ edma_error_handler error_handler,
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+ void *arg,
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+ spinlock_t *lock,
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+ const char *device_id )
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{
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if (devp!=NULL && channel>=0 && channel<=EDMA_CHANNELS) {
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- if (devp->dma_interrupt_handlers[channel].allocated) {
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+ if (devp->dma_interrupt_handlers[channel].allocated)
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return -EBUSY;
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- }
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+
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devp->dma_interrupt_handlers[channel].allocated = 1;
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devp->dma_interrupt_handlers[channel].irq_handler = handler;
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devp->dma_interrupt_handlers[channel].error_handler = error_handler;
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- devp->dma_interrupt_handlers[channel].dev = dev;
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+ devp->dma_interrupt_handlers[channel].arg = arg;
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devp->dma_interrupt_handlers[channel].lock = lock;
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devp->dma_interrupt_handlers[channel].device_id = device_id;
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return 0;
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@@ -164,16 +205,22 @@ int request_edma_channel(int channel,
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}
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EXPORT_SYMBOL(request_edma_channel);
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-/* free eDMA channel */
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-int free_edma_channel(int channel, void* dev)
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+/**
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+ * free_edma_channel - Free the edma channel
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+ * @channel: channel number
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+ * @arg: argument created with
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+ *
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+ * Returns 0 if success or a negative value if failure
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+ */
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+int free_edma_channel(int channel, void *arg)
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{
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if (devp!=NULL && channel>=0 && channel<=EDMA_CHANNELS) {
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if (devp->dma_interrupt_handlers[channel].allocated) {
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- if (devp->dma_interrupt_handlers[channel].dev != dev) {
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+ if (devp->dma_interrupt_handlers[channel].arg != arg)
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return -EBUSY;
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- }
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+
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devp->dma_interrupt_handlers[channel].allocated = 0;
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- devp->dma_interrupt_handlers[channel].dev = NULL;
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+ devp->dma_interrupt_handlers[channel].arg = NULL;
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devp->dma_interrupt_handlers[channel].irq_handler = NULL;
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devp->dma_interrupt_handlers[channel].error_handler = NULL;
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devp->dma_interrupt_handlers[channel].lock = NULL;
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@@ -184,7 +231,9 @@ int free_edma_channel(int channel, void*
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}
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EXPORT_SYMBOL(free_edma_channel);
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-/* clean-up device driver allocated resources */
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+/**
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+ * coldfire_edma_cleanup - cleanup driver allocated resources
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+ */
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static void coldfire_edma_cleanup(void)
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{
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dev_t devno;
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@@ -192,13 +241,10 @@ static void coldfire_edma_cleanup(void)
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/* free interrupts/memory */
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if (devp) {
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- for (i=0;i<EDMA_CHANNELS;i++)
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- {
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- MCF_INTC0_SIMR = EDMA_INT_CHANNEL_BASE+i;
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- free_irq(EDMA_INT_CHANNEL_BASE+EDMA_INT_CONTROLLER_BASE+i, devp);
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- }
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- MCF_INTC0_SIMR = EDMA_INT_CHANNEL_BASE+EDMA_CHANNELS;
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- free_irq(EDMA_INT_CHANNEL_BASE+EDMA_INT_CONTROLLER_BASE+EDMA_CHANNELS, devp);
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+ for (i=0; i<EDMA_CHANNELS; i++)
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+ free_irq(EDMA_INT_BASE+i, devp);
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+
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+ free_irq(EDMA_INT_BASE+EDMA_INT_ERR, devp);
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cdev_del(&devp->cdev);
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kfree(devp);
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}
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@@ -209,30 +255,42 @@ static void coldfire_edma_cleanup(void)
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}
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#ifdef CONFIG_PROC_FS
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-/* proc file system support */
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+/*
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+ * proc file system support
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+ */
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#define FREE_CHANNEL "free"
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#define DEVICE_UNKNOWN "device unknown"
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+/**
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+ * proc_edma_show - print out proc info
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+ * @m: seq_file
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+ * @v:
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+ */
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static int proc_edma_show(struct seq_file *m, void *v)
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{
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int i;
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- if (devp==NULL) return 0;
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+ if (devp == NULL)
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+ return 0;
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for (i = 0 ; i < EDMA_CHANNELS ; i++) {
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if (devp->dma_interrupt_handlers[i].allocated) {
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if (devp->dma_interrupt_handlers[i].device_id)
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- seq_printf(m, "%2d: %s\n", i, devp->dma_interrupt_handlers[i].device_id);
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+ seq_printf(m, "%2d: %s\n", i, devp->dma_interrupt_handlers[i].device_id);
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else
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seq_printf(m, "%2d: %s\n", i, DEVICE_UNKNOWN);
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- } else {
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+ } else
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seq_printf(m, "%2d: %s\n", i, FREE_CHANNEL);
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- }
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}
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return 0;
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}
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+/**
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+ * proc_edma_open - open the proc file
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+ * @inode: inode ptr
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+ * @file: file ptr
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+ */
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static int proc_edma_open(struct inode *inode, struct file *file)
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{
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return single_open(file, proc_edma_show, NULL);
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@@ -245,6 +303,9 @@ static const struct file_operations proc
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.release = single_release,
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};
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+/**
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+ * proc_edma_init - initialize proc filesystem
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+ */
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static int __init proc_edma_init(void)
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{
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struct proc_dir_entry *e;
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@@ -258,7 +319,9 @@ static int __init proc_edma_init(void)
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#endif
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-/* initializes device driver */
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+/**
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+ * coldfire_edma_init - eDMA module init
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+ */
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static int __init coldfire_edma_init(void)
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{
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dev_t dev;
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@@ -267,8 +330,9 @@ static int __init coldfire_edma_init(voi
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/* allocate free major number */
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result = alloc_chrdev_region(&dev, DMA_DEV_MINOR, 1, EDMA_DRIVER_NAME);
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- if (result<0) {
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- printk(KERN_WARNING EDMA_DRIVER_NAME": can't get major %d\n", result);
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+ if (result < 0) {
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+ printk(KERN_WARNING EDMA_DRIVER_NAME": can't get major %d\n",
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+ result);
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return result;
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}
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coldfire_dma_major = MAJOR(dev);
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@@ -280,71 +344,68 @@ static int __init coldfire_edma_init(voi
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goto fail;
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}
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- /* init handlers (no handlers for beggining) */
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- for (i=0;i<EDMA_CHANNELS;i++) {
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+ /* init handlers (no handlers for beginning) */
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+ for (i = 0; i < EDMA_CHANNELS; i++) {
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devp->dma_interrupt_handlers[i].irq_handler = NULL;
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devp->dma_interrupt_handlers[i].error_handler = NULL;
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- devp->dma_interrupt_handlers[i].dev = NULL;
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+ devp->dma_interrupt_handlers[i].arg = NULL;
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devp->dma_interrupt_handlers[i].allocated = 0;
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devp->dma_interrupt_handlers[i].lock = NULL;
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devp->dma_interrupt_handlers[i].device_id = NULL;
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}
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- /* register char device */
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+ /* register char device */
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cdev_init(&devp->cdev, &coldfire_edma_fops);
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devp->cdev.owner = THIS_MODULE;
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devp->cdev.ops = &coldfire_edma_fops;
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result = cdev_add(&devp->cdev, dev, 1);
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if (result) {
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- printk(KERN_NOTICE EDMA_DRIVER_NAME": Error %d adding coldfire-dma device\n", result);
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+ printk(KERN_NOTICE EDMA_DRIVER_NAME
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+ ": Error %d adding coldfire-dma device\n", result);
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result = -ENODEV;
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goto fail;
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}
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/* request/enable irq for each eDMA channel */
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- for (i=0;i<EDMA_CHANNELS;i++)
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- {
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- result = request_irq(EDMA_INT_CHANNEL_BASE+EDMA_INT_CONTROLLER_BASE+i,
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- dmaisr, SA_INTERRUPT, EDMA_DRIVER_NAME, devp);
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+ for (i = 0; i < EDMA_CHANNELS;i++) {
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+ result = request_irq(EDMA_INT_BASE + i,
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+ dmaisr, IRQF_DISABLED,
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+ EDMA_DRIVER_NAME, devp);
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if (result) {
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- printk(KERN_WARNING EDMA_DRIVER_NAME": Cannot request irq %d\n",
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- EDMA_INT_CHANNEL_BASE+EDMA_INT_CONTROLLER_BASE+i);
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+ printk(KERN_WARNING EDMA_DRIVER_NAME
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+ ": Cannot request irq %d\n",
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+ (EDMA_INT_BASE + EDMA_INT_ERR+i));
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result = -EBUSY;
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goto fail;
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}
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-
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- MCF_INTC0_ICR(EDMA_INT_CHANNEL_BASE+i) = EDMA_IRQ_LEVEL;
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- MCF_INTC0_CIMR = EDMA_INT_CHANNEL_BASE+i;
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-
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}
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- /* request error interrupt */
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- result = request_irq(EDMA_INT_CHANNEL_BASE + EDMA_INT_CONTROLLER_BASE + EDMA_CHANNELS,
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- dma_error_isr, SA_INTERRUPT, EDMA_DRIVER_NAME, devp);
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+ /* request error interrupt */
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+ result = request_irq(EDMA_INT_BASE + EDMA_INT_ERR,
|
|
+ dma_error_isr, IRQF_DISABLED,
|
|
+ EDMA_DRIVER_NAME, devp);
|
|
if (result) {
|
|
- printk(KERN_WARNING EDMA_DRIVER_NAME": Cannot request irq %d\n",
|
|
- EDMA_INT_CHANNEL_BASE+EDMA_INT_CONTROLLER_BASE+EDMA_CHANNELS);
|
|
+ printk(KERN_WARNING EDMA_DRIVER_NAME
|
|
+ ": Cannot request irq %d\n",
|
|
+ (EDMA_INT_BASE + EDMA_INT_ERR));
|
|
result = -EBUSY;
|
|
goto fail;
|
|
}
|
|
|
|
- /* enable error interrupt in interrupt controller */
|
|
- MCF_INTC0_ICR(EDMA_INT_CHANNEL_BASE+EDMA_CHANNELS) = EDMA_IRQ_LEVEL;
|
|
- MCF_INTC0_CIMR = EDMA_INT_CHANNEL_BASE+EDMA_CHANNELS;
|
|
-
|
|
#ifdef CONFIG_PROC_FS
|
|
proc_edma_init();
|
|
#endif
|
|
|
|
printk(EDMA_DRIVER_NAME ": initialized successfully\n");
|
|
-
|
|
return 0;
|
|
fail:
|
|
coldfire_edma_cleanup();
|
|
return result;
|
|
-
|
|
}
|
|
|
|
+/**
|
|
+ * coldfire_edma_exit - eDMA module exit
|
|
+ */
|
|
static void __exit coldfire_edma_exit(void)
|
|
{
|
|
coldfire_edma_cleanup();
|
|
@@ -354,5 +415,5 @@ module_init(coldfire_edma_init);
|
|
module_exit(coldfire_edma_exit);
|
|
|
|
MODULE_LICENSE("GPL");
|
|
-MODULE_AUTHOR("Yaroslav Vinogradov, Freescale Inc.");
|
|
-MODULE_DESCRIPTION("eDMA library for Coldfire 5445x");
|
|
+MODULE_AUTHOR("Freescale Semiconductor, Inc.");
|
|
+MODULE_DESCRIPTION("eDMA library for Coldfire M5445x");
|
|
--- a/include/asm-m68k/coldfire_edma.h
|
|
+++ b/include/asm-m68k/coldfire_edma.h
|
|
@@ -20,11 +20,14 @@
|
|
#define EDMA_DRIVER_NAME "ColdFire-eDMA"
|
|
#define DMA_DEV_MINOR 1
|
|
|
|
+#ifdef CONFIG_M54455
|
|
#define EDMA_INT_CHANNEL_BASE 8
|
|
#define EDMA_INT_CONTROLLER_BASE 64
|
|
+#define EDMA_INT_BASE (EDMA_INT_CHANNEL_BASE + \
|
|
+ EDMA_INT_CONTROLLER_BASE)
|
|
#define EDMA_CHANNELS 16
|
|
-
|
|
-#define EDMA_IRQ_LEVEL 5
|
|
+#define EDMA_INT_ERR 16 /* edma error interrupt */
|
|
+#endif /* CONFIG_M54455 */
|
|
|
|
typedef irqreturn_t (*edma_irq_handler)(int, void *);
|
|
typedef void (*edma_error_handler)(int, void *);
|
|
@@ -38,7 +41,7 @@ typedef void (*edma_error_handler)(int,
|
|
* nbytes - number of bytes to be transfered in minor loop
|
|
* slast - last source address adjustment
|
|
* citer - major loop count
|
|
- * biter - beggining minor loop count
|
|
+ * biter - begining minor loop count
|
|
* doff - destination offset
|
|
* dlast_sga - last destination address adjustment
|
|
* major_int - generate interrupt after each major loop
|
|
--- a/include/asm-m68k/mcf5445x_edma.h
|
|
+++ b/include/asm-m68k/mcf5445x_edma.h
|
|
@@ -11,11 +11,27 @@
|
|
#ifndef __MCF5445X_EDMA_H__
|
|
#define __MCF5445X_EDMA_H__
|
|
|
|
-/*********************************************************************
|
|
-*
|
|
-* Enhanced DMA (EDMA)
|
|
-*
|
|
-*********************************************************************/
|
|
+/*
|
|
+ * Enhanced DMA (EDMA)
|
|
+ */
|
|
+
|
|
+/* Channels */
|
|
+#define MCF_EDMA_CHAN_DREQ0 0 /* External DMA request 0 */
|
|
+#define MCF_EDMA_CHAN_DREQ1 1 /* External DMA request 1 */
|
|
+#define MCF_EDMA_CHAN_UART0_RX 2 /* UART0 Receive */
|
|
+#define MCF_EDMA_CHAN_UART0_TX 3 /* UART0 Transmit */
|
|
+#define MCF_EDMA_CHAN_UART1_RX 4 /* UART1 Receive */
|
|
+#define MCF_EDMA_CHAN_UART1_TX 5 /* UART1 Transmit */
|
|
+#define MCF_EDMA_CHAN_UART2_RX 6 /* UART2 Receive */
|
|
+#define MCF_EDMA_CHAN_UART2_TX 7 /* UART2 Transmit */
|
|
+#define MCF_EDMA_CHAN_TIMER0 8 /* Timer 0 / SSI0 Rx */
|
|
+#define MCF_EDMA_CHAN_TIMER1 9 /* Timer 1 / SSI1 Rx */
|
|
+#define MCF_EDMA_CHAN_TIMER2 10 /* Timer 2 / SSI0 Tx */
|
|
+#define MCF_EDMA_CHAN_TIMER3 11 /* Timer 3 / SSI1 Tx */
|
|
+#define MCF_EDMA_CHAN_DSPI_RX 12 /* DSPI Receive */
|
|
+#define MCF_EDMA_CHAN_DSPI_TX 13 /* DSPI Transmit */
|
|
+#define MCF_EDMA_CHAN_ATA_RX 14 /* ATA Receive */
|
|
+#define MCF_EDMA_CHAN_ATA_TX 15 /* ATA Transmit */
|
|
|
|
/* Register read/write macros */
|
|
#define MCF_EDMA_CR MCF_REG32(0xFC044000)
|
|
@@ -1453,6 +1469,4 @@
|
|
#define MCF_EDMA_TCD15_CSR_LINKCH(x) (((x)&0x003F)<<8)
|
|
#define MCF_EDMA_TCD15_CSR_BWC(x) (((x)&0x0003)<<14)
|
|
|
|
-/********************************************************************/
|
|
-
|
|
#endif /* __MCF5445X_EDMA_H__ */
|