mirror of
git://projects.qi-hardware.com/openwrt-xburst.git
synced 2024-09-12 13:52:26 +03:00
git-svn-id: svn://svn.openwrt.org/openwrt/trunk@14512 3c298f89-4303-0410-b956-a3cf2f4a3e73
468 lines
14 KiB
Diff
468 lines
14 KiB
Diff
Port of the SPI-GPIO driver from 2.6.29-rc4.
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--mb
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--- /dev/null
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+++ b/drivers/spi/spi_gpio.c
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@@ -0,0 +1,360 @@
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+/*
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+ * spi_gpio.c - SPI master driver using generic bitbanged GPIO
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+ *
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+ * Copyright (C) 2006,2008 David Brownell
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+ *
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+ * This program is free software; you can redistribute it and/or modify
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+ * it under the terms of the GNU General Public License as published by
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+ * the Free Software Foundation; either version 2 of the License, or
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+ * (at your option) any later version.
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+ *
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+ * This program is distributed in the hope that it will be useful,
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+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
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+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
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+ * GNU General Public License for more details.
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+ *
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+ * You should have received a copy of the GNU General Public License
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+ * along with this program; if not, write to the Free Software
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+ * Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA.
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+ */
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+#include <linux/kernel.h>
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+#include <linux/init.h>
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+#include <linux/platform_device.h>
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+#include <linux/gpio.h>
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+
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+#include <linux/spi/spi.h>
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+#include <linux/spi/spi_bitbang.h>
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+#include <linux/spi/spi_gpio.h>
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+
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+
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+/*
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+ * This bitbanging SPI master driver should help make systems usable
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+ * when a native hardware SPI engine is not available, perhaps because
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+ * its driver isn't yet working or because the I/O pins it requires
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+ * are used for other purposes.
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+ *
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+ * platform_device->driver_data ... points to spi_gpio
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+ *
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+ * spi->controller_state ... reserved for bitbang framework code
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+ * spi->controller_data ... holds chipselect GPIO
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+ *
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+ * spi->master->dev.driver_data ... points to spi_gpio->bitbang
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+ */
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+
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+struct spi_gpio {
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+ struct spi_bitbang bitbang;
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+ struct spi_gpio_platform_data pdata;
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+ struct platform_device *pdev;
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+};
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+
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+/*----------------------------------------------------------------------*/
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+
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+/*
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+ * Because the overhead of going through four GPIO procedure calls
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+ * per transferred bit can make performance a problem, this code
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+ * is set up so that you can use it in either of two ways:
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+ *
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+ * - The slow generic way: set up platform_data to hold the GPIO
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+ * numbers used for MISO/MOSI/SCK, and issue procedure calls for
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+ * each of them. This driver can handle several such busses.
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+ *
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+ * - The quicker inlined way: only helps with platform GPIO code
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+ * that inlines operations for constant GPIOs. This can give
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+ * you tight (fast!) inner loops, but each such bus needs a
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+ * new driver. You'll define a new C file, with Makefile and
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+ * Kconfig support; the C code can be a total of six lines:
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+ *
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+ * #define DRIVER_NAME "myboard_spi2"
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+ * #define SPI_MISO_GPIO 119
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+ * #define SPI_MOSI_GPIO 120
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+ * #define SPI_SCK_GPIO 121
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+ * #define SPI_N_CHIPSEL 4
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+ * #include "spi_gpio.c"
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+ */
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+
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+#ifndef DRIVER_NAME
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+#define DRIVER_NAME "spi_gpio"
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+
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+#define GENERIC_BITBANG /* vs tight inlines */
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+
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+/* all functions referencing these symbols must define pdata */
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+#define SPI_MISO_GPIO ((pdata)->miso)
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+#define SPI_MOSI_GPIO ((pdata)->mosi)
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+#define SPI_SCK_GPIO ((pdata)->sck)
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+
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+#define SPI_N_CHIPSEL ((pdata)->num_chipselect)
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+
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+#endif
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+
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+/*----------------------------------------------------------------------*/
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+
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+static inline const struct spi_gpio_platform_data * __pure
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+spi_to_pdata(const struct spi_device *spi)
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+{
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+ const struct spi_bitbang *bang;
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+ const struct spi_gpio *spi_gpio;
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+
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+ bang = spi_master_get_devdata(spi->master);
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+ spi_gpio = container_of(bang, struct spi_gpio, bitbang);
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+ return &spi_gpio->pdata;
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+}
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+
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+/* this is #defined to avoid unused-variable warnings when inlining */
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+#define pdata spi_to_pdata(spi)
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+
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+static inline void setsck(const struct spi_device *spi, int is_on)
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+{
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+ gpio_set_value(SPI_SCK_GPIO, is_on);
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+}
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+
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+static inline void setmosi(const struct spi_device *spi, int is_on)
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+{
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+ gpio_set_value(SPI_MOSI_GPIO, is_on);
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+}
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+
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+static inline int getmiso(const struct spi_device *spi)
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+{
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+ return gpio_get_value(SPI_MISO_GPIO);
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+}
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+
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+#undef pdata
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+
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+/*
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+ * NOTE: this clocks "as fast as we can". It "should" be a function of the
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+ * requested device clock. Software overhead means we usually have trouble
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+ * reaching even one Mbit/sec (except when we can inline bitops), so for now
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+ * we'll just assume we never need additional per-bit slowdowns.
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+ */
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+#define spidelay(nsecs) do {} while (0)
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+
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+#define EXPAND_BITBANG_TXRX
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+#include <linux/spi/spi_bitbang.h>
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+
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+/*
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+ * These functions can leverage inline expansion of GPIO calls to shrink
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+ * costs for a txrx bit, often by factors of around ten (by instruction
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+ * count). That is particularly visible for larger word sizes, but helps
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+ * even with default 8-bit words.
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+ *
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+ * REVISIT overheads calling these functions for each word also have
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+ * significant performance costs. Having txrx_bufs() calls that inline
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+ * the txrx_word() logic would help performance, e.g. on larger blocks
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+ * used with flash storage or MMC/SD. There should also be ways to make
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+ * GCC be less stupid about reloading registers inside the I/O loops,
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+ * even without inlined GPIO calls; __attribute__((hot)) on GCC 4.3?
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+ */
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+
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+static u32 spi_gpio_txrx_word_mode0(struct spi_device *spi,
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+ unsigned nsecs, u32 word, u8 bits)
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+{
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+ return bitbang_txrx_be_cpha0(spi, nsecs, 0, word, bits);
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+}
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+
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+static u32 spi_gpio_txrx_word_mode1(struct spi_device *spi,
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+ unsigned nsecs, u32 word, u8 bits)
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+{
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+ return bitbang_txrx_be_cpha1(spi, nsecs, 0, word, bits);
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+}
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+
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+static u32 spi_gpio_txrx_word_mode2(struct spi_device *spi,
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+ unsigned nsecs, u32 word, u8 bits)
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+{
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+ return bitbang_txrx_be_cpha0(spi, nsecs, 1, word, bits);
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+}
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+
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+static u32 spi_gpio_txrx_word_mode3(struct spi_device *spi,
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+ unsigned nsecs, u32 word, u8 bits)
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+{
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+ return bitbang_txrx_be_cpha1(spi, nsecs, 1, word, bits);
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+}
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+
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+/*----------------------------------------------------------------------*/
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+
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+static void spi_gpio_chipselect(struct spi_device *spi, int is_active)
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+{
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+ unsigned long cs = (unsigned long) spi->controller_data;
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+
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+ /* set initial clock polarity */
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+ if (is_active)
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+ setsck(spi, spi->mode & SPI_CPOL);
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+
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+ /* SPI is normally active-low */
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+ gpio_set_value(cs, (spi->mode & SPI_CS_HIGH) ? is_active : !is_active);
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+}
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+
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+static int spi_gpio_setup(struct spi_device *spi)
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+{
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+ unsigned long cs = (unsigned long) spi->controller_data;
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+ int status = 0;
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+
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+ if (spi->bits_per_word > 32)
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+ return -EINVAL;
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+
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+ if (!spi->controller_state) {
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+ status = gpio_request(cs, spi->dev.bus_id);
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+ if (status)
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+ return status;
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+ status = gpio_direction_output(cs, spi->mode & SPI_CS_HIGH);
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+ }
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+ if (!status)
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+ status = spi_bitbang_setup(spi);
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+ if (status) {
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+ if (!spi->controller_state)
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+ gpio_free(cs);
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+ }
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+ return status;
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+}
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+
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+static void spi_gpio_cleanup(struct spi_device *spi)
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+{
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+ unsigned long cs = (unsigned long) spi->controller_data;
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+
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+ gpio_free(cs);
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+ spi_bitbang_cleanup(spi);
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+}
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+
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+static int __init spi_gpio_alloc(unsigned pin, const char *label, bool is_in)
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+{
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+ int value;
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+
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+ value = gpio_request(pin, label);
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+ if (value == 0) {
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+ if (is_in)
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+ value = gpio_direction_input(pin);
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+ else
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+ value = gpio_direction_output(pin, 0);
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+ }
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+ return value;
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+}
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+
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+static int __init
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+spi_gpio_request(struct spi_gpio_platform_data *pdata, const char *label)
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+{
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+ int value;
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+
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+ /* NOTE: SPI_*_GPIO symbols may reference "pdata" */
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+
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+ value = spi_gpio_alloc(SPI_MOSI_GPIO, label, false);
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+ if (value)
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+ goto done;
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+
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+ value = spi_gpio_alloc(SPI_MISO_GPIO, label, true);
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+ if (value)
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+ goto free_mosi;
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+
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+ value = spi_gpio_alloc(SPI_SCK_GPIO, label, false);
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+ if (value)
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+ goto free_miso;
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+
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+ goto done;
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+
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+free_miso:
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+ gpio_free(SPI_MISO_GPIO);
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+free_mosi:
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+ gpio_free(SPI_MOSI_GPIO);
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+done:
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+ return value;
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+}
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+
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+static int __init spi_gpio_probe(struct platform_device *pdev)
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+{
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+ int status;
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+ struct spi_master *master;
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+ struct spi_gpio *spi_gpio;
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+ struct spi_gpio_platform_data *pdata;
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+
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+ pdata = pdev->dev.platform_data;
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+#ifdef GENERIC_BITBANG
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+ if (!pdata || !pdata->num_chipselect)
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+ return -ENODEV;
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+#endif
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+
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+ status = spi_gpio_request(pdata, dev_name(&pdev->dev));
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+ if (status < 0)
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+ return status;
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+
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+ master = spi_alloc_master(&pdev->dev, sizeof *spi_gpio);
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+ if (!master) {
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+ status = -ENOMEM;
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+ goto gpio_free;
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+ }
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+ spi_gpio = spi_master_get_devdata(master);
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+ platform_set_drvdata(pdev, spi_gpio);
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+
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+ spi_gpio->pdev = pdev;
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+ if (pdata)
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+ spi_gpio->pdata = *pdata;
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+
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+ master->bus_num = pdev->id;
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+ master->num_chipselect = SPI_N_CHIPSEL;
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+ master->setup = spi_gpio_setup;
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+ master->cleanup = spi_gpio_cleanup;
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+
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+ spi_gpio->bitbang.master = spi_master_get(master);
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+ spi_gpio->bitbang.chipselect = spi_gpio_chipselect;
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+ spi_gpio->bitbang.txrx_word[SPI_MODE_0] = spi_gpio_txrx_word_mode0;
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+ spi_gpio->bitbang.txrx_word[SPI_MODE_1] = spi_gpio_txrx_word_mode1;
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+ spi_gpio->bitbang.txrx_word[SPI_MODE_2] = spi_gpio_txrx_word_mode2;
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+ spi_gpio->bitbang.txrx_word[SPI_MODE_3] = spi_gpio_txrx_word_mode3;
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+ spi_gpio->bitbang.setup_transfer = spi_bitbang_setup_transfer;
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+ spi_gpio->bitbang.flags = SPI_CS_HIGH;
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+
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+ status = spi_bitbang_start(&spi_gpio->bitbang);
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+ if (status < 0) {
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+ spi_master_put(spi_gpio->bitbang.master);
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+gpio_free:
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+ gpio_free(SPI_MISO_GPIO);
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+ gpio_free(SPI_MOSI_GPIO);
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+ gpio_free(SPI_SCK_GPIO);
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+ spi_master_put(master);
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+ }
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+
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+ return status;
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+}
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+
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+static int __exit spi_gpio_remove(struct platform_device *pdev)
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+{
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+ struct spi_gpio *spi_gpio;
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+ struct spi_gpio_platform_data *pdata;
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+ int status;
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+
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+ spi_gpio = platform_get_drvdata(pdev);
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+ pdata = pdev->dev.platform_data;
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+
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+ /* stop() unregisters child devices too */
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+ status = spi_bitbang_stop(&spi_gpio->bitbang);
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+ spi_master_put(spi_gpio->bitbang.master);
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+
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+ platform_set_drvdata(pdev, NULL);
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+
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+ gpio_free(SPI_MISO_GPIO);
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+ gpio_free(SPI_MOSI_GPIO);
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+ gpio_free(SPI_SCK_GPIO);
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+
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+ return status;
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+}
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+
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+MODULE_ALIAS("platform:" DRIVER_NAME);
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+
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+static struct platform_driver spi_gpio_driver = {
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+ .driver.name = DRIVER_NAME,
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+ .driver.owner = THIS_MODULE,
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+ .remove = __exit_p(spi_gpio_remove),
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+};
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+
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+static int __init spi_gpio_init(void)
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+{
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+ return platform_driver_probe(&spi_gpio_driver, spi_gpio_probe);
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+}
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+module_init(spi_gpio_init);
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+
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+static void __exit spi_gpio_exit(void)
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+{
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+ platform_driver_unregister(&spi_gpio_driver);
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+}
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+module_exit(spi_gpio_exit);
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+
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+
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+MODULE_DESCRIPTION("SPI master driver using generic bitbanged GPIO ");
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+MODULE_AUTHOR("David Brownell");
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+MODULE_LICENSE("GPL");
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--- /dev/null
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+++ b/include/linux/spi/spi_gpio.h
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@@ -0,0 +1,60 @@
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+#ifndef __LINUX_SPI_GPIO_H
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+#define __LINUX_SPI_GPIO_H
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+
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+/*
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+ * For each bitbanged SPI bus, set up a platform_device node with:
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+ * - name "spi_gpio"
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+ * - id the same as the SPI bus number it implements
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+ * - dev.platform data pointing to a struct spi_gpio_platform_data
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+ *
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+ * Or, see the driver code for information about speedups that are
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+ * possible on platforms that support inlined access for GPIOs (no
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+ * spi_gpio_platform_data is used).
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+ *
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+ * Use spi_board_info with these busses in the usual way, being sure
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+ * that the controller_data being the GPIO used for each device's
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+ * chipselect:
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+ *
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+ * static struct spi_board_info ... [] = {
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+ * ...
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+ * // this slave uses GPIO 42 for its chipselect
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+ * .controller_data = (void *) 42,
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+ * ...
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+ * // this one uses GPIO 86 for its chipselect
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+ * .controller_data = (void *) 86,
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+ * ...
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+ * };
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+ *
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+ * If the bitbanged bus is later switched to a "native" controller,
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+ * that platform_device and controller_data should be removed.
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+ */
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+
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+/**
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+ * struct spi_gpio_platform_data - parameter for bitbanged SPI master
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+ * @sck: number of the GPIO used for clock output
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+ * @mosi: number of the GPIO used for Master Output, Slave In (MOSI) data
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+ * @miso: number of the GPIO used for Master Input, Slave Output (MISO) data
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+ * @num_chipselect: how many slaves to allow
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+ *
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+ * All GPIO signals used with the SPI bus managed through this driver
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+ * (chipselects, MOSI, MISO, SCK) must be configured as GPIOs, instead
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+ * of some alternate function.
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+ *
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+ * It can be convenient to use this driver with pins that have alternate
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+ * functions associated with a "native" SPI controller if a driver for that
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+ * controller is not available, or is missing important functionality.
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+ *
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+ * On platforms which can do so, configure MISO with a weak pullup unless
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+ * there's an external pullup on that signal. That saves power by avoiding
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+ * floating signals. (A weak pulldown would save power too, but many
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+ * drivers expect to see all-ones data as the no slave "response".)
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+ */
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+struct spi_gpio_platform_data {
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+ unsigned sck;
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+ unsigned mosi;
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+ unsigned miso;
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+
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+ u16 num_chipselect;
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+};
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+
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+#endif /* __LINUX_SPI_GPIO_H */
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--- a/drivers/spi/Kconfig
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+++ b/drivers/spi/Kconfig
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@@ -100,6 +100,22 @@ config SPI_BUTTERFLY
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inexpensive battery powered microcontroller evaluation board.
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This same cable can be used to flash new firmware.
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+config SPI_GPIO
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+ tristate "GPIO-based bitbanging SPI Master"
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+ depends on GENERIC_GPIO
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+ select SPI_BITBANG
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+ help
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+ This simple GPIO bitbanging SPI master uses the arch-neutral GPIO
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+ interface to manage MOSI, MISO, SCK, and chipselect signals. SPI
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+ slaves connected to a bus using this driver are configured as usual,
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+ except that the spi_board_info.controller_data holds the GPIO number
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+ for the chipselect used by this controller driver.
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+
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+ Note that this driver often won't achieve even 1 Mbit/sec speeds,
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+ making it unusually slow for SPI. If your platform can inline
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+ GPIO operations, you should be able to leverage that for better
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+ speed with a custom version of this driver; see the source code.
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+
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config SPI_IMX
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tristate "Freescale iMX SPI controller"
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depends on ARCH_IMX && EXPERIMENTAL
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--- a/drivers/spi/Makefile
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+++ b/drivers/spi/Makefile
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@@ -16,6 +16,7 @@ obj-$(CONFIG_SPI_BFIN) += spi_bfin5xx.
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obj-$(CONFIG_SPI_BITBANG) += spi_bitbang.o
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obj-$(CONFIG_SPI_AU1550) += au1550_spi.o
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obj-$(CONFIG_SPI_BUTTERFLY) += spi_butterfly.o
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+obj-$(CONFIG_SPI_GPIO) += spi_gpio.o
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obj-$(CONFIG_SPI_IMX) += spi_imx.o
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obj-$(CONFIG_SPI_LM70_LLP) += spi_lm70llp.o
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obj-$(CONFIG_SPI_PXA2XX) += pxa2xx_spi.o
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