mirror of
git://projects.qi-hardware.com/openwrt-xburst.git
synced 2024-12-21 12:55:31 +02:00
b9fbaf87aa
git-svn-id: svn://svn.openwrt.org/openwrt/trunk@26227 3c298f89-4303-0410-b956-a3cf2f4a3e73
78 lines
2.7 KiB
Diff
78 lines
2.7 KiB
Diff
--- a/drivers/staging/octeon/cvmx-helper-board.c
|
|
+++ b/drivers/staging/octeon/cvmx-helper-board.c
|
|
@@ -90,7 +90,7 @@ int cvmx_helper_board_get_mii_address(in
|
|
case CVMX_BOARD_TYPE_KODAMA:
|
|
case CVMX_BOARD_TYPE_EBH3100:
|
|
case CVMX_BOARD_TYPE_HIKARI:
|
|
- case CVMX_BOARD_TYPE_CN3010_EVB_HS5:
|
|
+ //case CVMX_BOARD_TYPE_CN3010_EVB_HS5: /* hack for the WNDAP330 */
|
|
case CVMX_BOARD_TYPE_CN3005_EVB_HS5:
|
|
case CVMX_BOARD_TYPE_CN3020_EVB_HS5:
|
|
/*
|
|
@@ -103,6 +103,12 @@ int cvmx_helper_board_get_mii_address(in
|
|
return 9;
|
|
else
|
|
return -1;
|
|
+ case CVMX_BOARD_TYPE_CN3010_EVB_HS5: /* hack for the WNDAP330 */
|
|
+ /* We have only one port, using GMII */
|
|
+ if (ipd_port == 0)
|
|
+ return 9;
|
|
+ else
|
|
+ return -1;
|
|
case CVMX_BOARD_TYPE_NAC38:
|
|
/* Board has 8 RGMII ports PHYs are 0-7 */
|
|
if ((ipd_port >= 0) && (ipd_port < 4))
|
|
@@ -213,7 +219,7 @@ cvmx_helper_link_info_t __cvmx_helper_bo
|
|
result.s.speed = 1000;
|
|
return result;
|
|
case CVMX_BOARD_TYPE_EBH3100:
|
|
- case CVMX_BOARD_TYPE_CN3010_EVB_HS5:
|
|
+ //case CVMX_BOARD_TYPE_CN3010_EVB_HS5: /* hack for the WNDAP330 */
|
|
case CVMX_BOARD_TYPE_CN3005_EVB_HS5:
|
|
case CVMX_BOARD_TYPE_CN3020_EVB_HS5:
|
|
/* Port 1 on these boards is always Gigabit */
|
|
@@ -225,6 +231,9 @@ cvmx_helper_link_info_t __cvmx_helper_bo
|
|
}
|
|
/* Fall through to the generic code below */
|
|
break;
|
|
+ case CVMX_BOARD_TYPE_CN3010_EVB_HS5: /* hack for the WNDAP330 */
|
|
+ is_broadcom_phy = 1;
|
|
+ break;
|
|
case CVMX_BOARD_TYPE_CUST_NB5:
|
|
/* Port 1 on these boards is always Gigabit */
|
|
if (ipd_port == 1) {
|
|
--- a/drivers/staging/octeon/cvmx-helper-rgmii.c
|
|
+++ b/drivers/staging/octeon/cvmx-helper-rgmii.c
|
|
@@ -66,13 +66,15 @@ int __cvmx_helper_rgmii_probe(int interf
|
|
cvmx_dprintf("ERROR: RGMII initialize called in "
|
|
"SPI interface\n");
|
|
} else if (OCTEON_IS_MODEL(OCTEON_CN31XX)
|
|
- || OCTEON_IS_MODEL(OCTEON_CN30XX)
|
|
+ //|| OCTEON_IS_MODEL(OCTEON_CN30XX)
|
|
|| OCTEON_IS_MODEL(OCTEON_CN50XX)) {
|
|
/*
|
|
* On these chips "type" says we're in
|
|
* GMII/MII mode. This limits us to 2 ports
|
|
*/
|
|
num_ports = 2;
|
|
+ } else if (OCTEON_IS_MODEL(OCTEON_CN30XX)) {
|
|
+ num_ports = 1;
|
|
} else {
|
|
cvmx_dprintf("ERROR: Unsupported Octeon model in %s\n",
|
|
__func__);
|
|
--- a/arch/mips/pci/pci-octeon.c
|
|
+++ b/arch/mips/pci/pci-octeon.c
|
|
@@ -217,9 +217,11 @@ const char *octeon_get_pci_interrupts(vo
|
|
/* This is really the NAC38 */
|
|
return "AAAAADABAAAAAAAAAAAAAAAAAAAAAAAA";
|
|
case CVMX_BOARD_TYPE_EBH3100:
|
|
- case CVMX_BOARD_TYPE_CN3010_EVB_HS5:
|
|
+ //case CVMX_BOARD_TYPE_CN3010_EVB_HS5:
|
|
case CVMX_BOARD_TYPE_CN3005_EVB_HS5:
|
|
return "AAABAAAAAAAAAAAAAAAAAAAAAAAAAAAA";
|
|
+ case CVMX_BOARD_TYPE_CN3010_EVB_HS5:
|
|
+ return "AAAAAAAAAAAAAABAAAAAAAAAAAAAAABA";
|
|
case CVMX_BOARD_TYPE_BBGW_REF:
|
|
return "AABCD";
|
|
case CVMX_BOARD_TYPE_THUNDER:
|