mirror of
git://projects.qi-hardware.com/openwrt-xburst.git
synced 2024-11-28 13:39:42 +02:00
fc54b9bf15
(stable-branch of Openmoko) git-svn-id: svn://svn.openwrt.org/openwrt/trunk@13613 3c298f89-4303-0410-b956-a3cf2f4a3e73
454 lines
11 KiB
Diff
454 lines
11 KiB
Diff
From 23b8a1e056b74101ae9d51ccbab2d208e46c01a4 Mon Sep 17 00:00:00 2001
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From: mokopatches <mokopatches@openmoko.org>
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Date: Fri, 4 Apr 2008 11:34:06 +0100
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Subject: [PATCH] hxd8-core.patch
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This patch adds another machine, the FIC HXD8
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---
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arch/arm/mach-s3c2440/Kconfig | 6 +
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arch/arm/mach-s3c2440/Makefile | 1 +
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arch/arm/mach-s3c2440/mach-hxd8.c | 381 +++++++++++++++++++++++++++++++++++
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include/asm-arm/arch-s3c2440/hxd8.h | 16 ++
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4 files changed, 404 insertions(+), 0 deletions(-)
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create mode 100644 arch/arm/mach-s3c2440/mach-hxd8.c
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create mode 100644 include/asm-arm/arch-s3c2440/hxd8.h
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diff --git a/arch/arm/mach-s3c2440/Kconfig b/arch/arm/mach-s3c2440/Kconfig
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index f1915bd..6798d9c 100644
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--- a/arch/arm/mach-s3c2440/Kconfig
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+++ b/arch/arm/mach-s3c2440/Kconfig
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@@ -67,6 +67,12 @@ config SMDK2440_CPU2440
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default y if ARCH_S3C2440
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select CPU_S3C2440
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+config MACH_HXD8
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+ bool "FIC HXD8"
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+ select CPU_S3C2440
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+ select SENSORS_PCF50606
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+ help
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+ Say Y here if you are using the FIC Neo1973 GSM Phone
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endmenu
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diff --git a/arch/arm/mach-s3c2440/Makefile b/arch/arm/mach-s3c2440/Makefile
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index c81ed62..6f590d4 100644
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--- a/arch/arm/mach-s3c2440/Makefile
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+++ b/arch/arm/mach-s3c2440/Makefile
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@@ -21,3 +21,4 @@ obj-$(CONFIG_MACH_OSIRIS) += mach-osiris.o
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obj-$(CONFIG_MACH_RX3715) += mach-rx3715.o
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obj-$(CONFIG_ARCH_S3C2440) += mach-smdk2440.o
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obj-$(CONFIG_MACH_NEXCODER_2440) += mach-nexcoder.o
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+obj-$(CONFIG_MACH_HXD8) += mach-hxd8.o
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diff --git a/arch/arm/mach-s3c2440/mach-hxd8.c b/arch/arm/mach-s3c2440/mach-hxd8.c
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new file mode 100644
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index 0000000..3400ed3
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--- /dev/null
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+++ b/arch/arm/mach-s3c2440/mach-hxd8.c
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@@ -0,0 +1,381 @@
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+/* linux/arch/arm/mach-s3c2440/mach-hxd8.c
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+ *
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+ * S3C2440 Machine Support for the FIC HXD8
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+ *
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+ * Copyright (c) 2007 OpenMoko, Inc.
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+ * Author: Harald Welte <laforge@openmoko.org>
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+ * All rights reserved.
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+ *
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+ * This program is free software; you can redistribute it and/or
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+ * modify it under the terms of the GNU General Public License as
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+ * published by the Free Software Foundation; either version 2 of
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+ * the License, or (at your option) any later version.
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+ *
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+ * This program is distributed in the hope that it will be useful,
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+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
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+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
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+ * GNU General Public License for more details.
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+ *
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+ * You should have received a copy of the GNU General Public License
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+ * along with this program; if not, write to the Free Software
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+ * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
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+ * MA 02111-1307 USA
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+ *
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+ */
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+
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+#include <linux/kernel.h>
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+#include <linux/types.h>
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+#include <linux/interrupt.h>
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+#include <linux/list.h>
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+#include <linux/timer.h>
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+#include <linux/init.h>
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+#include <linux/workqueue.h>
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+#include <linux/serial_core.h>
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+#include <linux/platform_device.h>
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+#include <linux/mmc/host.h>
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+
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+#include <linux/mtd/mtd.h>
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+#include <linux/mtd/nand.h>
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+#include <linux/mtd/nand_ecc.h>
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+#include <linux/mtd/partitions.h>
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+
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+#include <linux/pcf50606.h>
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+
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+#include <asm/mach/arch.h>
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+#include <asm/mach/map.h>
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+#include <asm/mach/irq.h>
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+
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+#include <asm/hardware.h>
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+#include <asm/hardware/iomd.h>
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+#include <asm/io.h>
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+#include <asm/irq.h>
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+#include <asm/mach-types.h>
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+
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+//#include <asm/debug-ll.h>
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+#include <asm/arch/regs-gpio.h>
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+#include <asm/arch/regs-lcd.h>
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+#include <asm/arch/idle.h>
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+#include <asm/arch/fb.h>
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+#include <asm/arch/mci.h>
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+#include <asm/arch/ts.h>
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+#include <asm/arch/spi.h>
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+#include <asm/arch/spi-gpio.h>
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+#include <asm/arch/usb-control.h>
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+
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+#include <asm/arch-s3c2440/hxd8.h>
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+#include <asm/arch/gta01.h>
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+
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+//#include "s3c2410.h"
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+//#include "s3c2440.h"
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+//#include "clock.h"
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+#include <asm/plat-s3c/regs-serial.h>
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+#include <asm/plat-s3c/nand.h>
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+#include <asm/plat-s3c24xx/devs.h>
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+#include <asm/plat-s3c24xx/cpu.h>
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+#include <asm/plat-s3c24xx/pm.h>
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+#include <asm/plat-s3c24xx/udc.h>
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+
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+static struct map_desc hxd8_iodesc[] __initdata = {
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+ /* ISA IO Space map (memory space selected by A24) */
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+
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+ {
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+ .virtual = (u32)S3C24XX_VA_ISA_WORD,
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+ .pfn = __phys_to_pfn(S3C2410_CS2),
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+ .length = 0x10000,
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+ .type = MT_DEVICE,
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+ }, {
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+ .virtual = (u32)S3C24XX_VA_ISA_WORD + 0x10000,
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+ .pfn = __phys_to_pfn(S3C2410_CS2 + (1<<24)),
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+ .length = SZ_4M,
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+ .type = MT_DEVICE,
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+ }, {
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+ .virtual = (u32)S3C24XX_VA_ISA_BYTE,
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+ .pfn = __phys_to_pfn(S3C2410_CS2),
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+ .length = 0x10000,
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+ .type = MT_DEVICE,
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+ }, {
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+ .virtual = (u32)S3C24XX_VA_ISA_BYTE + 0x10000,
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+ .pfn = __phys_to_pfn(S3C2410_CS2 + (1<<24)),
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+ .length = SZ_4M,
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+ .type = MT_DEVICE,
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+ }
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+};
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+
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+#define UCON S3C2410_UCON_DEFAULT | S3C2410_UCON_UCLK
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+#define ULCON S3C2410_LCON_CS8 | S3C2410_LCON_PNONE | S3C2410_LCON_STOPB
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+#define UFCON S3C2410_UFCON_RXTRIG8 | S3C2410_UFCON_FIFOMODE
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+
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+static struct s3c2410_uartcfg hxd8_uartcfgs[] __initdata = {
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+ [0] = {
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+ .hwport = 0,
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+ .flags = 0,
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+ .ucon = 0x3c5,
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+ .ulcon = 0x03,
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+ .ufcon = 0x51,
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+ },
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+ [1] = {
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+ .hwport = 1,
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+ .flags = 0,
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+ .ucon = 0x3c5,
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+ .ulcon = 0x03,
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+ .ufcon = 0x51,
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+ },
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+ [2] = {
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+ .hwport = 2,
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+ .flags = 0,
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+ .ucon = 0x3c5,
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+ .ulcon = 0x03,
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+ .ufcon = 0x51,
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+ }
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+};
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+
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+static struct s3c2410_nand_set hxd8_nand_sets[] = {
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+ [0] = {
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+ .name = "hxd8-nand",
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+ .nr_chips = 1,
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+ .flags = S3C2410_NAND_BBT,
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+ },
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+ [1] = {
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+ .name = "hxd8-nand-1",
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+ .nr_chips = 1,
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+ .flags = S3C2410_NAND_BBT,
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+ },
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+ [2] = {
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+ .name = "hxd8-nand-2",
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+ .nr_chips = 1,
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+ .flags = S3C2410_NAND_BBT,
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+ },
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+};
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+
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+/* choose a set of timings which should suit most 512Mbit
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+ * chips and beyond.
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+*/
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+
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+static struct s3c2410_platform_nand hxd8_nand_info = {
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+ .tacls = 20,
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+ .twrph0 = 60,
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+ .twrph1 = 20,
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+ .nr_sets = ARRAY_SIZE(hxd8_nand_sets),
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+ .sets = hxd8_nand_sets,
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+};
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+
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+/* PMU configuration */
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+
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+static struct pcf50606_platform_data hxd8_pcf_pdata = {
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+ .used_features = PCF50606_FEAT_EXTON |
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+ PCF50606_FEAT_BBC |
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+ PCF50606_FEAT_WDT |
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+ PCF50606_FEAT_RTC |
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+ PCF50606_FEAT_PWM |
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+ PCF50606_FEAT_PWM_BL |
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+ PCF50606_FEAT_BATVOLT,
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+ .onkey_seconds_required = 5,
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+ .init_brightness = 8,
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+ .rails = {
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+ [PCF50606_REGULATOR_D1REG] = {
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+ .name = "rc_3v3",
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+ .voltage = {
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+ .init = 3300,
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+ .max = 3300,
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+ },
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+ },
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+ [PCF50606_REGULATOR_D2REG] = {
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+ .name = "gps_3v3",
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+ .voltage = {
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+ .init = 3300,
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+ .max = 3300,
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+ },
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+ },
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+ [PCF50606_REGULATOR_D3REG] = {
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+ .name = "io2_3v3",
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+ .voltage = {
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+ .init = 3300,
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+ .max = 3300,
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+ },
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+ },
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+ [PCF50606_REGULATOR_DCD] = {
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+ .name = "core_1v3",
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+ .voltage = {
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+ .init = 1300,
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+ .max = 1500,
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+ },
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+ },
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+ [PCF50606_REGULATOR_DCDE] = {
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+ .name = "io1_3v3",
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+ .voltage = {
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+ .init = 3300,
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+ .max = 3300,
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+ },
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+ },
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+ [PCF50606_REGULATOR_DCUD] = {
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+ .name = "rf_3v3",
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+ .voltage = {
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+ .init = 3300,
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+ .max = 3300,
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+ },
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+ },
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+ [PCF50606_REGULATOR_IOREG] = {
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+ .name = "audio_3v3",
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+ .voltage = {
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+ .init = 3300,
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+ .max = 3300,
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+ },
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+ },
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+ [PCF50606_REGULATOR_LPREG] = {
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+ .name = "lcm_3v3",
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+ .voltage = {
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+ .init = 3300,
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+ .max = 3300,
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+ },
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+ },
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+ },
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+};
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+
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+static struct resource hxd8_pmu_resources[] = {
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+ [0] = {
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+ .flags = IORESOURCE_IRQ,
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+ .start = HXD8_IRQ_PCF50606,
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+ .end = HXD8_IRQ_PCF50606,
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+ },
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+};
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+
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+static struct platform_device hxd8_pmu_dev = {
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+ .name = "pcf50606",
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+ .num_resources = ARRAY_SIZE(hxd8_pmu_resources),
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+ .resource = hxd8_pmu_resources,
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+ .dev = {
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+ .platform_data = &hxd8_pcf_pdata,
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+ },
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+};
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+
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+/* LCD driver info */
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+
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+static struct s3c2410fb_display hxd8_displays[] __initdata = {
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+ {
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+ .type = S3C2410_LCDCON1_TFT,
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+ .width = 480,
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+ .height = 272,
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+ .xres = 480,
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+ .yres = 272,
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+ .bpp = 16,
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+
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+ .pixclock = 40000, /* HCLK/4 */
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+ .left_margin = 2,
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+ .right_margin = 2,
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+ .hsync_len = 41,
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+ .upper_margin = 2,
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+ .lower_margin = 2,
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+ .vsync_len = 10,
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+ .lcdcon5 = S3C2410_LCDCON5_FRM565 |
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+ S3C2410_LCDCON5_INVVLINE |
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+ S3C2410_LCDCON5_INVVFRAME,
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+ },
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+};
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+
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+static struct s3c2410fb_mach_info hxd8_lcd_cfg __initdata = {
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+ .displays = hxd8_displays,
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+ .num_displays = ARRAY_SIZE(hxd8_displays),
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+ .default_display = 1,
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+
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+ .lpcsel = ((0xCE6) & ~7),
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+};
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+
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+static struct platform_device hxd8_pm_gsm_dev = {
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+ .name = "neo1973-pm-gsm",
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+};
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+
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+static void gta01_udc_command(enum s3c2410_udc_cmd_e cmd)
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+{
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+ printk(KERN_DEBUG "%s(%d)\n", __func__, cmd);
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+
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+ switch (cmd) {
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+ case S3C2410_UDC_P_ENABLE:
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+ s3c2410_gpio_setpin(HXD8_GPIO_USB_PULLUP, 1);
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+ break;
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+ case S3C2410_UDC_P_DISABLE:
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+ s3c2410_gpio_setpin(HXD8_GPIO_USB_PULLUP, 0);
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+ break;
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+ case S3C2410_UDC_P_RESET:
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+ /* FIXME! */
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+ break;
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+ default:
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+ break;
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+ }
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+}
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+
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+/* USB Charger */
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+
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+static void hxd8_udc_vbus_draw(unsigned int ma)
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+{
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+ if (ma >= 500) {
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+ /* enable fast charge */
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+ printk(KERN_DEBUG "udc: enabling fast charge\n");
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+ s3c2410_gpio_setpin(HXD8_GPIO_USB_CUR_SEL, 1);
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+ } else {
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+ /* disable fast charge */
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+ printk(KERN_DEBUG "udc: disabling fast charge\n");
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+ s3c2410_gpio_setpin(HXD8_GPIO_USB_CUR_SEL, 0);
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+ }
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+}
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+
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+static struct s3c2410_udc_mach_info hxd8_udc_cfg = {
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+ .vbus_draw = hxd8_udc_vbus_draw,
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+};
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+
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+/* Touch Screen */
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+static struct s3c2410_ts_mach_info hxd8_ts_cfg = {
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+ .delay = 10000,
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+ .presc = 49,
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+ .oversampling_shift = 4,
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+};
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+
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+static struct platform_device *hxd8_devices[] __initdata = {
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+ &s3c_device_usb,
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+ &s3c_device_lcd,
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+ &s3c_device_wdt,
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+ &s3c_device_i2c,
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+ &s3c_device_iis,
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+ &s3c_device_sdi,
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+ &s3c_device_usbgadget,
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+ &s3c_device_nand,
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+ &s3c_device_ts,
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+};
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+
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+static void __init hxd8_map_io(void)
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+{
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+ s3c24xx_init_io(hxd8_iodesc, ARRAY_SIZE(hxd8_iodesc));
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+ s3c24xx_init_clocks(16934400);
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+ s3c24xx_init_uarts(hxd8_uartcfgs, ARRAY_SIZE(hxd8_uartcfgs));
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+}
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+
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+static void __init hxd8_machine_init(void)
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+{
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+ hxd8_udc_cfg.udc_command = gta01_udc_command;
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+ s3c_device_nand.dev.platform_data = &hxd8_nand_info;
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+
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+ s3c24xx_fb_set_platdata(&hxd8_lcd_cfg);
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+
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+ s3c24xx_udc_set_platdata(&hxd8_udc_cfg);
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+ set_s3c2410ts_info(&hxd8_ts_cfg);
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+
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+ //platform_device_register(>a01_button_dev);
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+ platform_device_register(&hxd8_pm_gsm_dev);
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+
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+ platform_device_register(&hxd8_pmu_dev);
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+
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+ platform_add_devices(hxd8_devices, ARRAY_SIZE(hxd8_devices));
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+
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+ s3c2410_pm_init();
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+}
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+
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+MACHINE_START(HXD8, "HXD8")
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+ /* Maintainer: Harald Welte <laforge@openmoko.org> */
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+ .phys_io = S3C2410_PA_UART,
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+ .io_pg_offst = (((u32)S3C24XX_VA_UART) >> 18) & 0xfffc,
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+ .boot_params = S3C2410_SDRAM_PA + 0x100,
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+
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+ .init_irq = s3c24xx_init_irq,
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+ .map_io = hxd8_map_io,
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+ .init_machine = hxd8_machine_init,
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+ .timer = &s3c24xx_timer,
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+MACHINE_END
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diff --git a/include/asm-arm/arch-s3c2440/hxd8.h b/include/asm-arm/arch-s3c2440/hxd8.h
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new file mode 100644
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index 0000000..50e9c11
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--- /dev/null
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+++ b/include/asm-arm/arch-s3c2440/hxd8.h
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@@ -0,0 +1,16 @@
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+#ifndef _HXD8_H
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+#define _HXD8_H
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+
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+#include <asm/arch/regs-gpio.h>
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+#include <asm/arch/irqs.h>
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+
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+#define HXD8v1_SYSTEM_REV 0x00000110
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+
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+#define HXD8_GPIO_USB_CUR_SEL S3C2410_GPA0
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+#define HXD8_GPIO_BACKLIGHT S3C2410_GPB0
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+#define HXD8_GPIO_USB_PULLUP S3C2410_GPB9
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+#define HXD8_GPIO_PCF50606 S3C2410_GPF6
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+
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+#define HXD8_IRQ_PCF50606 IRQ_EINT6
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+
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+#endif
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--
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1.5.6.5
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