mirror of
git://projects.qi-hardware.com/openwrt-xburst.git
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130f029a0c
git-svn-id: svn://svn.openwrt.org/openwrt/trunk@6748 3c298f89-4303-0410-b956-a3cf2f4a3e73
508 lines
14 KiB
C
508 lines
14 KiB
C
/*
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* ADM5120 built in ethernet switch driver
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*
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* Copyright Jeroen Vreeken (pe1rxq@amsat.org), 2005
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*
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* Inspiration for this driver came from the original ADMtek 2.4
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* driver, Copyright ADMtek Inc.
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*/
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#include <linux/autoconf.h>
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#include <linux/module.h>
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#include <linux/kernel.h>
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#include <linux/netdevice.h>
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#include <linux/etherdevice.h>
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#include <linux/skbuff.h>
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#include <linux/errno.h>
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#include <linux/interrupt.h>
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#include <linux/ioport.h>
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#include <asm/mipsregs.h>
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#include <asm/irq.h>
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#include <asm/io.h>
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#include "adm5120sw.h"
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#include "adm5120_info.h"
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MODULE_AUTHOR("Jeroen Vreeken (pe1rxq@amsat.org)");
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MODULE_DESCRIPTION("ADM5120 ethernet switch driver");
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MODULE_LICENSE("GPL");
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/*
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* The ADM5120 uses an internal matrix to determine which ports
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* belong to which VLAN.
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* The default generates a VLAN (and device) for each port
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* (including MII port) and the CPU port is part of all of them.
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*
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* Another example, one big switch and everything mapped to eth0:
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* 0x7f, 0x00, 0x00, 0x00, 0x00, 0x00
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*/
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static unsigned char vlan_matrix[SW_DEVS] = {
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0x41, 0x42, 0x44, 0x48, 0x50, 0x60
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};
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static int adm5120_nrdevs;
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static struct net_device *adm5120_devs[SW_DEVS];
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static struct adm5120_dma
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adm5120_dma_txh_v[ADM5120_DMA_TXH] __attribute__((aligned(16))),
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adm5120_dma_txl_v[ADM5120_DMA_TXL] __attribute__((aligned(16))),
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adm5120_dma_rxh_v[ADM5120_DMA_RXH] __attribute__((aligned(16))),
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adm5120_dma_rxl_v[ADM5120_DMA_RXL] __attribute__((aligned(16))),
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*adm5120_dma_txh,
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*adm5120_dma_txl,
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*adm5120_dma_rxh,
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*adm5120_dma_rxl;
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static struct sk_buff
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*adm5120_skb_rxh[ADM5120_DMA_RXH],
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*adm5120_skb_rxl[ADM5120_DMA_RXL],
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*adm5120_skb_txh[ADM5120_DMA_TXH],
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*adm5120_skb_txl[ADM5120_DMA_TXL];
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static int adm5120_rxhi = 0;
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static int adm5120_rxli = 0;
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/* We don't use high priority tx for now */
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/*static int adm5120_txhi = 0;*/
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static int adm5120_txli = 0;
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static int adm5120_txhit = 0;
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static int adm5120_txlit = 0;
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static int adm5120_if_open = 0;
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static inline void adm5120_set_reg(unsigned int reg, unsigned long val)
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{
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*(volatile unsigned long*)(SW_BASE+reg) = val;
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}
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static inline unsigned long adm5120_get_reg(unsigned int reg)
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{
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return *(volatile unsigned long*)(SW_BASE+reg);
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}
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static inline void adm5120_rxfixup(struct adm5120_dma *dma,
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struct sk_buff **skbl, int num)
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{
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int i;
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/* Resubmit the entire ring */
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for (i=0; i<num; i++) {
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dma[i].status = 0;
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dma[i].cntl = 0;
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dma[i].len = ADM5120_DMA_RXSIZE;
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dma[i].data = ADM5120_DMA_ADDR(skbl[i]->data) |
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ADM5120_DMA_OWN | (i==num-1 ? ADM5120_DMA_RINGEND : 0);
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}
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}
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static inline void adm5120_rx(struct adm5120_dma *dma, struct sk_buff **skbl,
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int *index, int num)
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{
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struct sk_buff *skb, *skbn;
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struct adm5120_sw *priv;
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struct net_device *dev;
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int port, vlan, len;
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while (!(dma[*index].data & ADM5120_DMA_OWN)) {
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port = (dma[*index].status & ADM5120_DMA_PORTID);
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port >>= ADM5120_DMA_PORTSHIFT;
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for (vlan = 0; vlan < adm5120_nrdevs; vlan++) {
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if ((1<<port) & vlan_matrix[vlan])
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break;
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}
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if (vlan == adm5120_nrdevs)
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vlan = 0;
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dev = adm5120_devs[vlan];
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skb = skbl[*index];
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len = (dma[*index].status & ADM5120_DMA_LEN);
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len >>= ADM5120_DMA_LENSHIFT;
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len -= ETH_FCS;
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priv = netdev_priv(dev);
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if (len <= 0 || len > ADM5120_DMA_RXSIZE ||
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dma[*index].status & ADM5120_DMA_FCSERR) {
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priv->stats.rx_errors++;
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skbn = NULL;
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} else {
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skbn = dev_alloc_skb(ADM5120_DMA_RXSIZE+16);
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if (skbn) {
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skb_put(skb, len);
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skb->dev = dev;
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skb->protocol = eth_type_trans(skb, dev);
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skb->ip_summed = CHECKSUM_UNNECESSARY;
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dev->last_rx = jiffies;
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priv->stats.rx_packets++;
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priv->stats.rx_bytes+=len;
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skb_reserve(skbn, 2);
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skbl[*index] = skbn;
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} else {
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printk(KERN_INFO "%s recycling!\n", dev->name);
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}
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}
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dma[*index].status = 0;
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dma[*index].cntl = 0;
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dma[*index].len = ADM5120_DMA_RXSIZE;
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dma[*index].data = ADM5120_DMA_ADDR(skbl[*index]->data) |
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ADM5120_DMA_OWN |
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(num-1==*index ? ADM5120_DMA_RINGEND : 0);
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if (num == ++*index)
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*index = 0;
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if (skbn)
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netif_rx(skb);
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}
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}
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static inline void adm5120_tx(struct adm5120_dma *dma, struct sk_buff **skbl,
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int *index, int num)
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{
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while((dma[*index].data & ADM5120_DMA_OWN) == 0 && skbl[*index]) {
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dev_kfree_skb_irq(skbl[*index]);
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skbl[*index] = NULL;
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if (++*index == num)
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*index = 0;
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}
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}
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static irqreturn_t adm5120_sw_irq(int irq, void *dev_id)
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{
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unsigned long intreg;
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adm5120_set_reg(ADM5120_INT_MASK,
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adm5120_get_reg(ADM5120_INT_MASK) | ADM5120_INTHANDLE);
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intreg = adm5120_get_reg(ADM5120_INT_ST);
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adm5120_set_reg(ADM5120_INT_ST, intreg);
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if (intreg & ADM5120_INT_RXH)
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adm5120_rx(adm5120_dma_rxh, adm5120_skb_rxh, &adm5120_rxhi,
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ADM5120_DMA_RXH);
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if (intreg & ADM5120_INT_HFULL)
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adm5120_rxfixup(adm5120_dma_rxh, adm5120_skb_rxh,
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ADM5120_DMA_RXH);
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if (intreg & ADM5120_INT_RXL)
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adm5120_rx(adm5120_dma_rxl, adm5120_skb_rxl, &adm5120_rxli,
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ADM5120_DMA_RXL);
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if (intreg & ADM5120_INT_LFULL)
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adm5120_rxfixup(adm5120_dma_rxl, adm5120_skb_rxl,
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ADM5120_DMA_RXL);
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if (intreg & ADM5120_INT_TXH)
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adm5120_tx(adm5120_dma_txh, adm5120_skb_txh, &adm5120_txhit,
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ADM5120_DMA_TXH);
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if (intreg & ADM5120_INT_TXL)
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adm5120_tx(adm5120_dma_txl, adm5120_skb_txl, &adm5120_txlit,
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ADM5120_DMA_TXL);
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adm5120_set_reg(ADM5120_INT_MASK,
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adm5120_get_reg(ADM5120_INT_MASK) & ~ADM5120_INTHANDLE);
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return IRQ_HANDLED;
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}
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static void adm5120_set_vlan(char *matrix)
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{
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unsigned long val;
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val = matrix[0] + (matrix[1]<<8) + (matrix[2]<<16) + (matrix[3]<<24);
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adm5120_set_reg(ADM5120_VLAN_GI, val);
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val = matrix[4] + (matrix[5]<<8);
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adm5120_set_reg(ADM5120_VLAN_GII, val);
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}
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static int adm5120_sw_open(struct net_device *dev)
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{
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if (!adm5120_if_open++)
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adm5120_set_reg(ADM5120_INT_MASK,
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adm5120_get_reg(ADM5120_INT_MASK) & ~ADM5120_INTHANDLE);
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netif_start_queue(dev);
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return 0;
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}
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static int adm5120_sw_stop(struct net_device *dev)
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{
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netif_stop_queue(dev);
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if (!--adm5120_if_open)
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adm5120_set_reg(ADM5120_INT_MASK,
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adm5120_get_reg(ADM5120_INT_MASK) | ADM5120_INTMASKALL);
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return 0;
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}
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static int adm5120_sw_tx(struct sk_buff *skb, struct net_device *dev)
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{
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struct adm5120_dma *dma = adm5120_dma_txl;
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struct sk_buff **skbl = adm5120_skb_txl;
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struct adm5120_sw *priv = netdev_priv(dev);
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int *index = &adm5120_txli;
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int num = ADM5120_DMA_TXL;
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int trigger = ADM5120_SEND_TRIG_L;
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dev->trans_start = jiffies;
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if (dma[*index].data & ADM5120_DMA_OWN) {
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dev_kfree_skb(skb);
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priv->stats.tx_dropped++;
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return 0;
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}
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dma[*index].data = ADM5120_DMA_ADDR(skb->data) | ADM5120_DMA_OWN;
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if (*index == num-1)
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dma[*index].data |= ADM5120_DMA_RINGEND;
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dma[*index].status =
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((skb->len<ETH_ZLEN?ETH_ZLEN:skb->len) << ADM5120_DMA_LENSHIFT) |
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(0x1 << priv->port);
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dma[*index].len = skb->len < ETH_ZLEN ? ETH_ZLEN : skb->len;
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priv->stats.tx_packets++;
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priv->stats.tx_bytes += skb->len;
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skbl[*index]=skb;
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if (++*index == num)
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*index = 0;
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adm5120_set_reg(ADM5120_SEND_TRIG, trigger);
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return 0;
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}
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static void adm5120_tx_timeout(struct net_device *dev)
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{
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netif_wake_queue(dev);
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}
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static struct net_device_stats *adm5120_sw_stats(struct net_device *dev)
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{
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return &((struct adm5120_sw *)netdev_priv(dev))->stats;
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}
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static void adm5120_set_multicast_list(struct net_device *dev)
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{
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struct adm5120_sw *priv = netdev_priv(dev);
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int portmask;
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portmask = vlan_matrix[priv->port] & 0x3f;
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if (dev->flags & IFF_PROMISC)
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adm5120_set_reg(ADM5120_CPUP_CONF,
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adm5120_get_reg(ADM5120_CPUP_CONF) &
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~((portmask << ADM5120_DISUNSHIFT) & ADM5120_DISUNALL));
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else
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adm5120_set_reg(ADM5120_CPUP_CONF,
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adm5120_get_reg(ADM5120_CPUP_CONF) |
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(portmask << ADM5120_DISUNSHIFT));
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if (dev->flags & IFF_PROMISC || dev->flags & IFF_ALLMULTI ||
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dev->mc_count)
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adm5120_set_reg(ADM5120_CPUP_CONF,
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adm5120_get_reg(ADM5120_CPUP_CONF) &
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~((portmask << ADM5120_DISMCSHIFT) & ADM5120_DISMCALL));
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else
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adm5120_set_reg(ADM5120_CPUP_CONF,
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adm5120_get_reg(ADM5120_CPUP_CONF) |
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(portmask << ADM5120_DISMCSHIFT));
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}
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static void adm5120_write_mac(struct net_device *dev)
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{
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struct adm5120_sw *priv = netdev_priv(dev);
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unsigned char *mac = dev->dev_addr;
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adm5120_set_reg(ADM5120_MAC_WT1,
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mac[2] | (mac[3]<<8) | (mac[4]<<16) | (mac[5]<<24));
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adm5120_set_reg(ADM5120_MAC_WT0, (priv->port<<3) |
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(mac[0]<<16) | (mac[1]<<24) | ADM5120_MAC_WRITE | ADM5120_VLAN_EN);
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while (!(adm5120_get_reg(ADM5120_MAC_WT0) & ADM5120_MAC_WRITE_DONE));
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}
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static int adm5120_sw_set_mac_address(struct net_device *dev, void *p)
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{
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struct sockaddr *addr = p;
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memcpy(dev->dev_addr, addr->sa_data, dev->addr_len);
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adm5120_write_mac(dev);
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return 0;
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}
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static int adm5120_do_ioctl(struct net_device *dev, struct ifreq *rq, int cmd)
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{
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int err;
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struct adm5120_sw_info info;
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struct adm5120_sw *priv = netdev_priv(dev);
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switch(cmd) {
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case SIOCGADMINFO:
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info.magic = 0x5120;
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info.ports = adm5120_nrdevs;
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info.vlan = priv->port;
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err = copy_to_user(rq->ifr_data, &info, sizeof(info));
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if (err)
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return -EFAULT;
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break;
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case SIOCSMATRIX:
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if (!capable(CAP_NET_ADMIN))
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return -EPERM;
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err = copy_from_user(vlan_matrix, rq->ifr_data,
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sizeof(vlan_matrix));
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if (err)
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return -EFAULT;
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adm5120_set_vlan(vlan_matrix);
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break;
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case SIOCGMATRIX:
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err = copy_to_user(rq->ifr_data, vlan_matrix,
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sizeof(vlan_matrix));
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if (err)
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return -EFAULT;
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break;
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default:
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return -EOPNOTSUPP;
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}
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return 0;
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}
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static void adm5120_dma_tx_init(struct adm5120_dma *dma, struct sk_buff **skb,
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int num)
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{
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memset(dma, 0, sizeof(struct adm5120_dma)*num);
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dma[num-1].data |= ADM5120_DMA_RINGEND;
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memset(skb, 0, sizeof(struct skb*)*num);
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}
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static void adm5120_dma_rx_init(struct adm5120_dma *dma, struct sk_buff **skb,
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int num)
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{
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int i;
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memset(dma, 0, sizeof(struct adm5120_dma)*num);
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for (i=0; i<num; i++) {
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skb[i] = dev_alloc_skb(ADM5120_DMA_RXSIZE+16);
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if (!skb[i]) {
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i=num;
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break;
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}
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skb_reserve(skb[i], 2);
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dma[i].data = ADM5120_DMA_ADDR(skb[i]->data) | ADM5120_DMA_OWN;
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dma[i].cntl = 0;
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dma[i].len = ADM5120_DMA_RXSIZE;
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dma[i].status = 0;
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}
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dma[i-1].data |= ADM5120_DMA_RINGEND;
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}
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static int __init adm5120_sw_init(void)
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{
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int i, err;
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struct net_device *dev;
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err = request_irq(SW_IRQ, adm5120_sw_irq, 0, "ethernet switch", NULL);
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if (err)
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goto out;
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/* MII port? */
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if (adm5120_get_reg(ADM5120_CODE) & ADM5120_CODE_PQFP)
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adm5120_nrdevs = 5;
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/* CFE based devices only have two enet ports */
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else if (adm5120_info.boot_loader == BOOT_LOADER_CFE)
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adm5120_nrdevs = 2;
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else
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adm5120_nrdevs = 6;
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adm5120_set_reg(ADM5120_CPUP_CONF,
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ADM5120_DISCCPUPORT | ADM5120_CRC_PADDING |
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ADM5120_DISUNALL | ADM5120_DISMCALL);
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adm5120_set_reg(ADM5120_PORT_CONF0, ADM5120_ENMC | ADM5120_ENBP);
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adm5120_set_reg(ADM5120_PHY_CNTL2, adm5120_get_reg(ADM5120_PHY_CNTL2) |
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ADM5120_AUTONEG | ADM5120_NORMAL | ADM5120_AUTOMDIX);
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adm5120_set_reg(ADM5120_PHY_CNTL3, adm5120_get_reg(ADM5120_PHY_CNTL3) |
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ADM5120_PHY_NTH);
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adm5120_set_reg(ADM5120_INT_MASK, ADM5120_INTMASKALL);
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adm5120_set_reg(ADM5120_INT_ST, ADM5120_INTMASKALL);
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adm5120_dma_txh = (void *)KSEG1ADDR((u32)adm5120_dma_txh_v);
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adm5120_dma_txl = (void *)KSEG1ADDR((u32)adm5120_dma_txl_v);
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adm5120_dma_rxh = (void *)KSEG1ADDR((u32)adm5120_dma_rxh_v);
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adm5120_dma_rxl = (void *)KSEG1ADDR((u32)adm5120_dma_rxl_v);
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adm5120_dma_tx_init(adm5120_dma_txh, adm5120_skb_txh, ADM5120_DMA_TXH);
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adm5120_dma_tx_init(adm5120_dma_txl, adm5120_skb_txl, ADM5120_DMA_TXL);
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adm5120_dma_rx_init(adm5120_dma_rxh, adm5120_skb_rxh, ADM5120_DMA_RXH);
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adm5120_dma_rx_init(adm5120_dma_rxl, adm5120_skb_rxl, ADM5120_DMA_RXL);
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adm5120_set_reg(ADM5120_SEND_HBADDR, KSEG1ADDR(adm5120_dma_txh));
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adm5120_set_reg(ADM5120_SEND_LBADDR, KSEG1ADDR(adm5120_dma_txl));
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adm5120_set_reg(ADM5120_RECEIVE_HBADDR, KSEG1ADDR(adm5120_dma_rxh));
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|
adm5120_set_reg(ADM5120_RECEIVE_LBADDR, KSEG1ADDR(adm5120_dma_rxl));
|
|
|
|
adm5120_set_vlan(vlan_matrix);
|
|
|
|
for (i=0; i<adm5120_nrdevs; i++) {
|
|
adm5120_devs[i] = alloc_etherdev(sizeof(struct adm5120_sw));
|
|
if (!adm5120_devs[i]) {
|
|
err = -ENOMEM;
|
|
goto out_int;
|
|
}
|
|
|
|
dev = adm5120_devs[i];
|
|
SET_MODULE_OWNER(dev);
|
|
memset(netdev_priv(dev), 0, sizeof(struct adm5120_sw));
|
|
((struct adm5120_sw*)netdev_priv(dev))->port = i;
|
|
dev->base_addr = SW_BASE;
|
|
dev->irq = SW_IRQ;
|
|
dev->open = adm5120_sw_open;
|
|
dev->hard_start_xmit = adm5120_sw_tx;
|
|
dev->stop = adm5120_sw_stop;
|
|
dev->get_stats = adm5120_sw_stats;
|
|
dev->set_multicast_list = adm5120_set_multicast_list;
|
|
dev->do_ioctl = adm5120_do_ioctl;
|
|
dev->tx_timeout = adm5120_tx_timeout;
|
|
dev->watchdog_timeo = ETH_TX_TIMEOUT;
|
|
dev->set_mac_address = adm5120_sw_set_mac_address;
|
|
/* HACK alert!!! In the original admtek driver it is asumed
|
|
that you can read the MAC addressess from flash, but edimax
|
|
decided to leave that space intentionally blank...
|
|
*/
|
|
memcpy(dev->dev_addr, "\x00\x50\xfc\x11\x22\x01", 6);
|
|
dev->dev_addr[5] += i;
|
|
adm5120_write_mac(dev);
|
|
|
|
if ((err = register_netdev(dev))) {
|
|
free_netdev(dev);
|
|
goto out_int;
|
|
}
|
|
printk(KERN_INFO "%s: ADM5120 switch port%d\n", dev->name, i);
|
|
}
|
|
adm5120_set_reg(ADM5120_CPUP_CONF,
|
|
ADM5120_CRC_PADDING | ADM5120_DISUNALL | ADM5120_DISMCALL);
|
|
|
|
return 0;
|
|
|
|
out_int:
|
|
/* Undo everything that did succeed */
|
|
for (; i; i--) {
|
|
unregister_netdev(adm5120_devs[i-1]);
|
|
free_netdev(adm5120_devs[i-1]);
|
|
}
|
|
free_irq(SW_IRQ, NULL);
|
|
out:
|
|
printk(KERN_ERR "ADM5120 Ethernet switch init failed\n");
|
|
return err;
|
|
}
|
|
|
|
static void __exit adm5120_sw_exit(void)
|
|
{
|
|
int i;
|
|
|
|
for (i = 0; i < adm5120_nrdevs; i++) {
|
|
unregister_netdev(adm5120_devs[i]);
|
|
free_netdev(adm5120_devs[i-1]);
|
|
}
|
|
|
|
free_irq(SW_IRQ, NULL);
|
|
|
|
for (i = 0; i < ADM5120_DMA_RXH; i++) {
|
|
if (!adm5120_skb_rxh[i])
|
|
break;
|
|
kfree_skb(adm5120_skb_rxh[i]);
|
|
}
|
|
for (i = 0; i < ADM5120_DMA_RXL; i++) {
|
|
if (!adm5120_skb_rxl[i])
|
|
break;
|
|
kfree_skb(adm5120_skb_rxl[i]);
|
|
}
|
|
}
|
|
|
|
module_init(adm5120_sw_init);
|
|
module_exit(adm5120_sw_exit);
|