mirror of
git://projects.qi-hardware.com/openwrt-xburst.git
synced 2024-11-14 18:38:10 +02:00
8c72b797b4
git-svn-id: svn://svn.openwrt.org/openwrt/trunk@6600 3c298f89-4303-0410-b956-a3cf2f4a3e73
1038 lines
25 KiB
C
1038 lines
25 KiB
C
/*
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* $Id$
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*
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* Copyright (C) 2006, 2007 OpenWrt.org
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*
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* This program is free software; you can redistribute it and/or modify
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* it under the terms of the GNU General Public License as published by
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* the Free Software Foundation; either version 2 of the License, or
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* (at your option) any later version.
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*
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* This program is distributed in the hope that it will be useful,
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* but WITHOUT ANY WARRANTY; without even the implied warranty of
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* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
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* GNU General Public License for more details.
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*
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* You should have received a copy of the GNU General Public License
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* along with this program; if not, write to the Free Software
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* Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA
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*/
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#include <linux/module.h>
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#include <linux/init.h>
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#include <linux/moduleparam.h>
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#include <linux/sched.h>
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#include <linux/kernel.h> /* printk() */
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#include <linux/slab.h>
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#include <linux/errno.h>
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#include <linux/types.h>
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#include <linux/delay.h>
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#include <linux/netdevice.h>
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#include <linux/etherdevice.h>
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#include <linux/ethtool.h>
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#include <linux/skbuff.h>
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#include <linux/mii.h>
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#include <linux/phy.h>
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#include <linux/platform_device.h>
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#include <asm/ar7/ar7.h>
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#include <asm/gpio.h>
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MODULE_AUTHOR("Eugene Konev");
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MODULE_DESCRIPTION("TI AR7 ethernet driver (CPMAC)");
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MODULE_LICENSE("GPL");
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/* Register definitions */
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struct cpmac_control_regs {
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volatile u32 revision;
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volatile u32 control;
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volatile u32 teardown;
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volatile u32 unused;
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};
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struct cpmac_int_regs {
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volatile u32 stat_raw;
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volatile u32 stat_masked;
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volatile u32 enable;
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volatile u32 clear;
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};
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struct cpmac_stats {
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volatile u32 good;
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volatile u32 bcast;
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volatile u32 mcast;
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volatile u32 pause;
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volatile u32 crc_error;
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volatile u32 align_error;
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volatile u32 oversized;
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volatile u32 jabber;
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volatile u32 undersized;
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volatile u32 fragment;
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volatile u32 filtered;
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volatile u32 qos_filtered;
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volatile u32 octets;
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};
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struct cpmac_regs {
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struct cpmac_control_regs tx_ctrl;
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struct cpmac_control_regs rx_ctrl;
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volatile u32 unused1[56];
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volatile u32 mbp;
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/* MBP bits */
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#define MBP_RXPASSCRC 0x40000000
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#define MBP_RXQOS 0x20000000
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#define MBP_RXNOCHAIN 0x10000000
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#define MBP_RXCMF 0x01000000
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#define MBP_RXSHORT 0x00800000
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#define MBP_RXCEF 0x00400000
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#define MBP_RXPROMISC 0x00200000
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#define MBP_PROMISCCHAN(chan) (((chan) & 0x7) << 16)
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#define MBP_RXBCAST 0x00002000
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#define MBP_BCASTCHAN(chan) (((chan) & 0x7) << 8)
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#define MBP_RXMCAST 0x00000020
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#define MBP_MCASTCHAN(chan) ((chan) & 0x7)
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volatile u32 unicast_enable;
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volatile u32 unicast_clear;
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volatile u32 max_len;
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volatile u32 buffer_offset;
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volatile u32 filter_flow_threshold;
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volatile u32 unused2[2];
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volatile u32 flow_thre[8];
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volatile u32 free_buffer[8];
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volatile u32 mac_control;
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#define MAC_TXPTYPE 0x00000200
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#define MAC_TXPACE 0x00000040
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#define MAC_MII 0x00000020
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#define MAC_TXFLOW 0x00000010
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#define MAC_RXFLOW 0x00000008
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#define MAC_MTEST 0x00000004
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#define MAC_LOOPBACK 0x00000002
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#define MAC_FDX 0x00000001
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volatile u32 mac_status;
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#define MACST_QOS 0x4
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#define MACST_RXFLOW 0x2
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#define MACST_TXFLOW 0x1
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volatile u32 emc_control;
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volatile u32 unused3;
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struct cpmac_int_regs tx_int;
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volatile u32 mac_int_vector;
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/* Int Status bits */
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#define INTST_STATUS 0x80000
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#define INTST_HOST 0x40000
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#define INTST_RX 0x20000
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#define INTST_TX 0x10000
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volatile u32 mac_eoi_vector;
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volatile u32 unused4[2];
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struct cpmac_int_regs rx_int;
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volatile u32 mac_int_stat_raw;
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volatile u32 mac_int_stat_masked;
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volatile u32 mac_int_enable;
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volatile u32 mac_int_clear;
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volatile u32 mac_addr_low[8];
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volatile u32 mac_addr_mid;
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volatile u32 mac_addr_high;
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volatile u32 mac_hash_low;
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volatile u32 mac_hash_high;
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volatile u32 boff_test;
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volatile u32 pac_test;
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volatile u32 rx_pause;
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volatile u32 tx_pause;
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volatile u32 unused5[2];
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struct cpmac_stats rx_stats;
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struct cpmac_stats tx_stats;
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volatile u32 unused6[232];
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volatile u32 tx_ptr[8];
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volatile u32 rx_ptr[8];
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volatile u32 tx_ack[8];
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volatile u32 rx_ack[8];
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};
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struct cpmac_mdio_regs {
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volatile u32 version;
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volatile u32 control;
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#define MDIOC_IDLE 0x80000000
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#define MDIOC_ENABLE 0x40000000
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#define MDIOC_PREAMBLE 0x00100000
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#define MDIOC_FAULT 0x00080000
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#define MDIOC_FAULTDETECT 0x00040000
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#define MDIOC_INTTEST 0x00020000
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#define MDIOC_CLKDIV(div) ((div) & 0xff)
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volatile u32 alive;
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volatile u32 link;
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struct cpmac_int_regs link_int;
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struct cpmac_int_regs user_int;
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u32 unused[20];
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volatile u32 access;
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#define MDIO_BUSY 0x80000000
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#define MDIO_WRITE 0x40000000
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#define MDIO_REG(reg) (((reg) & 0x1f) << 21)
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#define MDIO_PHY(phy) (((phy) & 0x1f) << 16)
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#define MDIO_DATA(data) ((data) & 0xffff)
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volatile u32 physel;
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};
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/* Descriptor */
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struct cpmac_desc {
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u32 hw_next;
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u32 hw_data;
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u16 buflen;
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u16 bufflags;
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u16 datalen;
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u16 dataflags;
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/* Flags bits */
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#define CPMAC_SOP 0x8000
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#define CPMAC_EOP 0x4000
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#define CPMAC_OWN 0x2000
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#define CPMAC_EOQ 0x1000
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u32 jiffies;
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struct sk_buff *skb;
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struct cpmac_desc *next;
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};
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struct cpmac_priv {
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struct net_device_stats stats;
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spinlock_t lock;
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int free_tx_channels;
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struct cpmac_desc *tx_pool;
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struct cpmac_desc *rx_channels[8];
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struct cpmac_desc *tx_channels[8];
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struct cpmac_regs *regs;
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struct mii_bus *mii_bus;
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struct phy_device *phy;
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char phy_name[BUS_ID_SIZE];
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unsigned long pages;
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int order;
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struct plat_cpmac_data *config;
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int oldlink, oldspeed, oldduplex;
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u32 msg_enable;
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};
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static irqreturn_t cpmac_irq(int, void *);
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void cpmac_exit(void);
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#ifdef CPMAC_DEBUG
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static void cpmac_dump_regs(u32 *base, int count)
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{
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int i;
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for (i = 0; i < (count + 3) / 4; i++) {
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if (i % 4 == 0) printk("\nCPMAC[0x%04x]:", i * 4);
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printk(" 0x%08x", *(base + i));
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}
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printk("\n");
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}
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#endif
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static int cpmac_mdio_read(struct mii_bus *bus, int phy_id, int regnum)
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{
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struct cpmac_mdio_regs *regs = (struct cpmac_mdio_regs *)bus->priv;
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volatile u32 val;
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while ((val = regs->access) & MDIO_BUSY);
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regs->access = MDIO_BUSY | MDIO_REG(regnum & 0x1f) |
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MDIO_PHY(phy_id & 0x1f);
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while ((val = regs->access) & MDIO_BUSY);
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return val & 0xffff;
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}
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static int cpmac_mdio_write(struct mii_bus *bus, int phy_id, int regnum, u16 val)
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{
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struct cpmac_mdio_regs *regs = (struct cpmac_mdio_regs *)bus->priv;
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volatile u32 tmp;
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while ((tmp = regs->access) & MDIO_BUSY);
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regs->access = MDIO_BUSY | MDIO_WRITE |
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MDIO_REG(regnum & 0x1f) | MDIO_PHY(phy_id & 0x1f) |
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val;
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return 0;
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}
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static int cpmac_mdio_reset(struct mii_bus *bus)
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{
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struct cpmac_mdio_regs *regs = (struct cpmac_mdio_regs *)bus->priv;
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ar7_device_reset(AR7_RESET_BIT_MDIO);
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regs->control = MDIOC_ENABLE |
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MDIOC_CLKDIV(ar7_cpmac_freq() / 2200000 - 1);
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return 0;
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}
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static int mii_irqs[PHY_MAX_ADDR] = { PHY_POLL, };
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struct mii_bus cpmac_mii = {
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.name = "cpmac-mii",
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.read = cpmac_mdio_read,
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.write = cpmac_mdio_write,
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.reset = cpmac_mdio_reset,
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.irq = mii_irqs,
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};
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int cpmac_config(struct net_device *dev, struct ifmap *map)
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{
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if (dev->flags & IFF_UP)
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return -EBUSY;
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/* Don't allow changing the I/O address */
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if (map->base_addr != dev->base_addr)
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return -EOPNOTSUPP;
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/* ignore other fields */
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return 0;
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}
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int cpmac_set_mac_address(struct net_device *dev, void *addr)
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{
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struct sockaddr *sa = addr;
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if (dev->flags & IFF_UP)
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return -EBUSY;
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memcpy(dev->dev_addr, sa->sa_data, dev->addr_len);
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return 0;
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}
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void cpmac_set_multicast_list(struct net_device *dev)
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{
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struct dev_mc_list *iter;
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int i;
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int hash, tmp;
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int hashlo = 0, hashhi = 0;
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struct cpmac_priv *priv = netdev_priv(dev);
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if(dev->flags & IFF_PROMISC) {
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priv->regs->mbp &= ~MBP_PROMISCCHAN(0); /* promisc channel 0 */
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priv->regs->mbp |= MBP_RXPROMISC;
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} else {
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priv->regs->mbp &= ~MBP_RXPROMISC;
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if(dev->flags & IFF_ALLMULTI) {
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/* enable all multicast mode */
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priv->regs->mac_hash_low = 0xffffffff;
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priv->regs->mac_hash_high = 0xffffffff;
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} else {
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for(i = 0, iter = dev->mc_list; i < dev->mc_count;
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i++, iter = iter->next) {
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hash = 0;
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tmp = iter->dmi_addr[0];
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hash ^= (tmp >> 2) ^ (tmp << 4);
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tmp = iter->dmi_addr[1];
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hash ^= (tmp >> 4) ^ (tmp << 2);
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tmp = iter->dmi_addr[2];
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hash ^= (tmp >> 6) ^ tmp;
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tmp = iter->dmi_addr[4];
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hash ^= (tmp >> 2) ^ (tmp << 4);
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tmp = iter->dmi_addr[5];
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hash ^= (tmp >> 4) ^ (tmp << 2);
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tmp = iter->dmi_addr[6];
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hash ^= (tmp >> 6) ^ tmp;
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hash &= 0x3f;
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if(hash < 32) {
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hashlo |= 1<<hash;
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} else {
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hashhi |= 1<<(hash - 32);
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}
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}
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priv->regs->mac_hash_low = hashlo;
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priv->regs->mac_hash_high = hashhi;
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}
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}
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}
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static void cpmac_rx(struct net_device *dev, int channel)
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{
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struct cpmac_desc *pkt;
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struct sk_buff *skb;
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char *data;
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struct cpmac_priv *priv = netdev_priv(dev);
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spin_lock(&priv->lock);
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pkt = priv->rx_channels[channel];
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if (!pkt) {
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if (printk_ratelimit())
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printk(KERN_NOTICE "%s: rx: spurious interrupt\n",
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dev->name);
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priv->stats.rx_errors++;
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return;
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}
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priv->regs->rx_ack[channel] = virt_to_phys(pkt);
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dma_cache_inv((u32)pkt, 16);
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if (!pkt->datalen) {
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if (printk_ratelimit())
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printk(KERN_NOTICE "%s: rx: spurious interrupt\n",
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dev->name);
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priv->stats.rx_errors++;
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return;
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}
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skb = dev_alloc_skb(1536);
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if (!skb) {
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if (printk_ratelimit())
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printk(KERN_NOTICE "%s: rx: low on mem - packet dropped\n",
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dev->name);
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priv->stats.rx_dropped++;
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} else {
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data = (char *)phys_to_virt(pkt->hw_data);
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dma_cache_inv((u32)data, pkt->datalen);
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skb_put(pkt->skb, pkt->datalen);
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pkt->skb->protocol = eth_type_trans(pkt->skb, dev);
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pkt->skb->ip_summed = CHECKSUM_NONE;
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priv->stats.rx_packets++;
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priv->stats.rx_bytes += pkt->datalen;
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netif_rx(pkt->skb);
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skb_reserve(skb, 2);
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skb->dev = dev;
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pkt->skb = skb;
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pkt->hw_data = virt_to_phys(skb->data);
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}
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spin_unlock(&priv->lock);
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pkt->buflen = 1500 + ETH_HLEN + 4;
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pkt->datalen = 0;
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pkt->dataflags = CPMAC_OWN;
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dma_cache_wback_inv((u32)pkt, 16);
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priv->regs->rx_ptr[channel] = virt_to_phys(pkt);
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}
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struct cpmac_desc *cpmac_get_desc(struct net_device *dev)
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{
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struct cpmac_desc *pkt;
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struct cpmac_priv *priv = netdev_priv(dev);
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pkt = priv->tx_pool;
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priv->tx_pool = pkt->next;
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pkt->next = NULL;
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if (priv->tx_pool == NULL)
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netif_stop_queue(dev);
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return pkt;
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}
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void cpmac_release_desc(struct net_device *dev, struct cpmac_desc *pkt)
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{
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struct cpmac_priv *priv = netdev_priv(dev);
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struct cpmac_desc *p;
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p = pkt;
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while (p->next) p = p->next;
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p->next = priv->tx_pool;
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priv->tx_pool = pkt;
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}
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int cpmac_start_xmit(struct sk_buff *skb, struct net_device *dev)
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{
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unsigned long flags;
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int i, len, frag;
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skb_frag_t *this_frag;
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void *data;
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struct cpmac_desc *head, *tail, *curr;
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struct cpmac_priv *priv = netdev_priv(dev);
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BUG_ON(priv->free_tx_channels < 1);
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len = skb->len;
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if (len < ETH_ZLEN) {
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if (skb_padto(skb, ETH_ZLEN)) {
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if (printk_ratelimit())
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printk(KERN_NOTICE "%s: padding failed, dropping\n",
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dev->name);
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spin_lock_irqsave(&priv->lock, flags);
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priv->stats.tx_dropped++;
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spin_unlock_irqrestore(&priv->lock, flags);
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return -ENOMEM;
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}
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len = ETH_ZLEN;
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}
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spin_lock_irqsave(&priv->lock, flags);
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dev->trans_start = jiffies;
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for (i = 0; i < 8; i++)
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if (!priv->tx_channels[i])
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break;
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BUG_ON(i == 8);
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head = cpmac_get_desc(dev);
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priv->tx_channels[i] = head;
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head->jiffies = dev->trans_start;
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if (!(--priv->free_tx_channels))
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netif_stop_queue(dev);
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spin_unlock_irqrestore(&priv->lock, flags);
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head->dataflags = CPMAC_SOP | CPMAC_OWN;
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head->skb = skb;
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head->hw_data = virt_to_phys(skb->data);
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dma_cache_wback_inv((u32)skb->data, len);
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head->buflen = len;
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head->datalen = len;
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tail = head;
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for (frag = 0; frag < skb_shinfo(skb)->nr_frags; frag++) {
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dma_cache_wback_inv((u32)tail, 16);
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this_frag = &skb_shinfo(skb)->frags[frag];
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curr = cpmac_get_desc(dev);
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data = page_address(this_frag->page) +
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this_frag->page_offset;
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curr->hw_data = virt_to_phys(data);
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curr->buflen = this_frag->size;
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curr->datalen = this_frag->size;
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curr->dataflags = CPMAC_OWN;
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dma_cache_wback_inv((u32)data, len);
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tail->hw_next = virt_to_phys(curr);
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tail->next = curr;
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tail = curr;
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}
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tail->hw_next = 0;
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tail->dataflags |= CPMAC_EOP;
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dma_cache_wback_inv((u32)tail, 16);
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priv->regs->tx_ptr[i] = virt_to_phys(head);
|
|
return 0;
|
|
}
|
|
|
|
void cpmac_end_xmit(struct net_device *dev, int channel)
|
|
{
|
|
struct cpmac_desc *pkt;
|
|
struct cpmac_priv *priv = netdev_priv(dev);
|
|
|
|
spin_lock(&priv->lock);
|
|
pkt = priv->tx_channels[channel];
|
|
priv->tx_channels[channel] = NULL;
|
|
priv->free_tx_channels++;
|
|
priv->regs->tx_ack[channel] = virt_to_phys(pkt);
|
|
if (pkt) {
|
|
priv->stats.tx_packets++;
|
|
priv->stats.tx_bytes += pkt->skb->len;
|
|
dev_kfree_skb_irq(pkt->skb);
|
|
cpmac_release_desc(dev, pkt);
|
|
if (netif_queue_stopped(dev))
|
|
netif_wake_queue(dev);
|
|
} else {
|
|
if (printk_ratelimit())
|
|
printk(KERN_NOTICE "%s: end_xmit: spurious interrupt\n",
|
|
dev->name);
|
|
}
|
|
spin_unlock(&priv->lock);
|
|
}
|
|
|
|
static irqreturn_t cpmac_irq(int irq, void *dev_id)
|
|
{
|
|
struct net_device *dev = (struct net_device *)dev_id;
|
|
struct cpmac_priv *priv = netdev_priv(dev);
|
|
u32 status;
|
|
|
|
if (!dev)
|
|
return IRQ_NONE;
|
|
|
|
status = priv->regs->mac_int_vector;
|
|
|
|
if (status & INTST_TX) {
|
|
cpmac_end_xmit(dev, (status & 7));
|
|
}
|
|
|
|
if (status & INTST_RX) {
|
|
cpmac_rx(dev, (status >> 8) & 7);
|
|
}
|
|
|
|
if (status & INTST_HOST) { /* host interrupt ??? */
|
|
printk("%s: host int, something bad happened...\n", dev->name);
|
|
printk("%s: mac status: 0x%08x\n", dev->name,
|
|
priv->regs->mac_status);
|
|
}
|
|
|
|
if (status & INTST_STATUS) { /* status interrupt ??? */
|
|
printk("%s: status int, what are we gonna do?\n", dev->name);
|
|
}
|
|
|
|
priv->regs->mac_eoi_vector = 0;
|
|
return IRQ_HANDLED;
|
|
}
|
|
|
|
void cpmac_tx_timeout(struct net_device *dev)
|
|
{
|
|
int i;
|
|
struct cpmac_priv *priv = netdev_priv(dev);
|
|
struct cpmac_desc *pkt = NULL, *tmp;
|
|
|
|
priv->stats.tx_errors++;
|
|
for (i = 0; i < 8; i++) {
|
|
tmp = priv->tx_channels[i];
|
|
if (tmp && (!pkt || (pkt->jiffies > tmp->jiffies)))
|
|
pkt = tmp;
|
|
}
|
|
if (pkt) {
|
|
printk("Transmit timeout at %ld, latency %ld\n", jiffies,
|
|
jiffies - pkt->jiffies);
|
|
for (i = 0; i < 8; i++)
|
|
if (priv->tx_channels[i] == pkt)
|
|
priv->tx_channels[i] = NULL;
|
|
dev_kfree_skb(pkt->skb);
|
|
cpmac_release_desc(dev, pkt);
|
|
priv->free_tx_channels++;
|
|
netif_wake_queue(dev);
|
|
}
|
|
}
|
|
|
|
int cpmac_ioctl(struct net_device *dev, struct ifreq *ifr, int cmd)
|
|
{
|
|
struct cpmac_priv *priv = netdev_priv(dev);
|
|
if (!(netif_running(dev)))
|
|
return -EINVAL;
|
|
if (!priv->phy)
|
|
return -EINVAL;
|
|
return phy_mii_ioctl(priv->phy, if_mii(ifr), cmd);
|
|
}
|
|
|
|
static int cpmac_get_settings(struct net_device *dev, struct ethtool_cmd *cmd)
|
|
{
|
|
struct cpmac_priv *priv = netdev_priv(dev);
|
|
|
|
if (priv->phy)
|
|
return phy_ethtool_gset(priv->phy, cmd);
|
|
|
|
return -EINVAL;
|
|
}
|
|
|
|
static int cpmac_set_settings(struct net_device *dev, struct ethtool_cmd *cmd)
|
|
{
|
|
struct cpmac_priv *priv = netdev_priv(dev);
|
|
|
|
if (!capable(CAP_NET_ADMIN))
|
|
return -EPERM;
|
|
|
|
if (priv->phy)
|
|
return phy_ethtool_sset(priv->phy, cmd);
|
|
|
|
return -EINVAL;
|
|
}
|
|
|
|
static void cpmac_get_drvinfo(struct net_device *dev,
|
|
struct ethtool_drvinfo *info)
|
|
{
|
|
strcpy(info->driver, "cpmac");
|
|
strcpy(info->version, "0.0.3");
|
|
info->fw_version[0] = '\0';
|
|
sprintf(info->bus_info, "%s", "cpmac");
|
|
info->regdump_len = 0;
|
|
}
|
|
|
|
static const struct ethtool_ops cpmac_ethtool_ops = {
|
|
.get_settings = cpmac_get_settings,
|
|
.set_settings = cpmac_set_settings,
|
|
.get_drvinfo = cpmac_get_drvinfo,
|
|
.get_link = ethtool_op_get_link,
|
|
};
|
|
|
|
static struct net_device_stats *cpmac_stats(struct net_device *dev)
|
|
{
|
|
struct cpmac_priv *priv = netdev_priv(dev);
|
|
|
|
if (netif_device_present(dev))
|
|
return &priv->stats;
|
|
|
|
return NULL;
|
|
}
|
|
|
|
static int cpmac_change_mtu(struct net_device *dev, int mtu)
|
|
{
|
|
unsigned long flags;
|
|
struct cpmac_priv *priv = netdev_priv(dev);
|
|
spinlock_t *lock = &priv->lock;
|
|
|
|
if ((mtu < 68) || (mtu > 1500))
|
|
return -EINVAL;
|
|
|
|
spin_lock_irqsave(lock, flags);
|
|
dev->mtu = mtu;
|
|
spin_unlock_irqrestore(lock, flags);
|
|
|
|
return 0;
|
|
}
|
|
|
|
static void cpmac_reset(struct net_device *dev)
|
|
{
|
|
int i;
|
|
struct cpmac_priv *priv = netdev_priv(dev);
|
|
|
|
ar7_device_reset(priv->config->reset_bit);
|
|
priv->regs->rx_ctrl.control &= ~1;
|
|
priv->regs->tx_ctrl.control &= ~1;
|
|
for (i = 0; i < 8; i++) {
|
|
priv->regs->tx_ptr[i] = 0;
|
|
priv->regs->rx_ptr[i] = 0;
|
|
}
|
|
priv->regs->mac_control &= ~MAC_MII; /* disable mii */
|
|
}
|
|
|
|
static void cpmac_adjust_link(struct net_device *dev)
|
|
{
|
|
struct cpmac_priv *priv = netdev_priv(dev);
|
|
unsigned long flags;
|
|
int new_state = 0;
|
|
|
|
spin_lock_irqsave(&priv->lock, flags);
|
|
if (priv->phy->link) {
|
|
if (priv->phy->duplex != priv->oldduplex) {
|
|
new_state = 1;
|
|
priv->oldduplex = priv->phy->duplex;
|
|
}
|
|
|
|
if (priv->phy->speed != priv->oldspeed) {
|
|
new_state = 1;
|
|
priv->oldspeed = priv->phy->speed;
|
|
}
|
|
|
|
if (!priv->oldlink) {
|
|
new_state = 1;
|
|
priv->oldlink = 1;
|
|
netif_schedule(dev);
|
|
}
|
|
} else if (priv->oldlink) {
|
|
new_state = 1;
|
|
priv->oldlink = 0;
|
|
priv->oldspeed = 0;
|
|
priv->oldduplex = -1;
|
|
}
|
|
|
|
if (new_state)
|
|
phy_print_status(priv->phy);
|
|
|
|
spin_unlock_irqrestore(&priv->lock, flags);
|
|
}
|
|
|
|
int cpmac_open(struct net_device *dev)
|
|
{
|
|
int i, j, res;
|
|
struct cpmac_priv *priv = netdev_priv(dev);
|
|
struct cpmac_desc *pkt;
|
|
struct sk_buff *skb;
|
|
|
|
/* priv->phy = phy_connect(dev, priv->phy_name, &cpmac_adjust_link,
|
|
0, PHY_INTERFACE_MODE_MII);*/
|
|
priv->phy = phy_connect(dev, priv->phy_name, &cpmac_adjust_link, 0);
|
|
if (IS_ERR(priv->phy)) {
|
|
printk(KERN_ERR "%s: Could not attach to PHY\n", dev->name);
|
|
return PTR_ERR(priv->phy);
|
|
}
|
|
|
|
if (!request_mem_region(dev->mem_start, dev->mem_end -
|
|
dev->mem_start, dev->name)) {
|
|
printk("%s: failed to request registers\n",
|
|
dev->name);
|
|
res = -ENXIO;
|
|
goto fail_reserve;
|
|
}
|
|
|
|
priv->regs = ioremap_nocache(dev->mem_start, dev->mem_end -
|
|
dev->mem_start);
|
|
if (!priv->regs) {
|
|
printk("%s: failed to remap registers\n", dev->name);
|
|
res = -ENXIO;
|
|
goto fail_remap;
|
|
}
|
|
|
|
priv->order = get_order(4096);
|
|
priv->pages = __get_dma_pages(GFP_KERNEL, priv->order);
|
|
if (!priv->pages) {
|
|
res = -ENOMEM;
|
|
goto fail_alloc;
|
|
}
|
|
memset((char *)priv->pages, 0, 4096);
|
|
|
|
priv->tx_pool = NULL;
|
|
|
|
for (i = 0; i < 4096 / sizeof(struct cpmac_desc); i++) {
|
|
pkt = (struct cpmac_desc *)
|
|
(priv->pages + i * sizeof(struct cpmac_desc));
|
|
memset(pkt, sizeof(struct cpmac_desc), 0);
|
|
if (i < 8) {
|
|
skb = alloc_skb(1500 + ETH_HLEN + 6, GFP_KERNEL);
|
|
if (!skb) {
|
|
for(j = 0; j < i - 1; j++)
|
|
kfree_skb(priv->rx_channels[j]->skb);
|
|
free_pages(priv->pages, priv->order);
|
|
res = -ENOMEM;
|
|
goto fail_alloc;
|
|
}
|
|
skb_reserve(skb, 2);
|
|
skb->dev = dev;
|
|
pkt->skb = skb;
|
|
pkt->hw_data = virt_to_phys(skb->data);
|
|
pkt->buflen = 1500 + ETH_HLEN + 4;
|
|
pkt->dataflags = CPMAC_OWN;
|
|
dma_cache_wback_inv((u32)pkt, 16);
|
|
priv->rx_channels[i] = pkt;
|
|
priv->tx_channels[i] = NULL;
|
|
} else {
|
|
pkt->next = priv->tx_pool;
|
|
priv->tx_pool = pkt;
|
|
}
|
|
}
|
|
|
|
cpmac_reset(dev);
|
|
priv->free_tx_channels = 8;
|
|
|
|
for (i = 0; i < 8; i++) {
|
|
priv->regs->tx_ptr[i] = 0;
|
|
priv->regs->rx_ptr[i] = virt_to_phys(priv->rx_channels[i]);
|
|
}
|
|
|
|
priv->regs->mbp = MBP_RXNOCHAIN | MBP_RXSHORT | MBP_RXBCAST |
|
|
MBP_RXMCAST;
|
|
priv->regs->unicast_enable = 0xff;
|
|
priv->regs->unicast_clear = 0;
|
|
priv->regs->buffer_offset = 0;
|
|
for (i = 0; i < 8; i++)
|
|
priv->regs->mac_addr_low[i] = dev->dev_addr[5];
|
|
priv->regs->mac_addr_mid = dev->dev_addr[4];
|
|
priv->regs->mac_addr_high = dev->dev_addr[0] | (dev->dev_addr[1] << 8)
|
|
| (dev->dev_addr[2] << 16) | (dev->dev_addr[3] << 24);
|
|
priv->regs->max_len = 1536;
|
|
priv->regs->rx_int.enable = 0xff;
|
|
priv->regs->rx_int.clear = 0;
|
|
priv->regs->tx_int.enable = 0xff;
|
|
priv->regs->tx_int.clear = 0;
|
|
priv->regs->mac_int_enable = 3;
|
|
priv->regs->mac_int_clear = 0xfc;
|
|
|
|
if((res = request_irq(dev->irq, cpmac_irq, SA_INTERRUPT,
|
|
dev->name, dev))) {
|
|
printk("%s: failed to obtain irq\n", dev->name);
|
|
goto fail_irq;
|
|
}
|
|
|
|
priv->regs->rx_ctrl.control |= 1;
|
|
priv->regs->tx_ctrl.control |= 1;
|
|
priv->regs->mac_control |= MAC_MII | MAC_FDX;
|
|
|
|
priv->phy->state = PHY_CHANGELINK;
|
|
phy_start(priv->phy);
|
|
|
|
netif_start_queue(dev);
|
|
|
|
return 0;
|
|
|
|
fail_irq:
|
|
for(i = 0; i < 8; i++)
|
|
if (priv->rx_channels[i]->skb)
|
|
kfree_skb(priv->rx_channels[i]->skb);
|
|
free_pages(priv->pages, priv->order);
|
|
|
|
fail_alloc:
|
|
iounmap(priv->regs);
|
|
|
|
fail_remap:
|
|
release_mem_region(dev->mem_start, dev->mem_end -
|
|
dev->mem_start);
|
|
|
|
fail_reserve:
|
|
phy_disconnect(priv->phy);
|
|
|
|
return res;
|
|
}
|
|
|
|
int cpmac_stop(struct net_device *dev)
|
|
{
|
|
int i;
|
|
struct cpmac_priv *priv = netdev_priv(dev);
|
|
|
|
netif_stop_queue(dev);
|
|
|
|
phy_stop(priv->phy);
|
|
phy_disconnect(priv->phy);
|
|
priv->phy = NULL;
|
|
|
|
cpmac_reset(dev);
|
|
|
|
for (i = 0; i < 8; i++) {
|
|
priv->regs->rx_ptr[i] = 0;
|
|
priv->regs->tx_ptr[i] = 0;
|
|
priv->regs->mbp = 0;
|
|
}
|
|
|
|
free_irq(dev->irq, dev);
|
|
release_mem_region(dev->mem_start, dev->mem_end -
|
|
dev->mem_start);
|
|
|
|
for(i = 0; i < 8; i++)
|
|
if (priv->rx_channels[i]->skb)
|
|
kfree_skb(priv->rx_channels[i]->skb);
|
|
if (priv->pages)
|
|
free_pages(priv->pages, priv->order);
|
|
|
|
return 0;
|
|
}
|
|
|
|
static int external_switch = 0;
|
|
|
|
int __devinit cpmac_probe(struct platform_device *pdev)
|
|
{
|
|
int i, rc, phy_id;
|
|
struct resource *res;
|
|
struct cpmac_priv *priv;
|
|
struct net_device *dev;
|
|
struct plat_cpmac_data *pdata;
|
|
|
|
if (strcmp(pdev->name, "cpmac") != 0)
|
|
return -ENODEV;
|
|
|
|
pdata = pdev->dev.platform_data;
|
|
|
|
for (phy_id = 0; phy_id < PHY_MAX_ADDR; phy_id++) {
|
|
if (!(pdata->phy_mask & (1 << phy_id)))
|
|
continue;
|
|
if (!cpmac_mii.phy_map[phy_id])
|
|
continue;
|
|
break;
|
|
}
|
|
|
|
if (phy_id == PHY_MAX_ADDR) {
|
|
if (external_switch) {
|
|
phy_id = 0;
|
|
} else {
|
|
printk("cpmac: no PHY present\n");
|
|
return -ENODEV;
|
|
}
|
|
}
|
|
|
|
dev = alloc_etherdev(sizeof(struct cpmac_priv));
|
|
|
|
if (!dev) {
|
|
printk(KERN_ERR "cpmac: Unable to allocate net_device structure!\n");
|
|
return -ENOMEM;
|
|
}
|
|
|
|
SET_MODULE_OWNER(dev);
|
|
platform_set_drvdata(pdev, dev);
|
|
priv = netdev_priv(dev);
|
|
|
|
res = platform_get_resource_byname(pdev, IORESOURCE_MEM, "regs");
|
|
if (!res) {
|
|
rc = -ENODEV;
|
|
goto fail;
|
|
}
|
|
|
|
dev->mem_start = res->start;
|
|
dev->mem_end = res->end;
|
|
dev->irq = platform_get_irq_byname(pdev, "irq");
|
|
|
|
dev->mtu = 1500;
|
|
dev->open = cpmac_open;
|
|
dev->stop = cpmac_stop;
|
|
dev->set_config = cpmac_config;
|
|
dev->hard_start_xmit = cpmac_start_xmit;
|
|
dev->do_ioctl = cpmac_ioctl;
|
|
dev->get_stats = cpmac_stats;
|
|
dev->change_mtu = cpmac_change_mtu;
|
|
dev->set_mac_address = cpmac_set_mac_address;
|
|
dev->set_multicast_list = cpmac_set_multicast_list;
|
|
dev->tx_timeout = cpmac_tx_timeout;
|
|
dev->ethtool_ops = &cpmac_ethtool_ops;
|
|
|
|
memset(priv, 0, sizeof(struct cpmac_priv));
|
|
spin_lock_init(&priv->lock);
|
|
priv->msg_enable = netif_msg_init(NETIF_MSG_WOL, 0x3fff);
|
|
priv->config = pdata;
|
|
memcpy(dev->dev_addr, priv->config->dev_addr, sizeof(dev->dev_addr));
|
|
if (phy_id == 31) {
|
|
snprintf(priv->phy_name, BUS_ID_SIZE, PHY_ID_FMT,
|
|
cpmac_mii.id, phy_id);
|
|
} else {
|
|
snprintf(priv->phy_name, BUS_ID_SIZE, "fixed@%d:%d", 100, 1);
|
|
}
|
|
|
|
if ((rc = register_netdev(dev))) {
|
|
printk("cpmac: error %i registering device %s\n",
|
|
rc, dev->name);
|
|
goto fail;
|
|
}
|
|
|
|
printk("cpmac: device %s (regs: %p, irq: %d, phy: %s, mac: ",
|
|
dev->name, (u32 *)dev->mem_start, dev->irq,
|
|
priv->phy_name);
|
|
for (i = 0; i < 6; i++) {
|
|
printk("%02x", dev->dev_addr[i]);
|
|
if (i < 5) printk(":");
|
|
else printk(")\n");
|
|
}
|
|
|
|
return 0;
|
|
|
|
fail:
|
|
free_netdev(dev);
|
|
return rc;
|
|
}
|
|
|
|
static int __devexit cpmac_remove(struct platform_device *pdev)
|
|
{
|
|
struct net_device *dev = platform_get_drvdata(pdev);
|
|
unregister_netdev(dev);
|
|
free_netdev(dev);
|
|
return 0;
|
|
}
|
|
|
|
static struct platform_driver cpmac_driver = {
|
|
.driver.name = "cpmac",
|
|
.probe = cpmac_probe,
|
|
.remove = cpmac_remove,
|
|
};
|
|
|
|
int __devinit cpmac_init(void)
|
|
{
|
|
volatile u32 mask;
|
|
int i, res;
|
|
cpmac_mii.priv = (struct cpmac_mdio_regs *)
|
|
ioremap_nocache(AR7_REGS_MDIO, sizeof(struct cpmac_mdio_regs));
|
|
|
|
if (!cpmac_mii.priv) {
|
|
printk("Can't ioremap mdio registers\n");
|
|
return -ENXIO;
|
|
}
|
|
|
|
#warning FIXME: unhardcode gpio&reset bits
|
|
ar7_gpio_disable(26);
|
|
ar7_gpio_disable(27);
|
|
/* ar7_device_reset(17);
|
|
ar7_device_reset(21);
|
|
ar7_device_reset(26);*/
|
|
|
|
cpmac_mii.reset(&cpmac_mii);
|
|
|
|
for (i = 0; i < 300000; i++) {
|
|
mask = ((struct cpmac_mdio_regs *)cpmac_mii.priv)->alive;
|
|
if (mask)
|
|
break;
|
|
}
|
|
|
|
mask &= 0x7fffffff;
|
|
if (mask & (mask - 1)) {
|
|
external_switch = 1;
|
|
mask = 0;
|
|
}
|
|
|
|
cpmac_mii.phy_mask = ~(mask | 0x80000000);
|
|
|
|
res = mdiobus_register(&cpmac_mii);
|
|
if (res)
|
|
goto fail_mii;
|
|
|
|
res = platform_driver_register(&cpmac_driver);
|
|
if (res)
|
|
goto fail_cpmac;
|
|
|
|
return 0;
|
|
|
|
fail_cpmac:
|
|
mdiobus_unregister(&cpmac_mii);
|
|
|
|
fail_mii:
|
|
iounmap(cpmac_mii.priv);
|
|
|
|
return res;
|
|
}
|
|
|
|
void __devexit cpmac_exit(void)
|
|
{
|
|
platform_driver_unregister(&cpmac_driver);
|
|
mdiobus_unregister(&cpmac_mii);
|
|
}
|
|
|
|
module_init(cpmac_init);
|
|
module_exit(cpmac_exit);
|