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git://projects.qi-hardware.com/openwrt-xburst.git
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434 lines
10 KiB
C
434 lines
10 KiB
C
/*
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* Platform device support for Jz4740 SoC.
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*
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* Copyright 2007, <yliu@ingenic.cn>
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*
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* This file is licensed under the terms of the GNU General Public
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* License version 2. This program is licensed "as is" without any
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* warranty of any kind, whether express or implied.
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*/
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#include <linux/device.h>
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#include <linux/platform_device.h>
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#include <linux/kernel.h>
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#include <linux/init.h>
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#include <linux/resource.h>
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#include <linux/mtd/jz4740_nand.h>
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#include <linux/jz4740_fb.h>
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#include <linux/input/matrix_keypad.h>
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#include <linux/mtd/jz4740_nand.h>
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#include <linux/spi/spi.h>
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#include <linux/spi/spi_gpio.h>
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#include <asm/jzsoc.h>
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#include <asm/gpio.h>
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/* OHCI (USB full speed host controller) */
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static struct resource jz_usb_ohci_resources[] = {
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[0] = {
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.start = CPHYSADDR(UHC_BASE), // phys addr for ioremap
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.end = CPHYSADDR(UHC_BASE) + 0x10000 - 1,
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.flags = IORESOURCE_MEM,
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},
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[1] = {
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.start = IRQ_UHC,
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.end = IRQ_UHC,
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.flags = IORESOURCE_IRQ,
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},
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};
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/* The dmamask must be set for OHCI to work */
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static u64 ohci_dmamask = ~(u32)0;
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static struct platform_device jz_usb_ohci_device = {
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.name = "jz-ohci",
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.id = 0,
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.dev = {
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.dma_mask = &ohci_dmamask,
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.coherent_dma_mask = 0xffffffff,
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},
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.num_resources = ARRAY_SIZE(jz_usb_ohci_resources),
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.resource = jz_usb_ohci_resources,
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};
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/*** LCD controller ***/
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static struct resource jz_lcd_resources[] = {
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[0] = {
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.start = CPHYSADDR(LCD_BASE),
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.end = CPHYSADDR(LCD_BASE) + 0x10000 - 1,
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.flags = IORESOURCE_MEM,
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},
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[1] = {
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.start = IRQ_LCD,
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.end = IRQ_LCD,
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.flags = IORESOURCE_IRQ,
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}
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};
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static u64 jz_lcd_dmamask = ~(u32)0;
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static struct platform_device jz_lcd_device = {
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.name = "jz-lcd",
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.id = 0,
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.dev = {
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.dma_mask = &jz_lcd_dmamask,
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.coherent_dma_mask = 0xffffffff,
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},
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.num_resources = ARRAY_SIZE(jz_lcd_resources),
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.resource = jz_lcd_resources,
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};
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/* UDC (USB gadget controller) */
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static struct resource jz_usb_gdt_resources[] = {
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[0] = {
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.start = CPHYSADDR(UDC_BASE),
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.end = CPHYSADDR(UDC_BASE) + 0x10000 - 1,
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.flags = IORESOURCE_MEM,
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},
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[1] = {
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.start = IRQ_UDC,
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.end = IRQ_UDC,
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.flags = IORESOURCE_IRQ,
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},
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};
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static u64 udc_dmamask = ~(u32)0;
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static struct platform_device jz_usb_gdt_device = {
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.name = "jz-udc",
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.id = 0,
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.dev = {
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.dma_mask = &udc_dmamask,
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.coherent_dma_mask = 0xffffffff,
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},
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.num_resources = ARRAY_SIZE(jz_usb_gdt_resources),
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.resource = jz_usb_gdt_resources,
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};
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/** MMC/SD controller **/
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static struct resource jz_mmc_resources[] = {
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[0] = {
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.start = CPHYSADDR(MSC_BASE),
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.end = CPHYSADDR(MSC_BASE) + 0x10000 - 1,
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.flags = IORESOURCE_MEM,
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},
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[1] = {
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.start = IRQ_MSC,
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.end = IRQ_MSC,
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.flags = IORESOURCE_IRQ,
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}
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};
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static u64 jz_mmc_dmamask = ~(u32)0;
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static struct platform_device jz_mmc_device = {
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.name = "jz-mmc",
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.id = 0,
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.dev = {
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.dma_mask = &jz_mmc_dmamask,
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.coherent_dma_mask = 0xffffffff,
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},
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.num_resources = ARRAY_SIZE(jz_mmc_resources),
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.resource = jz_mmc_resources,
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};
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/** I2C controller **/
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static struct resource jz_i2c_resources[] = {
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[0] = {
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.start = CPHYSADDR(I2C_BASE),
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.end = CPHYSADDR(I2C_BASE) + 0x10000 - 1,
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.flags = IORESOURCE_MEM,
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},
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[1] = {
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.start = IRQ_I2C,
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.end = IRQ_I2C,
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.flags = IORESOURCE_IRQ,
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}
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};
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static u64 jz_i2c_dmamask = ~(u32)0;
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static struct platform_device jz_i2c_device = {
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.name = "jz_i2c",
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.id = 0,
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.dev = {
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.dma_mask = &jz_i2c_dmamask,
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.coherent_dma_mask = 0xffffffff,
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},
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.num_resources = ARRAY_SIZE(jz_i2c_resources),
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.resource = jz_i2c_resources,
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};
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static struct resource jz_nand_resources[] = {
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[0] = {
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.start = CPHYSADDR(EMC_BASE),
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.end = CPHYSADDR(EMC_BASE) + 0x10000 - 1,
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.flags = IORESOURCE_MEM,
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},
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};
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static struct nand_ecclayout qi_lb60_ecclayout = {
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.eccbytes = 36,
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.eccpos = {
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6, 7, 8, 9, 10, 11, 12, 13,
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14, 15, 16, 17, 18, 19, 20, 21,
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22, 23, 24, 25, 26, 27, 28, 29,
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30, 31, 32, 33, 34, 35, 36, 37,
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38, 39, 40, 41},
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.oobfree = {
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{.offset = 2,
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.length = 4},
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{.offset = 42,
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.length = 22}}
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};
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static struct mtd_partition qi_lb60_partitions[] = {
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{ .name = "NAND BOOT partition",
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.offset = 0 * 0x100000,
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.size = 4 * 0x100000,
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},
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{ .name = "NAND KERNEL partition",
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.offset = 4 * 0x100000,
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.size = 4 * 0x100000,
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},
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{ .name = "NAND ROOTFS partition",
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.offset = 8 * 0x100000,
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.size = 20 * 0x100000,
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},
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{ .name = "NAND DATA partition",
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.offset = 100 * 0x100000,
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.size = 20 * 0x100000,
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},
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};
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static struct jz_nand_platform_data jz_nand_platform_data = {
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.num_partitions = ARRAY_SIZE(qi_lb60_partitions),
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.partitions = qi_lb60_partitions,
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.ecc_layout = &qi_lb60_ecclayout,
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.busy_gpio = 94,
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};
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static struct platform_device jz_nand_device = {
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.name = "jz4740-nand",
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.num_resources = ARRAY_SIZE(jz_nand_resources),
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.resource = jz_nand_resources,
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.dev = {
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.platform_data = &jz_nand_platform_data,
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}
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};
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#define KEEP_UART_ALIVE
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#define KEY_QI_QI KEY_F13
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#define KEY_QI_UPRED KEY_F14
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#define KEY_QI_VOLUP KEY_F15
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#define KEY_QI_VOLDOWN KEY_F16
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static const uint32_t qi_lb60_keymap[] = {
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KEY(0, 0, KEY_F1), /* S2 */
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KEY(0, 1, KEY_F2), /* S3 */
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KEY(0, 2, KEY_F3), /* S4 */
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KEY(0, 3, KEY_F4), /* S5 */
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KEY(0, 4, KEY_F5), /* S6 */
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KEY(0, 5, KEY_F6), /* S7 */
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KEY(0, 6, KEY_F7), /* S8 */
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KEY(1, 0, KEY_Q), /* S10 */
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KEY(1, 1, KEY_W), /* S11 */
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KEY(1, 2, KEY_E), /* S12 */
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KEY(1, 3, KEY_R), /* S13 */
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KEY(1, 4, KEY_T), /* S14 */
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KEY(1, 5, KEY_Y), /* S15 */
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KEY(1, 6, KEY_U), /* S16 */
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KEY(1, 7, KEY_I), /* S17 */
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KEY(2, 0, KEY_A), /* S18 */
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KEY(2, 1, KEY_S), /* S19 */
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KEY(2, 2, KEY_D), /* S20 */
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KEY(2, 3, KEY_F), /* S21 */
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KEY(2, 4, KEY_G), /* S22 */
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KEY(2, 5, KEY_H), /* S23 */
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KEY(2, 6, KEY_J), /* S24 */
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KEY(2, 7, KEY_K), /* S25 */
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KEY(3, 0, KEY_ESC), /* S26 */
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KEY(3, 1, KEY_Z), /* S27 */
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KEY(3, 2, KEY_X), /* S28 */
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KEY(3, 3, KEY_C), /* S29 */
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KEY(3, 4, KEY_V), /* S30 */
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KEY(3, 5, KEY_B), /* S31 */
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KEY(3, 6, KEY_N), /* S32 */
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KEY(3, 7, KEY_M), /* S33 */
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KEY(4, 0, KEY_TAB), /* S34 */
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KEY(4, 1, KEY_CAPSLOCK), /* S35 */
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KEY(4, 2, KEY_BACKSLASH), /* S36 */
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KEY(4, 3, KEY_APOSTROPHE), /* S37 */
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KEY(4, 4, KEY_COMMA), /* S38 */
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KEY(4, 5, KEY_DOT), /* S39 */
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KEY(4, 6, KEY_SLASH), /* S40 */
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KEY(4, 7, KEY_UP), /* S41 */
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KEY(5, 0, KEY_O), /* S42 */
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KEY(5, 1, KEY_L), /* S43 */
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KEY(5, 2, KEY_EQUAL), /* S44 */
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KEY(5, 3, KEY_QI_UPRED), /* S45 */
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KEY(5, 4, KEY_SPACE), /* S46 */
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KEY(5, 5, KEY_QI_QI), /* S47 */
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KEY(5, 6, KEY_LEFTCTRL), /* S48 */
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KEY(5, 7, KEY_LEFT), /* S49 */
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KEY(6, 0, KEY_F8), /* S50 */
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KEY(6, 1, KEY_P), /* S51 */
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KEY(6, 2, KEY_BACKSPACE),/* S52 */
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KEY(6, 3, KEY_ENTER), /* S53 */
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KEY(6, 4, KEY_QI_VOLUP), /* S54 */
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KEY(6, 5, KEY_QI_VOLDOWN), /* S55 */
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KEY(6, 6, KEY_DOWN), /* S56 */
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KEY(6, 7, KEY_RIGHT), /* S57 */
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#ifndef KEEP_UART_ALIVE
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KEY(7, 0, KEY_LEFTSHIFT), /* S58 */
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KEY(7, 1, KEY_LEFTALT), /* S59 */
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KEY(7, 2, KEY_FN), /* S60 */
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#endif
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};
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static const struct matrix_keymap_data qi_lb60_keymap_data = {
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.keymap = qi_lb60_keymap,
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.keymap_size = ARRAY_SIZE(qi_lb60_keymap),
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};
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static const unsigned int qi_lb60_keypad_cols[] = {
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74, 75, 76, 77, 78, 79, 80, 81,
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};
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static const unsigned int qi_lb60_keypad_rows[] = {
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114, 115, 116, 117, 118, 119, 120,
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#ifndef KEEP_UART_ALIVE
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122,
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#endif
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};
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static struct matrix_keypad_platform_data qi_lb60_pdata = {
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.keymap_data = &qi_lb60_keymap_data,
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.col_gpios = qi_lb60_keypad_cols,
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.row_gpios = qi_lb60_keypad_rows,
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.num_col_gpios = ARRAY_SIZE(qi_lb60_keypad_cols),
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.num_row_gpios = ARRAY_SIZE(qi_lb60_keypad_rows),
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.col_scan_delay_us = 10,
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.debounce_ms = 10,
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.wakeup = 1,
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.active_low = 1,
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};
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static struct platform_device qi_lb60_keypad = {
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.name = "matrix-keypad",
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.id = -1,
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.dev = {
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.platform_data = &qi_lb60_pdata,
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},
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};
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static struct fb_videomode qi_lb60_video_modes[] = {
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{
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.name = "320x240",
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.xres = 320,
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.yres = 240,
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.pixclock = 700000,
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.left_margin = 140,
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.right_margin = 273,
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.upper_margin = 20,
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.lower_margin = 1,
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.hsync_len = 1,
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.vsync_len = 1,
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.sync = 0,
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.vmode = FB_VMODE_NONINTERLACED,
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},
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};
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static struct jz4740_fb_platform_data qi_lb60_fb_data = {
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.width = 60,
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.height = 45,
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.num_modes = ARRAY_SIZE(qi_lb60_video_modes),
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.modes = qi_lb60_video_modes,
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.bpp = 24,
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.lcd_type = JZ_LCD_TYPE_8BIT_SERIAL,
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};
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static struct resource fb_resources[] = {
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[0] = {
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.start = CPHYSADDR(LCD_BASE),
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.end = CPHYSADDR(LCD_BASE) + 0x10000 - 1,
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.flags = IORESOURCE_MEM,
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},
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};
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static struct platform_device qi_lb60_fb = {
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.name = "jz4740-fb",
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.id = -1,
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.num_resources = ARRAY_SIZE(fb_resources),
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.resource = fb_resources,
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.dev = {
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.dma_mask = &jz_lcd_dmamask,
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.coherent_dma_mask = 0xffffffff,
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.platform_data = &qi_lb60_fb_data,
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},
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};
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struct spi_gpio_platform_data spigpio_platform_data = {
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.sck = 32 * 2 + 23,
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.mosi = 32 * 2 + 22,
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.miso = 32 * 2 + 22,
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.num_chipselect = 1,
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};
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static struct platform_device spigpio_device = {
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.name = "spi_gpio",
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.id = 1,
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.dev = {
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.platform_data = &spigpio_platform_data,
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},
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};
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static struct spi_board_info qi_lb60_spi_board_info[] = {
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{
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.modalias = "gpm940b0",
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.controller_data = (void*)(32 * 2 + 21),
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.chip_select = 0,
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.bus_num = 1,
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.max_speed_hz = 30 * 1000,
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},
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};
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static struct resource i2s_resources[] = {
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[0] = {
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.start = CPHYSADDR(AIC_BASE),
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.end = CPHYSADDR(AIC_BASE) + 0x38 - 1,
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.flags = IORESOURCE_MEM,
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},
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};
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static struct platform_device jz_i2s_device = {
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.name = "jz4740-i2s",
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.id = -1,
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.num_resources = ARRAY_SIZE(i2s_resources),
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.resource = i2s_resources,
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};
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/* All */
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static struct platform_device *jz_platform_devices[] __initdata = {
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&jz_usb_ohci_device,
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&jz_usb_gdt_device,
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&jz_mmc_device,
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&jz_nand_device,
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&jz_i2c_device,
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&qi_lb60_keypad,
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&qi_lb60_fb,
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&spigpio_device,
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&jz_i2s_device,
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};
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static int __init jz_platform_init(void)
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{
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spi_register_board_info(qi_lb60_spi_board_info,
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ARRAY_SIZE(qi_lb60_spi_board_info));
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return platform_add_devices(jz_platform_devices, ARRAY_SIZE(jz_platform_devices));
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}
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arch_initcall(jz_platform_init);
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