mirror of
git://projects.qi-hardware.com/openwrt-xburst.git
synced 2024-12-11 13:06:16 +02:00
312 lines
6.9 KiB
C
Executable File
312 lines
6.9 KiB
C
Executable File
/*
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* This program is free software; you can redistribute it and/or modify it
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* under the terms of the GNU General Public License as published by the
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* Free Software Foundation; either version 2 of the License, or (at your
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* option) any later version.
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*
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*/
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#include <linux/init.h>
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#include <linux/module.h>
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#include <linux/device.h>
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#include <linux/delay.h>
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#include <sound/driver.h>
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#include <sound/core.h>
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#include <sound/pcm.h>
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#include <sound/pcm_params.h>
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#include <sound/initval.h>
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#include <sound/soc.h>
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#include "jz4750-pcm.h"
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#include "jz4750-i2s.h"
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#include "../codecs/jzdlv.h"
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static struct jz4750_dma_client jz4750_dma_client_out = {
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.name = "I2S PCM Stereo out"
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};
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static struct jz4750_dma_client jz4750_dma_client_in = {
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.name = "I2S PCM Stereo in"
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};
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static struct jz4750_pcm_dma_params jz4750_i2s_pcm_stereo_out = {
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.client = &jz4750_dma_client_out,
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.channel = DMA_ID_AIC_TX,
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.dma_addr = AIC_DR,
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.dma_size = 2,
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};
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static struct jz4750_pcm_dma_params jz4750_i2s_pcm_stereo_in = {
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.client = &jz4750_dma_client_in,
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.channel = DMA_ID_AIC_RX,
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.dma_addr = AIC_DR,
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.dma_size = 2,
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};
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static int jz4750_i2s_startup(struct snd_pcm_substream *substream)
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{
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/*struct snd_soc_pcm_runtime *rtd = substream->private_data;
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struct snd_soc_cpu_dai *cpu_dai = rtd->dai->cpu_dai;*/
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return 0;
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}
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static int jz4750_i2s_set_dai_fmt(struct snd_soc_dai *cpu_dai,
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unsigned int fmt)
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{
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/* interface format */
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switch (fmt & SND_SOC_DAIFMT_FORMAT_MASK) {
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case SND_SOC_DAIFMT_I2S:
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/* 1 : ac97 , 0 : i2s */
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break;
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case SND_SOC_DAIFMT_LEFT_J:
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break;
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default:
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return -EINVAL;
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}
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switch (fmt & SND_SOC_DAIFMT_MASTER_MASK) {
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case SND_SOC_DAIFMT_CBS_CFS:
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/* 0 : slave */
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break;
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case SND_SOC_DAIFMT_CBM_CFS:
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/* 1 : master */
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break;
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default:
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break;
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}
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return 0;
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}
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/*
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* Set Jz4750 Clock source
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*/
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static int jz4750_i2s_set_dai_sysclk(struct snd_soc_dai *cpu_dai,
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int clk_id, unsigned int freq, int dir)
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{
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return 0;
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}
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static void jz4750_snd_tx_ctrl(int on)
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{
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if (on) {
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/* enable replay */
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__i2s_enable_transmit_dma();
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__i2s_enable_replay();
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__i2s_enable();
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} else {
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/* disable replay & capture */
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__i2s_disable_replay();
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__i2s_disable_record();
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__i2s_disable_receive_dma();
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__i2s_disable_transmit_dma();
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__i2s_disable();
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}
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}
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static void jz4750_snd_rx_ctrl(int on)
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{
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if (on) {
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/* enable capture */
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__i2s_enable_receive_dma();
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__i2s_enable_record();
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__i2s_enable();
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} else {
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/* disable replay & capture */
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__i2s_disable_replay();
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__i2s_disable_record();
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__i2s_disable_receive_dma();
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__i2s_disable_transmit_dma();
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__i2s_disable();
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}
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}
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static int jz4750_i2s_hw_params(struct snd_pcm_substream *substream,
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struct snd_pcm_hw_params *params)
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{
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struct snd_soc_pcm_runtime *rtd = substream->private_data;
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//struct snd_soc_cpu_dai *cpu_dai = rtd->dai->cpu_dai;
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int channels = params_channels(params);
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jz4750_snd_rx_ctrl(0);
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jz4750_snd_rx_ctrl(0);
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write_codec_file_bit(5, 0, 7);//PMR1.SB_DAC->0
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if (substream->stream == SNDRV_PCM_STREAM_PLAYBACK) {
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//cpu_dai->dma_data = &jz4750_i2s_pcm_stereo_out;
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rtd->dai->cpu_dai->dma_data = &jz4750_i2s_pcm_stereo_out;
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if (channels == 1)
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__aic_enable_mono2stereo();
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else
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__aic_disable_mono2stereo();
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} else
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rtd->dai->cpu_dai->dma_data = &jz4750_i2s_pcm_stereo_in;
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#if 1
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switch (channels) {
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case 1:
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write_codec_file_bit(1, 1, 6);//CR1.MONO->1 for Mono
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break;
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case 2:
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write_codec_file_bit(1, 0, 6);//CR1.MONO->0 for Stereo
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break;
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}
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#endif
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switch (params_format(params)) {
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case SNDRV_PCM_FORMAT_S8:
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__i2s_set_transmit_trigger(4);
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__i2s_set_receive_trigger(3);
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__i2s_set_oss_sample_size(8);
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__i2s_set_iss_sample_size(8);
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break;
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case SNDRV_PCM_FORMAT_S16_LE:
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/* playback sample:16 bits, burst:16 bytes */
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__i2s_set_transmit_trigger(4);
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/* capture sample:16 bits, burst:16 bytes */
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__i2s_set_receive_trigger(3);
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__i2s_set_oss_sample_size(16);
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__i2s_set_iss_sample_size(16);
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/* DAC path and ADC path */
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write_codec_file(2, 0x00);
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break;
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}
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return 0;
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}
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static int jz4750_i2s_trigger(struct snd_pcm_substream *substream, int cmd)
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{
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int ret = 0;
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switch (cmd) {
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case SNDRV_PCM_TRIGGER_START:
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case SNDRV_PCM_TRIGGER_RESUME:
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case SNDRV_PCM_TRIGGER_PAUSE_RELEASE:
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if (substream->stream == SNDRV_PCM_STREAM_CAPTURE)
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jz4750_snd_rx_ctrl(1);
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else
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jz4750_snd_tx_ctrl(1);
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break;
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case SNDRV_PCM_TRIGGER_STOP:
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case SNDRV_PCM_TRIGGER_SUSPEND:
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case SNDRV_PCM_TRIGGER_PAUSE_PUSH:
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if (substream->stream == SNDRV_PCM_STREAM_CAPTURE)
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jz4750_snd_rx_ctrl(0);
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else
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jz4750_snd_tx_ctrl(0);
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break;
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default:
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ret = -EINVAL;
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}
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return ret;
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}
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static void jz4750_i2s_shutdown(struct snd_pcm_substream *substream)
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{
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if (substream->stream == SNDRV_PCM_STREAM_PLAYBACK) {
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} else {
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}
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return;
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}
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static int jz4750_i2s_probe(struct platform_device *pdev)
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{
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__i2s_internal_codec();
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__i2s_as_slave();
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__i2s_select_i2s();
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__aic_select_i2s();
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mdelay(2);
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__i2s_disable();
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mdelay(2);
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REG_AIC_I2SCR = 0x10;
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__i2s_disable();
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__i2s_internal_codec();
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__i2s_as_slave();
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__i2s_select_i2s();
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__aic_select_i2s();
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__i2s_set_oss_sample_size(16);
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__i2s_set_iss_sample_size(16);
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__aic_play_lastsample();
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__i2s_disable_record();
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__i2s_disable_replay();
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__i2s_disable_loopback();
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__i2s_set_transmit_trigger(7);
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__i2s_set_receive_trigger(7);
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jz4750_snd_tx_ctrl(0);
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jz4750_snd_rx_ctrl(0);
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return 0;
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}
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#ifdef CONFIG_PM
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static int jz4750_i2s_suspend(struct platform_device *dev,
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struct snd_soc_dai *dai)
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{
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if (!dai->active)
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return 0;
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return 0;
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}
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static int jz4750_i2s_resume(struct platform_device *pdev,
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struct snd_soc_dai *dai)
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{
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if (!dai->active)
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return 0;
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return 0;
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}
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#else
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#define jz4750_i2s_suspend NULL
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#define jz4750_i2s_resume NULL
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#endif
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#define JZ4750_I2S_RATES (SNDRV_PCM_RATE_8000 | SNDRV_PCM_RATE_11025 |\
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SNDRV_PCM_RATE_12000 | SNDRV_PCM_RATE_16000 |\
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SNDRV_PCM_RATE_22050 | SNDRV_PCM_RATE_24000 |\
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SNDRV_PCM_RATE_32000 | SNDRV_PCM_RATE_44100 |\
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SNDRV_PCM_RATE_48000)
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struct snd_soc_dai jz4750_i2s_dai = {
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.name = "jz4750-i2s",
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.id = 0,
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.type = SND_SOC_DAI_I2S,
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.probe = jz4750_i2s_probe,
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.suspend = jz4750_i2s_suspend,
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.resume = jz4750_i2s_resume,
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.playback = {
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.channels_min = 1,
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.channels_max = 2,
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.rates = JZ4750_I2S_RATES,
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.formats = SNDRV_PCM_FMTBIT_S8 | SNDRV_PCM_FMTBIT_S16_LE,},
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.capture = {
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.channels_min = 1,
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.channels_max = 2,
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.rates = JZ4750_I2S_RATES,
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.formats = SNDRV_PCM_FMTBIT_S8 | SNDRV_PCM_FMTBIT_S16_LE,},
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.ops = {
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.startup = jz4750_i2s_startup,
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.shutdown = jz4750_i2s_shutdown,
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.trigger = jz4750_i2s_trigger,
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.hw_params = jz4750_i2s_hw_params,},
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.dai_ops = {
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.set_fmt = jz4750_i2s_set_dai_fmt,
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.set_sysclk = jz4750_i2s_set_dai_sysclk,
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},
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};
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EXPORT_SYMBOL_GPL(jz4750_i2s_dai);
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/* Module information */
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MODULE_AUTHOR("Richard, cjfeng@ingenic.cn, www.ingenic.cn");
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MODULE_DESCRIPTION("jz4750 I2S SoC Interface");
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MODULE_LICENSE("GPL");
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