mirror of
git://projects.qi-hardware.com/openwrt-xburst.git
synced 2024-12-03 18:00:17 +02:00
0b10449413
* remove references to gpio_dev * make vmmc driver register its own memory and dont rely on arch code to do so * makes any Danube board with a CFI commandset 2 NOR flash chip functional again * fixes filenames of downloaded firmwares thanks, Ithamar R. Adema git-svn-id: svn://svn.openwrt.org/openwrt/trunk@22515 3c298f89-4303-0410-b956-a3cf2f4a3e73
514 lines
17 KiB
Diff
514 lines
17 KiB
Diff
--- a/src/drv_vmmc_access.h
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+++ b/src/drv_vmmc_access.h
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@@ -24,6 +24,10 @@
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#include "drv_mps_vmmc.h"
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#endif
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+#if (LINUX_VERSION_CODE > KERNEL_VERSION(2,6,28))
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+# define IFX_MPS IFXMIPS_MPS_BASE_ADDR
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+#endif
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+
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/* ============================= */
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/* Global Defines */
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/* ============================= */
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--- a/src/drv_vmmc_bbd.c
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+++ b/src/drv_vmmc_bbd.c
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@@ -939,7 +939,11 @@ static IFX_int32_t vmmc_BBD_DownloadChCr
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IFX_uint8_t padBytes = 0;
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#endif
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IFX_uint16_t cram_offset, cram_crc,
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- pCmd [MAX_CMD_WORD] = {0};
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+ pCmd [MAX_CMD_WORD]
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+#if defined (__GNUC__) || defined (__GNUG__)
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+ __attribute__ ((aligned(4)))
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+#endif
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+ = {0};
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/* read offset */
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cpb2w (&cram_offset, &bbd_cram->pData[0], sizeof (IFX_uint16_t));
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--- a/src/drv_vmmc_danube.h
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+++ b/src/drv_vmmc_danube.h
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@@ -15,12 +15,59 @@
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*/
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#if defined SYSTEM_DANUBE
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-#include <asm/ifx/ifx_gpio.h>
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+# if (LINUX_VERSION_CODE > KERNEL_VERSION(2,6,28))
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+# include <asm/mach-ifxmips/ifxmips_gpio.h>
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+
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+# define IFX_GPIO_PIN_NUMBER_PER_PORT 16
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+# define IFX_GPIO_PIN_ID(port, pin) ((port) \
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+ * IFX_GPIO_PIN_NUMBER_PER_PORT \
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+ + (pin))
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+# define IFX_GPIO_PIN_ID_TO_PORT(pin_id) (pin_id >> 4)
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+# define IFX_GPIO_PIN_ID_TO_PIN(pin_id) (pin_id & 0x0F)
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+
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+# define IFX_GPIO_MODULE_TAPI_VMMC 0 /* not used */
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+
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+# define ifx_gpio_pin_reserve(a,b) 0 /* obsolete */
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+
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+# define ifx_gpio_open_drain_set(a,b) ifxmips_port_set_open_drain( \
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+ IFX_GPIO_PIN_ID_TO_PORT(a), \
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+ IFX_GPIO_PIN_ID_TO_PIN(a))
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+
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+# define ifx_gpio_altsel0_set(a,b) ifxmips_port_set_altsel0( \
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+ IFX_GPIO_PIN_ID_TO_PORT(a), \
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+ IFX_GPIO_PIN_ID_TO_PIN(a))
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+
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+# define ifx_gpio_altsel1_set(a,b) ifxmips_port_set_altsel1( \
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+ IFX_GPIO_PIN_ID_TO_PORT(a), \
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+ IFX_GPIO_PIN_ID_TO_PIN(a))
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+
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+# define ifx_gpio_altsel0_clear(a,b) ifxmips_port_clear_altsel0( \
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+ IFX_GPIO_PIN_ID_TO_PORT(a), \
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+ IFX_GPIO_PIN_ID_TO_PIN(a))
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+
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+# define ifx_gpio_altsel1_clear(a,b) ifxmips_port_clear_altsel1( \
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+ IFX_GPIO_PIN_ID_TO_PORT(a), \
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+ IFX_GPIO_PIN_ID_TO_PIN(a))
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+
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+# define ifx_gpio_dir_in_set(a,b) ifxmips_port_set_dir_in( \
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+ IFX_GPIO_PIN_ID_TO_PORT(a), \
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+ IFX_GPIO_PIN_ID_TO_PIN(a))
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+
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+# define ifx_gpio_dir_out_set(a,b) ifxmips_port_set_dir_out( \
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+ IFX_GPIO_PIN_ID_TO_PORT(a), \
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+ IFX_GPIO_PIN_ID_TO_PIN(a))
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+
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+# define ifx_gpio_pin_free(a,b) ifxmips_port_free_pin( \
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+ IFX_GPIO_PIN_ID_TO_PORT(a), \
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+ IFX_GPIO_PIN_ID_TO_PIN(a))
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+# else
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+# include <asm/ifx/ifx_gpio.h>
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+# endif
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#else
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#error no system selected
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#endif
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-#define VMMC_TAPI_GPIO_MODULE_ID IFX_GPIO_MODULE_TAPI_VMMC
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+#define VMMC_TAPI_GPIO_MODULE_ID IFX_GPIO_MODULE_TAPI_VMMC
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/**
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*/
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--- a/src/drv_vmmc_init.c
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+++ b/src/drv_vmmc_init.c
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@@ -48,6 +48,14 @@
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#include "drv_vmmc_pmc.h"
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#endif /* PMC_SUPPORTED */
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+#if (LINUX_VERSION_CODE > KERNEL_VERSION(2,6,28))
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+# define IFX_MPS_CAD0SR IFXMIPS_MPS_CAD0SR
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+# define IFX_MPS_CAD1SR IFXMIPS_MPS_CAD1SR
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+# define IFX_MPS_CVC0SR IFXMIPS_MPS_CVC0SR
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+# define IFX_MPS_CVC1SR IFXMIPS_MPS_CVC1SR
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+# define IFX_MPS_CVC2SR IFXMIPS_MPS_CVC2SR
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+# define IFX_MPS_CVC3SR IFXMIPS_MPS_CVC3SR
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+#endif
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/* ============================= */
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/* Local Macros & Definitions */
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--- a/src/drv_vmmc_init_cap.c
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+++ b/src/drv_vmmc_init_cap.c
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@@ -22,6 +22,11 @@
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#include "drv_mps_vmmc.h"
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#include "drv_mps_vmmc_device.h"
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+#if (LINUX_VERSION_CODE > KERNEL_VERSION(2,6,28))
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+# define IFX_MPS_CHIPID_VERSION_GET IFXMIPS_MPS_CHIPID_VERSION_GET
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+# define IFX_MPS_CHIPID IFXMIPS_MPS_CHIPID
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+#endif
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+
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/* ============================= */
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/* Configuration defintions */
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/* ============================= */
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--- a/src/mps/drv_mps_vmmc_common.c
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+++ b/src/mps/drv_mps_vmmc_common.c
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@@ -35,8 +35,35 @@
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#include "ifxos_interrupt.h"
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#include "ifxos_time.h"
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-#include <asm/ifx/ifx_regs.h>
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-#include <asm/ifx/ifx_gptu.h>
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+#if (LINUX_VERSION_CODE > KERNEL_VERSION(2,6,28))
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+# include <asm/mach-ifxmips/ifxmips.h>
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+# include <asm/mach-ifxmips/ifxmips_irq.h>
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+# include <asm/mach-ifxmips/ifxmips_gptu.h>
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+
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+# define ifx_gptu_timer_request ifxmips_request_timer
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+# define ifx_gptu_timer_start ifxmips_start_timer
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+# define ifx_gptu_countvalue_get ifxmips_get_count_value
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+# define ifx_gptu_timer_free ifxmips_free_timer
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+
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+# define IFX_MPS_SRAM IFXMIPS_MPS_SRAM
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+# define IFX_MPS_AD0ENR IFXMIPS_MPS_AD0ENR
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+# define IFX_MPS_AD1ENR IFXMIPS_MPS_AD1ENR
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+# define IFX_MPS_VC0ENR IFXMIPS_MPS_VC0ENR
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+# define IFX_MPS_SAD0SR IFXMIPS_MPS_SAD0SR
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+# define IFX_MPS_RAD0SR IFXMIPS_MPS_RAD0SR
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+# define IFX_MPS_RAD1SR IFXMIPS_MPS_RAD1SR
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+# define IFX_MPS_CAD0SR IFXMIPS_MPS_CAD0SR
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+# define IFX_MPS_CAD1SR IFXMIPS_MPS_CAD1SR
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+# define IFX_MPS_RVC0SR IFXMIPS_MPS_RVC0SR
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+# define IFX_MPS_CVC0SR IFXMIPS_MPS_CVC0SR
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+
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+# define INT_NUM_IM4_IRL14 (INT_NUM_IM4_IRL0 + 14)
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+
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+# define bsp_mask_and_ack_irq ifxmips_mask_and_ack_irq
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+#else
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+# include <asm/ifx/ifx_regs.h>
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+# include <asm/ifx/ifx_gptu.h>
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+#endif
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#include "drv_mps_vmmc.h"
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#include "drv_mps_vmmc_dbg.h"
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@@ -193,7 +220,8 @@ IFX_boolean_t ifx_mps_ext_bufman ()
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*/
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IFX_void_t *ifx_mps_fastbuf_malloc (IFX_size_t size, IFX_int32_t priority)
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{
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- IFX_uint32_t ptr, flags;
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+ unsigned long flags;
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+ IFX_uint32_t ptr;
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IFX_int32_t index = fastbuf_index;
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if (fastbuf_initialized == 0)
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@@ -219,11 +247,11 @@ IFX_void_t *ifx_mps_fastbuf_malloc (IFX_
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if ((volatile IFX_uint32_t) fastbuf_pool[index] & FASTBUF_USED)
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continue;
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ptr = fastbuf_pool[index];
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- (volatile IFX_uint32_t) fastbuf_pool[index] |= FASTBUF_USED;
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+ fastbuf_pool[index] = (volatile IFX_uint32_t) fastbuf_pool[index] | FASTBUF_USED;
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if ((priority == FASTBUF_FW_OWNED) || (priority == FASTBUF_CMD_OWNED) ||
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(priority == FASTBUF_EVENT_OWNED) ||
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(priority == FASTBUF_WRITE_OWNED))
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- (volatile IFX_uint32_t) fastbuf_pool[index] |= priority;
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+ fastbuf_pool[index] = (volatile IFX_uint32_t) fastbuf_pool[index] | priority;
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fastbuf_index = index;
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IFXOS_UNLOCKINT (flags);
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return (IFX_void_t *) ptr;
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@@ -247,7 +275,7 @@ IFX_void_t *ifx_mps_fastbuf_malloc (IFX_
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*/
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IFX_void_t ifx_mps_fastbuf_free (const IFX_void_t * ptr)
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{
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- IFX_uint32_t flags;
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+ unsigned long flags;
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IFX_int32_t index = fastbuf_index;
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IFXOS_LOCKINT (flags);
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@@ -261,8 +289,9 @@ IFX_void_t ifx_mps_fastbuf_free (const I
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FASTBUF_EVENT_OWNED | FASTBUF_WRITE_OWNED))
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== ((IFX_uint32_t) ptr | FASTBUF_USED))
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{
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- (volatile IFX_uint32_t) fastbuf_pool[index] &= ~FASTBUF_USED;
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- (volatile IFX_uint32_t) fastbuf_pool[index] &=
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+ fastbuf_pool[index] = (volatile IFX_uint32_t) fastbuf_pool[index] & ~FASTBUF_USED;
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+
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+ fastbuf_pool[index] = (volatile IFX_uint32_t) fastbuf_pool[index] &
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~(FASTBUF_FW_OWNED | FASTBUF_CMD_OWNED | FASTBUF_EVENT_OWNED |
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FASTBUF_WRITE_OWNED);
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IFXOS_UNLOCKINT (flags);
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@@ -444,7 +473,7 @@ static mps_buffer_state_e ifx_mps_bufman
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*/
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static IFX_int32_t ifx_mps_bufman_inc_level (IFX_uint32_t value)
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{
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- IFX_uint32_t flags;
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+ unsigned long flags;
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if (mps_buffer.buf_level + value > MPS_BUFFER_MAX_LEVEL)
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{
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@@ -471,7 +500,7 @@ static IFX_int32_t ifx_mps_bufman_inc_le
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*/
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static IFX_int32_t ifx_mps_bufman_dec_level (IFX_uint32_t value)
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{
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- IFX_uint32_t flags;
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+ unsigned long flags;
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if (mps_buffer.buf_level < value)
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{
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@@ -932,7 +961,7 @@ IFX_int32_t ifx_mps_common_open (mps_com
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mps_mbx_dev * pMBDev, IFX_int32_t bcommand,
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IFX_boolean_t from_kernel)
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{
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- IFX_uint32_t flags;
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+ unsigned long flags;
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IFXOS_LOCKINT (flags);
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@@ -1048,7 +1077,7 @@ IFX_int32_t ifx_mps_common_close (mps_mb
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IFX_void_t ifx_mps_release_structures (mps_comm_dev * pDev)
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{
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IFX_int32_t count;
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- IFX_uint32_t flags;
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+ unsigned long flags;
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IFXOS_LOCKINT (flags);
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IFXOS_BlockFree (pFW_img_data);
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@@ -1544,7 +1573,7 @@ IFX_int32_t ifx_mps_mbx_read_message (mp
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IFX_uint32_t * bytes)
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{
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IFX_int32_t i, ret;
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- IFX_uint32_t flags;
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+ unsigned long flags;
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IFXOS_LOCKINT (flags);
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@@ -1751,7 +1780,7 @@ IFX_int32_t ifx_mps_mbx_write_message (m
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{
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mps_fifo *mbx;
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IFX_uint32_t i;
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- IFX_uint32_t flags;
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+ unsigned long flags;
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IFX_int32_t retval = -EAGAIN;
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IFX_int32_t retries = 0;
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IFX_uint32_t word = 0;
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@@ -2138,6 +2167,7 @@ IFX_int32_t ifx_mps_mbx_write_cmd (mps_m
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TRACE (MPS, DBG_LEVEL_HIGH,
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("%s(): Invalid device ID %d !\n", __FUNCTION__, pMBDev->devID));
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}
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+
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return retval;
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}
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@@ -2161,7 +2191,7 @@ IFX_void_t ifx_mps_mbx_data_upstream (IF
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mps_mbx_dev *mbx_dev;
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MbxMsg_s msg;
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IFX_uint32_t bytes_read = 0;
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- IFX_uint32_t flags;
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+ unsigned long flags;
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IFX_int32_t ret;
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/* set pointer to data upstream mailbox, no matter if 0,1,2 or 3 because
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@@ -2252,7 +2282,7 @@ IFX_void_t ifx_mps_mbx_data_upstream (IF
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{
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ifx_mps_bufman_dec_level (1);
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if ((ifx_mps_bufman_get_level () <= mps_buffer.buf_threshold) &&
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- (atomic_read (&pMPSDev->provide_buffer->object.count) == 0))
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+ ((volatile unsigned int)pMPSDev->provide_buffer->object.count == 0))
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{
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IFXOS_LockRelease (pMPSDev->provide_buffer);
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}
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@@ -2295,7 +2325,7 @@ IFX_void_t ifx_mps_mbx_data_upstream (IF
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#endif /* CONFIG_PROC_FS */
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ifx_mps_bufman_dec_level (1);
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if ((ifx_mps_bufman_get_level () <= mps_buffer.buf_threshold) &&
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- (atomic_read (&pMPSDev->provide_buffer->object.count) == 0))
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+ ((volatile unsigned int)pMPSDev->provide_buffer->object.count == 0))
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{
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IFXOS_LockRelease (pMPSDev->provide_buffer);
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}
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@@ -2325,7 +2355,7 @@ IFX_void_t ifx_mps_mbx_data_upstream (IF
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IFX_void_t ifx_mps_mbx_cmd_upstream (IFX_ulong_t dummy)
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{
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mps_fifo *mbx;
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- IFX_uint32_t flags;
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+ unsigned long flags;
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/* set pointer to upstream command mailbox */
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mbx = &(pMPSDev->cmd_upstrm_fifo);
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@@ -2373,7 +2403,7 @@ IFX_void_t ifx_mps_mbx_event_upstream (I
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mps_event_msg msg;
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IFX_int32_t length = 0;
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IFX_int32_t read_length = 0;
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- IFX_uint32_t flags;
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+ unsigned long flags;
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/* set pointer to upstream event mailbox */
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mbx = &(pMPSDev->event_upstrm_fifo);
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@@ -2616,7 +2646,7 @@ IFX_void_t ifx_mps_disable_mailbox_int (
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*/
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IFX_void_t ifx_mps_dd_mbx_int_enable (IFX_void_t)
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{
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- IFX_uint32_t flags;
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+ unsigned long flags;
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MPS_Ad0Reg_u Ad0Reg;
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IFXOS_LOCKINT (flags);
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@@ -2642,7 +2672,7 @@ IFX_void_t ifx_mps_dd_mbx_int_enable (IF
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*/
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IFX_void_t ifx_mps_dd_mbx_int_disable (IFX_void_t)
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{
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- IFX_uint32_t flags;
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+ unsigned long flags;
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MPS_Ad0Reg_u Ad0Reg;
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IFXOS_LOCKINT (flags);
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@@ -2769,6 +2799,7 @@ irqreturn_t ifx_mps_ad0_irq (IFX_int32_t
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}
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}
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+
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if (MPS_Ad0StatusReg.fld.du_mbx)
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{
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#ifdef CONFIG_PROC_FS
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@@ -3062,7 +3093,8 @@ IFX_int32_t ifx_mps_get_fw_version (IFX_
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*/
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IFX_return_t ifx_mps_init_gpt ()
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{
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- IFX_uint32_t flags, timer_flags, timer, loops = 0;
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+ unsigned long flags;
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+ IFX_uint32_t timer_flags, timer, loops = 0;
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IFX_ulong_t count;
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#if defined(SYSTEM_AR9) || defined(SYSTEM_VR9)
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timer = TIMER1A;
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--- a/src/mps/drv_mps_vmmc_danube.c
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+++ b/src/mps/drv_mps_vmmc_danube.c
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@@ -32,9 +32,20 @@
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#include "ifxos_select.h"
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#include "ifxos_interrupt.h"
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-#include <asm/ifx/ifx_regs.h>
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-#include <asm/ifx/ifx_gpio.h>
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-#include <asm/ifx/common_routines.h>
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+#if (LINUX_VERSION_CODE > KERNEL_VERSION(2,6,28))
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+# include <asm/mach-ifxmips/ifxmips.h>
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+# include <asm/mach-ifxmips/ifxmips_irq.h>
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+# include <asm/mach-ifxmips/ifxmips_gptu.h>
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+# include <asm/mach-ifxmips/ifxmips_prom.h>
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+# include <linux/dma-mapping.h>
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+
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+# define IFX_RCU_RST_REQ IFXMIPS_RCU_RST
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+# define IFX_RCU_RST_REQ_CPU1 IFXMIPS_RCU_RST_CPU1
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+#else
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+# include <asm/ifx/ifx_regs.h>
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+# include <asm/ifx_vpe.h>
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+# include <asm/ifx/ifx_gpio.h>
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+#endif
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#include "drv_mps_vmmc.h"
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#include "drv_mps_vmmc_dbg.h"
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@@ -72,6 +71,23 @@ volatile IFX_uint32_t *danube_cp1_base;
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/* Local function definition */
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/* ============================= */
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+#if (LINUX_VERSION_CODE > KERNEL_VERSION(2,6,28))
|
|
+IFX_uint32_t ifx_get_cp1_size(IFX_void_t)
|
|
+{
|
|
+ return 2;
|
|
+}
|
|
+
|
|
+IFX_uint32_t *ifx_get_cp1_base(IFX_void_t)
|
|
+{
|
|
+ if (!danube_cp1_base) {
|
|
+ dma_addr_t dma;
|
|
+ danube_cp1_base = dma_alloc_coherent(NULL, ifx_get_cp1_size()<<20, &dma, GFP_ATOMIC);
|
|
+ }
|
|
+
|
|
+ return (IFX_uint32_t*)danube_cp1_base;
|
|
+}
|
|
+#endif
|
|
+
|
|
/******************************************************************************
|
|
* DANUBE Specific Routines
|
|
******************************************************************************/
|
|
@@ -119,6 +132,15 @@ IFX_int32_t ifx_mps_download_firmware (m
|
|
}
|
|
|
|
/* check if FW image fits in available memory space */
|
|
+#if (LINUX_VERSION_CODE > KERNEL_VERSION(2,6,28))
|
|
+ if (mem > ifx_get_cp1_size()<<20)
|
|
+ {
|
|
+ TRACE (MPS, DBG_LEVEL_HIGH,
|
|
+ ("[%s %s %d]: error, firmware memory exceeds reserved space (%i > %i)!\n",
|
|
+ __FILE__, __func__, __LINE__, mem, ifx_get_cp1_size()<<20));
|
|
+ return IFX_ERROR;
|
|
+ }
|
|
+#else
|
|
if (mem > ifx_get_cp1_size())
|
|
{
|
|
TRACE (MPS, DBG_LEVEL_HIGH,
|
|
@@ -126,6 +148,7 @@ IFX_int32_t ifx_mps_download_firmware (m
|
|
__FILE__, __func__, __LINE__, mem, ifx_get_cp1_size()));
|
|
return IFX_ERROR;
|
|
}
|
|
+#endif
|
|
|
|
/* reset the driver */
|
|
ifx_mps_reset ();
|
|
@@ -337,7 +360,7 @@ IFX_void_t ifx_mps_release (IFX_void_t)
|
|
*/
|
|
IFX_void_t ifx_mps_wdog_expiry()
|
|
{
|
|
- IFX_uint32_t flags;
|
|
+ unsigned long flags;
|
|
|
|
IFXOS_LOCKINT (flags);
|
|
/* recalculate and compare the firmware checksum */
|
|
--- a/src/mps/drv_mps_vmmc_device.h
|
|
+++ b/src/mps/drv_mps_vmmc_device.h
|
|
@@ -16,8 +16,15 @@
|
|
declarations.
|
|
*******************************************************************************/
|
|
|
|
-#include <asm/ifx/ifx_regs.h>
|
|
-#include <asm/ifx_vpe.h>
|
|
+#if (LINUX_VERSION_CODE > KERNEL_VERSION(2,6,28))
|
|
+# include <asm/mach-ifxmips/ifxmips.h>
|
|
+# include <asm/mach-ifxmips/ifxmips_irq.h>
|
|
+# include <asm/mach-ifxmips/ifxmips_gpio.h>
|
|
+# include <gpio.h>
|
|
+#else
|
|
+# include <asm/ifx/ifx_regs.h>
|
|
+# include <asm/ifx_vpe.h>
|
|
+#endif
|
|
|
|
/* ============================= */
|
|
/* MPS Common defines */
|
|
--- a/src/mps/drv_mps_vmmc_linux.c
|
|
+++ b/src/mps/drv_mps_vmmc_linux.c
|
|
@@ -40,10 +40,26 @@
|
|
#include <linux/moduleparam.h>
|
|
#endif /* */
|
|
|
|
-
|
|
-#include <asm/ifx/irq.h>
|
|
-#include <asm/ifx/ifx_regs.h>
|
|
-#include <asm/ifx_vpe.h>
|
|
+#if (LINUX_VERSION_CODE > KERNEL_VERSION(2,6,28))
|
|
+# include <asm/mach-ifxmips/ifxmips.h>
|
|
+# include <asm/mach-ifxmips/ifxmips_irq.h>
|
|
+
|
|
+# define IFX_MPS_AD0ENR IFXMIPS_MPS_AD0ENR
|
|
+# define IFX_MPS_AD1ENR IFXMIPS_MPS_AD1ENR
|
|
+# define IFX_MPS_RAD0SR IFXMIPS_MPS_RAD0SR
|
|
+# define IFX_MPS_RAD1SR IFXMIPS_MPS_RAD1SR
|
|
+# define IFX_MPS_VC0ENR IFXMIPS_MPS_VC0ENR
|
|
+# define IFX_MPS_RVC0SR IFXMIPS_MPS_RVC0SR
|
|
+
|
|
+# define INT_NUM_IM4_IRL14 (INT_NUM_IM4_IRL0 + 14)
|
|
+# define INT_NUM_IM4_IRL18 (INT_NUM_IM4_IRL0 + 18)
|
|
+# define INT_NUM_IM4_IRL19 (INT_NUM_IM4_IRL0 + 19)
|
|
+# define IFX_ICU_IM4_IER IFXMIPS_ICU_IM4_IER
|
|
+#else
|
|
+# include <asm/ifx/irq.h>
|
|
+# include <asm/ifx/ifx_regs.h>
|
|
+# include <asm/ifx_vpe.h>
|
|
+#endif
|
|
|
|
/* lib_ifxos headers */
|
|
#include "ifx_types.h"
|
|
@@ -914,7 +930,7 @@ IFX_int32_t ifx_mps_ioctl (struct inode
|
|
#endif /* MPS_FIFO_BLOCKING_WRITE */
|
|
case FIO_MPS_GET_STATUS:
|
|
{
|
|
- IFX_uint32_t flags;
|
|
+ unsigned long flags;
|
|
|
|
IFXOS_LOCKINT (flags);
|
|
|
|
@@ -949,7 +965,7 @@ IFX_int32_t ifx_mps_ioctl (struct inode
|
|
#if CONFIG_MPS_HISTORY_SIZE > 0
|
|
case FIO_MPS_GET_CMD_HISTORY:
|
|
{
|
|
- IFX_uint32_t flags;
|
|
+ unsigned long flags;
|
|
|
|
if (from_kernel)
|
|
{
|
|
@@ -1637,6 +1653,7 @@ IFX_int32_t ifx_mps_get_status_proc (IFX
|
|
sprintf (buf + len, " minLv: \t %8d\n",
|
|
ifx_mps_dev.voice_mb[i].upstrm_fifo->min_space);
|
|
}
|
|
+
|
|
return len;
|
|
}
|
|
|