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Here is the driver for the hardware watchdog timer integrated in RB 532 (as part of the SoC IDT 79RC32434). File include/asm-mips/rc32434/integ.h is taken from Mikrotik RB 532 kernel patch. Signed-off-by: Ondrej Zajicek <santiago@crfreenet.org> git-svn-id: svn://svn.openwrt.org/openwrt/trunk@9896 3c298f89-4303-0410-b956-a3cf2f4a3e73
77 lines
2.1 KiB
C
77 lines
2.1 KiB
C
#ifndef __IDT_INTEG_H__
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#define __IDT_INTEG_H__
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/*******************************************************************************
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*
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* Copyright 2002 Integrated Device Technology, Inc.
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* All rights reserved.
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*
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* System Integrity register definition.
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*
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* File : $Id: integ.h,v 1.3 2002/06/06 18:34:04 astichte Exp $
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*
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* Author : ryan.holmQVist@idt.com
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* Date : 20011005
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* Update :
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* $Log: integ.h,v $
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* Revision 1.3 2002/06/06 18:34:04 astichte
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* Added XXX_PhysicalAddress and XXX_VirtualAddress
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*
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* Revision 1.2 2002/06/05 18:32:33 astichte
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* Removed IDTField
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*
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* Revision 1.1 2002/05/29 17:33:22 sysarch
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* jba File moved from vcode/include/idt/acacia
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*
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******************************************************************************/
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enum
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{
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INTEG0_PhysicalAddress = 0x18030000,
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INTEG_PhysicalAddress = INTEG0_PhysicalAddress, // Default
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INTEG0_VirtualAddress = 0xb8030000,
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INTEG_VirtualAddress = INTEG0_VirtualAddress, // Default
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} ;
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// if you are looing for CEA, try rst.h
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typedef struct
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{
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u32 filler [0xc] ; // 0x30 bytes unused.
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u32 errcs ; // sticky use ERRCS_
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u32 wtcount ; // Watchdog timer count reg.
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u32 wtcompare ; // Watchdog timer timeout value.
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u32 wtc ; // Watchdog timer control. use WTC_
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} volatile *INTEG_t ;
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enum
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{
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ERRCS_wto_b = 0, // In INTEG_t -> errcs
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ERRCS_wto_m = 0x00000001,
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ERRCS_wne_b = 1, // In INTEG_t -> errcs
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ERRCS_wne_m = 0x00000002,
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ERRCS_ucw_b = 2, // In INTEG_t -> errcs
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ERRCS_ucw_m = 0x00000004,
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ERRCS_ucr_b = 3, // In INTEG_t -> errcs
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ERRCS_ucr_m = 0x00000008,
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ERRCS_upw_b = 4, // In INTEG_t -> errcs
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ERRCS_upw_m = 0x00000010,
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ERRCS_upr_b = 5, // In INTEG_t -> errcs
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ERRCS_upr_m = 0x00000020,
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ERRCS_udw_b = 6, // In INTEG_t -> errcs
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ERRCS_udw_m = 0x00000040,
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ERRCS_udr_b = 7, // In INTEG_t -> errcs
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ERRCS_udr_m = 0x00000080,
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ERRCS_sae_b = 8, // In INTEG_t -> errcs
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ERRCS_sae_m = 0x00000100,
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ERRCS_wre_b = 9, // In INTEG_t -> errcs
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ERRCS_wre_m = 0x00000200,
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WTC_en_b = 0, // In INTEG_t -> wtc
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WTC_en_m = 0x00000001,
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WTC_to_b = 1, // In INTEG_t -> wtc
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WTC_to_m = 0x00000002,
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} ;
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#endif // __IDT_INTEG_H__
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