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git://projects.qi-hardware.com/openwrt-xburst.git
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6e809dd8f1
This also adds minimal support for the BCMA43224 pcie wireless card. git-svn-id: svn://svn.openwrt.org/openwrt/trunk@29843 3c298f89-4303-0410-b956-a3cf2f4a3e73
53 lines
2.2 KiB
Diff
53 lines
2.2 KiB
Diff
From efe89df0326b777563d197b8cf1c25209a31ceb0 Mon Sep 17 00:00:00 2001
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From: Hauke Mehrtens <hauke@hauke-m.de>
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Date: Sat, 21 Jan 2012 18:47:42 +0100
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Subject: [PATCH 32/34] bcma: complete workaround for BCMA43224
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Signed-off-by: Hauke Mehrtens <hauke@hauke-m.de>
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---
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drivers/bcma/driver_chipcommon_pmu.c | 15 +++++++++++----
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include/linux/bcma/bcma_driver_chipcommon.h | 5 +++++
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2 files changed, 16 insertions(+), 4 deletions(-)
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--- a/drivers/bcma/driver_chipcommon_pmu.c
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+++ b/drivers/bcma/driver_chipcommon_pmu.c
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@@ -141,12 +141,19 @@ void bcma_pmu_workarounds(struct bcma_dr
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/* BCM4331 workaround is SPROM-related, we put it in sprom.c */
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break;
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case 43224:
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+ case 43421:
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+ /* enable 12 mA drive strenth for 43224 and set chipControl register bit 15 */
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if (bus->chipinfo.rev == 0) {
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- pr_err("Workarounds for 43224 rev 0 not fully "
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- "implemented\n");
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- bcma_chipco_chipctl_maskset(cc, 0, ~0, 0x00F000F0);
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+ bcma_cc_maskset32(cc, BCMA_CC_CHIPCTL,
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+ BCMA_CCTRL_43224_GPIO_TOGGLE,
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+ BCMA_CCTRL_43224_GPIO_TOGGLE);
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+ bcma_chipco_chipctl_maskset(cc, 0,
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+ BCMA_CCTRL_43224A0_12MA_LED_DRIVE,
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+ BCMA_CCTRL_43224A0_12MA_LED_DRIVE);
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} else {
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- bcma_chipco_chipctl_maskset(cc, 0, ~0, 0xF0);
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+ bcma_chipco_chipctl_maskset(cc, 0,
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+ BCMA_CCTRL_43224B0_12MA_LED_DRIVE,
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+ BCMA_CCTRL_43224B0_12MA_LED_DRIVE);
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}
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break;
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case 43225:
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--- a/include/linux/bcma/bcma_driver_chipcommon.h
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+++ b/include/linux/bcma/bcma_driver_chipcommon.h
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@@ -374,6 +374,11 @@
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#define BCMA_CHIPCTL_4331_BT_SHD0_ON_GPIO4 BIT(16) /* enable bt_shd0 at gpio4 */
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#define BCMA_CHIPCTL_4331_BT_SHD1_ON_GPIO5 BIT(17) /* enable bt_shd1 at gpio5 */
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+/* 43224 chip-specific ChipControl register bits */
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+#define BCMA_CCTRL_43224_GPIO_TOGGLE 0x8000 /* gpio[3:0] pins as btcoex or s/w gpio */
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+#define BCMA_CCTRL_43224A0_12MA_LED_DRIVE 0x00F000F0 /* 12 mA drive strength */
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+#define BCMA_CCTRL_43224B0_12MA_LED_DRIVE 0xF0 /* 12 mA drive strength for later 43224s */
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+
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#define BCMA_FLASH2 0x1c000000 /* Flash Region 2 (region 1 shadowed here) */
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#define BCMA_FLASH2_SZ 0x02000000 /* Size of Flash Region 2 */
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#define BCMA_FLASH1 0x1fc00000 /* MIPS Flash Region 1 */
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