mirror of
git://projects.qi-hardware.com/openwrt-xburst.git
synced 2024-12-30 23:02:25 +02:00
0ddbef1f62
git-svn-id: svn://svn.openwrt.org/openwrt/trunk@24859 3c298f89-4303-0410-b956-a3cf2f4a3e73
118 lines
2.9 KiB
Diff
118 lines
2.9 KiB
Diff
--- /dev/null
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+++ b/arch/arm/mach-cns21xx/dev-spi-master.c
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@@ -0,0 +1,83 @@
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+/*
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+ * Copyright (c) 2010 Gabor Juhos <juhosg@openwrt.org>
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+ *
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+ * This file is free software; you can redistribute it and/or modify
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+ * it under the terms of the GNU General Public License, Version 2, as
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+ * published by the Free Software Foundation.
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+ */
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+
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+#include <linux/kernel.h>
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+#include <linux/init.h>
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+#include <linux/spi/spi.h>
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+#include <linux/dma-mapping.h>
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+#include <linux/platform_device.h>
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+
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+#include <mach/hardware.h>
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+#include <mach/cns21xx.h>
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+#include <mach/cns21xx_misc.h>
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+#include <mach/cns21xx_powermgmt.h>
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+#include <mach/irqs.h>
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+
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+#include "common.h"
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+
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+static u64 spi_dmamask = DMA_BIT_MASK(32);
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+static struct resource cns21xx_spi_resources[] = {
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+ [0] = {
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+ .start = CNS21XX_SPI_BASE,
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+ .end = CNS21XX_SPI_BASE + SZ_4K - 1,
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+ .flags = IORESOURCE_MEM,
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+ },
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+ [1] = {
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+ .start = CNS21XX_IRQ_SPI,
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+ .end = CNS21XX_IRQ_SPI,
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+ .flags = IORESOURCE_IRQ,
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+ },
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+};
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+
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+static struct platform_device cns21xx_spi_master_device = {
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+ .name = "cns21xx-spi",
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+ .id = -1,
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+ .dev = {
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+ .dma_mask = &spi_dmamask,
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+ .coherent_dma_mask = DMA_BIT_MASK(32),
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+ },
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+ .resource = cns21xx_spi_resources,
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+ .num_resources = ARRAY_SIZE(cns21xx_spi_resources),
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+};
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+
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+void __init cns21xx_register_spi_master(int id, struct spi_board_info *info,
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+ unsigned int n)
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+{
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+ unsigned int i;
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+
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+ /* Enable SPI pins */
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+ HAL_MISC_ENABLE_SPIDR_PINS();
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+ HAL_MISC_ENABLE_SPICLK_PINS();
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+ for (i = 0; i < n; i++) {
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+ switch (info[i].chip_select) {
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+ case 0:
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+ HAL_MISC_ENABLE_SPICSN0_PINS();
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+ break;
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+ case 1:
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+ HAL_MISC_ENABLE_SPICSN1_PINS();
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+ break;
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+ case 2:
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+ HAL_MISC_ENABLE_SPICSN2_PINS();
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+ break;
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+ case 3:
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+ HAL_MISC_ENABLE_SPICSN3_PINS();
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+ break;
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+ }
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+ }
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+
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+ /* Disable SPI serial flash access through 0x30000000 region */
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+ HAL_MISC_DISABLE_SPI_SERIAL_FLASH_BANK_ACCESS();
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+
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+ /* Enable SPI clock */
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+ HAL_PWRMGT_ENABLE_SPI_CLOCK();
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+
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+ cns21xx_spi_master_device.id = id;
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+
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+ spi_register_board_info(info, n);
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+ platform_device_register(&cns21xx_spi_master_device);
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+}
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--- a/arch/arm/mach-cns21xx/Kconfig
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+++ b/arch/arm/mach-cns21xx/Kconfig
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@@ -6,4 +6,7 @@ endmenu
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config CNS21XX_DEV_USB
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def_bool n
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+config CNS21XX_DEV_SPI_MASTER
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+ def_bool n
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+
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endif
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--- a/arch/arm/mach-cns21xx/Makefile
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+++ b/arch/arm/mach-cns21xx/Makefile
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@@ -8,6 +8,7 @@ obj-y := core.o devices.o gpio.o irq.o
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# devices
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obj-$(CONFIG_CNS21XX_DEV_USB) += dev-usb.o
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+obj-$(CONFIG_CNS21XX_DEV_SPI_MASTER) += dev-spi-master.o
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# machine specific files
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--- a/arch/arm/mach-cns21xx/common.h
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+++ b/arch/arm/mach-cns21xx/common.h
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@@ -21,4 +21,8 @@ int __init cns21xx_register_uart1(void);
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int __init cns21xx_register_usb(void);
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int __init cns21xx_register_wdt(void);
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+struct spi_board_info;
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+void __init cns21xx_register_spi_master(int id, struct spi_board_info *info,
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+ unsigned int n);
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+
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#endif /* _MACH_CNS21XX_COMMON_H */
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